CN102257614A - 包括安装在封装基板的相对侧的感测和处理管芯的集成传感器 - Google Patents
包括安装在封装基板的相对侧的感测和处理管芯的集成传感器 Download PDFInfo
- Publication number
- CN102257614A CN102257614A CN2009801516895A CN200980151689A CN102257614A CN 102257614 A CN102257614 A CN 102257614A CN 2009801516895 A CN2009801516895 A CN 2009801516895A CN 200980151689 A CN200980151689 A CN 200980151689A CN 102257614 A CN102257614 A CN 102257614A
- Authority
- CN
- China
- Prior art keywords
- tube core
- lead frame
- transducer
- humidity sensor
- core
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0651—Wire or wire-like electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10161—Shape being a cuboid with a rectangular active surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1433—Application-specific integrated circuit [ASIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Pressure Sensors (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Measuring Temperature Or Quantity Of Heat (AREA)
Abstract
一种集成电路(IC)器件(100)包括引线框(104)和多个引线指(106),所述引线框(104)具有第一(105a)和第二相对表面(105b)。包括信号处理器(103)的第一管芯(102)被安装在所述引线框的第一表面上,而第二管芯(112)被安装在所述引线框的第二表面上。所述第二管芯包括至少一个传感器(113),所述传感器感测至少一个非电参数并且具有提供所述参数的感测信号的至少一个传感器输出(113a)。所述传感器输出耦合到所述信号处理器以对所述感测信号进行处理。
Description
相关申请的交叉引用
本申请要求于2008年10月22日提交的标题为“INTEGRATED CIRCUIT DEVICE INCLUDING SENSOR DIE FOR SENSING PARAMETERS AND DIE FOR SIGNAL PROCESSING SENSOR DIE SIGNALS”的临时申请序列号61/107,631的权益,该临时申请被全文合并在此以作参考。
技术领域
所公开的实施例涉及集成电路(IC)器件,更具体来说涉及包括封装基板以及感测管芯和信号处理管芯的IC器件。
背景技术
传感器器件被广泛用于提供对物理量的测量以用于控制和/或监测的目的。一般来说,传感器器件被用在多种应用和行业中,其中包括汽车、航空航天、医药、制造以及机器人。举例来说,湿度传感器通常被用于包括空调控制和监测、安全保险监测、家用电器水分及温度控制、能量效率监测、湿度开关控制、打印或其他再现装备操作、天气监测以及空气质量监测的应用。
发明内容
所公开的实施例具有位于诸如PCB或引线框之类的封装基板的相对侧的第一和第二IC管芯,其中分别包括信号处理管芯和感测管芯。感测管芯上的传感器感测至少一个非电参数,诸如但不限于温度、磁场、机械参数、化学药品或生化药品、光学辐射、电离辐射、声学或湿度,并且在一个或更多传感器输出处提供针对该参数的感测信号。
所公开的实施例允许以一种减小所述IC器件的总体占用空间的配置把第一和第二管芯放置在封装基板上。在一个实施例中,所述第一和第二管芯可以至少部分地彼此重叠,从而减小针对所述IC器件的总体最小占用空间。在另一个实施例中,所述两个管芯的接合区域可以至少部分地重叠,从而再次减小所述IC器件的总体最小占用空间。减小的尺寸可以允许与增加数目的应用兼容,并且还可以在减小板安装面积方面降低成本。
附图说明
图1A和1B分别示出了根据所公开的实施例的包括引线框基板的示例性IC器件的顶视图和底视图。
图1C是根据所公开的实施例的包括PCB基板的示例性IC器件的侧视图描绘。
图2A-2F示出了根据所公开的实施例的针对图1A和1B中所示的示例性IC器件的各中间组装步骤处的结果。
图3示出了根据另一个所公开的实施例的用于IC器件的示例性遮罩的顶部透视图。
图4A示出了根据所公开的实施例的示例性IC器件的底视图,其中包括用于附着包括至少一个传感器器件的第二管芯的倒装芯片(FC)焊盘。
图4B示出了在附着包括至少一个传感器器件的第二管芯之后的图4A中的示例性IC器件的底视图。
图5A-5E示出了根据所公开的实施例的针对包括引线框和模塑料孔口的示例性IC器件的各中间组装步骤处的结果。
具体实施方式
参照附图来描述所公开的实施例,其中相同的附图标记在各图中被用来指代类似的或等效的元件。附图并未按比例绘制,提供附图只是为了说明所公开的实施例。下面参照用于进行说明的示例应用来描述这里所公开的几个方面。应当理解的是,所阐述的各种具体细节、关系和方法是为了提供对所公开的实施例及其等效方案的全面理解。但是本领域技术人员将很容易认识到,可以在没有一项或更多项具体细节的情况下或者利用其他方法来实践所公开的实施例。在其他实例中,没有详细示出公知的结构或操作,以免模糊所公开的实施例的各方面。所公开的实施例不限于所示出的动作或事件的排序,这是因为某些动作可以按照不同的顺序发生并且/或者可以与其他动作或事件同时发生。此外,并不需要全部所示出的动作或事件来实施根据其等效方案的所公开的实施例的方法。
所公开的实施例提供基于IC器件的传感器,其中以一种减小所述IC器件的总体占用空间的配置把分别包括信号处理管芯和感测管芯的第一和第二IC管芯放置在封装基板的相对侧。此外,如下所述,可以利用封装技术来保护传感器管芯上的(一个或多个)传感器在组装期间免于潜在的损坏和污染。
这里所使用的术语“封装基板”在一个实施例中包括PCB,其可以是单层或多层PCB。所述PCB基板可以是陶瓷或聚合物基板。在另一个实施例中,所述封装基板包括引线框(其中包括有引线或无引线封装),诸如基于铜(Cu)的引线框。但是这里所使用的术语“封装基板”不包括IC管芯,诸如基于硅的IC管芯。这里所使用的术语“传感器器件”或“传感器”指代任何测量通常是环境参数的物理(即非电)参数并且把所述非电(例如物理)参数转换成通常是电信号的信号的换能器器件,其中所述信号可以由观测者或者由仪器读取。在所公开的实施例中,所述传感器IC可以包括但不限于热(即温度)传感器、电磁传感器(例如磁场传感器)、机械传感器、化学或生化传感器、光学辐射传感器、电离辐射传感器、声学传感器或者湿度传感器。
在图1A和1B中分别示出了根据所公开的实施例的包括引线框基板的示例性IC器件100的顶视图和底视图。IC器件100包括至少两个IC管芯。一个IC管芯具有在制造期间形成于其上的一个或更多传感器以用于提供至少一个感测信号,而另一个IC管芯(诸如ASIC管芯)用于对所述感测信号进行信号处理。
如图1A中所示,包括信号处理器103的第一IC管芯102被安装在封装基板的第一表面105a上,所述封装基板在图1A中被示为包括管芯焊盘105和多个引线指106的引线框104。在一个实施例中,第一管芯102包括ASIC管芯,其可以包括用于存储针对所述传感器的个别化校准算法、温度补偿以及数字输出的存储器。
封装的半导体器件通常利用诸如引线框104之类的引线框,以通过所述引线框的引线指106来提供管芯支持以及所述管芯与封装外部的电连接点之间的电连接(例如通过接合线连接到所述IC管芯的表面上的接合焊盘)。虽然在图1A中示出了8个引线指(从而提供8引线IC器件),但是所公开的实施例可以具有多于或少于8条引线。
可以利用一种或更多种粘合剂材料将第一管芯102附着到管芯焊盘105的第一表面105a上。举例来说,填充有银的环氧树脂是一种常用于IC组装的既导电又导热的粘合剂材料。取决于第一管芯102的特性和应用细节,可以使用具有不同电导率和热导率的多种其他粘合剂。
虽然图1A和1B中所示的示例性IC器件100具有包括引线框104的封装基板,但是所公开的实施例在这方面不受限制。如前所述,通常可以使用其他封装基板,其中包括PCB基板(参见下面针对包括PCB基板的实施例所描述的图1C)。此外,如图1A中所示,利用一个或更多线接合(即接合线)连接108把第一管芯102(例如通过第一管芯102的表面上的接合焊盘)电耦合到引线指106。虽然所示出的示例性IC器件100具有利用线接合连接108电耦合到引线指106的第一管芯102,但是所公开的实施例在这方面不受限制,并且可以使用其他类型的连接。举例来说,如下所述,第一管芯102可以包括FC接合焊盘,从而可以使用FC安装。在另一个实施例中,第一管芯102可以被面朝上安装,诸如当第一管芯102包括穿过基板的通孔(TSV)时就是如此。
可以通过提供一个或更多模塑层110或保护层(未示出)来保护第一管芯102和线接合连接108。举例来说,如图1A中所示,模塑层110可以封装第一管芯102以防止在(如下面关于图1B所描述的那样)将第二IC管芯114附着在引线框104的管芯焊盘105的另一侧期间或者在IC器件100的操作期间对第一管芯102和线接合连接108造成损坏。此外,可以通过提供一个或更多保护层来保护线接合连接108。举例来说,在沉积所述模塑料层之前,可以使用诸如硅酮材料之类的电介质材料来保护线接合连接108。
模塑层110还可以被形成在引线框104的管芯焊盘105的第二表面105b(例如底表面)上,正如图1B中所示的IC器件100的底视图中所示出的那样。利用一种或更多种粘合剂材料将包括其上形成的至少一个传感器113的第二IC管芯112附着到管芯焊盘105的第二表面105b上。管芯焊盘105的第二(例如底)表面105b处在管芯焊盘105的相对于在其中附着第一管芯102的第一(例如顶)表面105a的相对侧。此外,第二管芯112可以被放置在第二表面105b上,从而使得第一管芯102与第二管芯112的区域重叠,以减小IC器件100的最小总占用空间。举例来说,如图1A和1B中所示,由于第一管芯102的面积大于第二管芯112,因此可以由第一管芯102的面积来设定IC器件100的最小占用空间,而不是由管芯102与112的面积之和来设定。
此外,如图1B中所示,可以利用一个或更多线接合连接114将第二管芯112电耦合到引线框104的引线指106。传感器113被示为包括提供传感器输出的接合焊盘113a和113b。如图1B中所示,传感器输出113a和113b通过接合线114耦合到引线指106。传感器输出113a和113b与第一管芯102上的各器件之间的耦合通常是通过把传感器输出113a和113b连接到与第一管芯102上的器件输入相耦合(诸如与第一管芯102上的模拟到数字转换器(ADC)相耦合(图1A和1B中未示出ADC))的引线指而实现的。
虽然所述示例性IC器件100被示为具有利用线接合连接而电耦合到引线指106的第二管芯112,但是如前面所公开的那样,所公开的实施例在这方面不受限制,并且可以使用其他类型的连接。举例来说,在其他实施例中,第二管芯112和引线框104可以被配置成利用FC或扁平封装式设置或者面朝上设置来电耦合第二管芯112与引线框104,正如下面进一步描述的那样。可以通过在线接合连接114的至少部分上提供一个或更多保护层116来保护线接合连接114。举例来说,如果使用金线接合技术,则可以使用诸如硅酮材料之类的电介质材料来保护引线框104上的接点(bond)。正如现有技术中已知的那样,对于金线接合,构成第二管芯112上的连接的金通常可以抵抗影响可靠性的腐蚀。
一般来说,为了允许第二管芯112上的传感器113正确地操作,通常不把模塑层110形成在第二表面105b的其中安装传感器113的区域上方。举例来说,在湿度传感器的情况下,在操作中将传感器113暴露于局部周围环境以生成感测信号。因此,模塑层110可以被配置成提供空腔(即间隙)118以用于把第二管芯112上的传感器113暴露于周围环境。在某些实施例中,如图1B中所示,空腔118可以在第二表面105b的所述区域上方延伸以便允许后来放置第二管芯112,正如下面关于图2A-2F所描述的那样。
模塑层110可以被单独形成在管芯焊盘105或其他管芯附着表面的第一侧105a和第二侧105b上。但是在其他实施例中,模塑料层110可以是从而一体形成在封装基板的两侧的单层。这种配置可以减少组装IC器件100所需的步骤的数目。此外,这种配置可以允许使用捡放方法来形成IC器件100。下面将关于图2A-2F示出这样的过程流。
图1C是根据另一个所公开的实施例的示例性IC器件180的侧视图描绘,其包括多层PCB基板160,所述基板包括电介质层161和金属层162。第一管芯102被示为专用集成电路(ASIC)102,其包括信号处理器103、ADC 122、用于存储校准算法和温度补偿算法的存储器电路123以及用于提供数字化的经处理的感测信号(诸如经处理的湿度信号)的数字输出124。通孔连接131被示为用于把第二管芯112上的传感器113的接合焊盘113a电耦合到ASIC芯片102上的ADC 122,并且提供共同系统接地(GND)。球167(例如焊锡球)被示为用于把IC器件189安装并且电耦合到另一个PCB或另一个基板表面上。
图2A-2F示出了对于图1A和1B中所示的示例性IC器件100的各中间组装步骤的结果。如图2A中所示,可以提供封装基板薄片,诸如引线框薄片200,其包括在图1A和1B中被显示为多个引线框104的多个所附着的封装基板。虽然图2A中所示的引线框薄片200仅示出了6个引线框104实例,但是所公开的实施例在这方面不受限制。在某些实施例中,引线框薄片200通常可以包括任意数目的封装基板(诸如引线框104)实例。此外,虽然图2A-2F把引线框薄片200示为被配置成用于形成4引线单列直插式封装(SIP 4)或者8引线双列直插式封装(DIP 8),但是正如前面所提到的那样,所公开的实施例在这方面不受限制。
一旦提供了引线框薄片200之后,可以把第一管芯102附着并接合到每一个引线框104,其结果在图2B中示出并且在前面关于图1A进行了描述。可以手动或者利用自动化工具(诸如捡放工具)来执行这样的附着和接合。一旦把第一管芯102附着(即联结)到引线框薄片200上的每一个引线框104之后,可以把模塑层110施加到引线框薄片200上。具体来说,可以把模塑层110施加到引线框薄片200的第一表面200a上,以封装每一个第一管芯102实例,正如在图2C中示出并且在前面关于图1A所描述的那样。
此外,如图2D中所示,可以把模塑层110同时或单独施加到引线框薄片200的第二表面200b上。但是由于尚未把第二管芯112的实例附着到引线框薄片200,因此所述模塑层110被配置成在第二表面200b上的管芯焊盘区域中形成针对每一个引线框104实例的空腔(即间隙)118(正如前面关于图1B中所描述的那样),以用于把第二管芯112附着并电耦合到每一个管芯焊盘105的第二表面105b。
第二管芯112可以被附着并接合到每一个管芯焊盘105,正如图2E中所示并且在前面关于图1B所描述的那样。可以手动或者利用自动化工具(诸如捡放工具)来执行这样的附着和接合。引线框薄片200可以被剔除并修整,以从所述引线框薄片200形成并分隔开各IC器件100实例。在某些实施例中,随后可以把遮罩202附着在空腔118上方以达到第二表面200b上的模塑层110,以保护每一个第二管芯202实例,正如图2F中所示出的那样。在这些实施例中,可以利用多种技术来附着这种遮罩202,其中包括焊接和粘合剂。
可以以多种配置提供用于所述IC器件的遮罩202。在图3中示出了示例性遮罩300的顶部透视图。遮罩300可以被配置成在模塑层空腔302的某一区域上方延伸。此外,如图3中所示,遮罩300可以包括至少一个穿透区域304以用于把处在所述空腔302中的传感器(未示出)暴露于周围环境或者提供对于所述传感器的接进。这里关于传感器所使用的术语“接进”指的是把所述传感器充分暴露于将为之测量所述物理参数的环境。相应地,取决于物理参数的类型,接进可以是直接的或间接的。
在某些实施例中,穿透区域304可以位于空腔302中的传感器的正上方。但是在其他实施例中,空腔302中的传感器和可以包括孔口的所述穿透区域不需要对准。举例来说,在空腔302中是湿度传感器的情况下,所述传感器不需要具有穿过穿透区域304的直接视线,这与光学传感器的情况不同。在某些所公开的实施例中,不需要遮罩300中的穿透区域304来提供对空腔302中的传感器的接进。举例来说,可以简单地通过提供一个无法覆盖整个空腔302的遮罩300来形成孔口。备选地,所述遮罩300可以包括多个部分,从而使得当被放置在空腔302上方时,所述多个部分无法完全覆盖空腔302并且因此提供孔口。
在某些实施例中,可以关于所感兴趣的参数(诸如用以保护空腔302中的传感器的孔口)把保护层306放置在穿透区域304之上或其中。举例来说,在放置在空腔302中的湿度传感器或其他水分敏感传感器器件的情况下,为了防止水进入空腔302并影响传感器操作,保护层306可以是用于阻挡水的过滤器。这样的过滤器可以用已知的疏水过滤材料制成,从而防止较大的水滴进入空腔302,但是诸如包含水分(例如水蒸汽)的空气之类的气体仍然可以自由进入空腔302并且允许进行可靠的湿度测量。但是所公开的实施例不限于仅仅适于进行湿度测量的遮罩。在其他实施例中,遮罩300和穿透区域304中的保护层306可以被适配成用于其他测量。举例来说,在光学测量的情况下,保护层306可以包括一个或更多滤光器以便于传感器操作。
如前所述,在某些实施例中,具有传感器的IC可以包括FC接合焊盘,并且封装基板可以包括被配置成形成与所述FC接合焊盘的联结(例如居间的焊锡)的接地焊盘(land pad)而不是线接合连接。举例来说,在包括设置在与铂电极相互作用的热固聚合物中的电容性管芯的湿度传感器的情况下,电容性管芯的接合焊盘可以位于所述电容性管芯的第一表面上,并且所述湿度感测聚合物可以位于所述电容性管芯的相对侧。线接合的消除可以改进针对潜在污染的保护并且限制封装基板/管芯接合损坏。在图4A中示出了用于附着FC管芯的示例性引线框。
图4A示出了根据所公开的实施例的示例性IC器件400的底视图,其包括用于附着第二管芯的FC焊盘,所述第二管芯包括形成在其上的至少一个传感器。如图4A中所示,IC器件400可以与图1A和1B中所示的IC器件100类似地形成,除了图4A中的相应管芯被布置在封装基板上,从而虽然相应的管芯并不彼此重叠,但是其相应的接合区域却重叠,正如图4A中所示的第一IC管芯线接合区域421所例示的那样。IC器件400包括引线框404(其包括管芯焊盘405和引线指406)、用虚线示出以表明安装在用接合线408连接到引线指406的管芯焊盘405的顶侧的第一管芯402(从而在所提供的底视图中不可见)以及封装第一IC管芯402并且形成用于附着包括传感器的IC管芯的空腔418的模塑层410。在图4A所示的配置中,引线框404包括第一和第二FC接地焊盘420、422以用于把包括传感器413的第二管芯412的第一和第二端子附着到引线框404的另一侧(例如顶侧)。
图4B示出了在把包括至少一个传感器413的第二管芯412附着在图4A中所示的FC芯片接地焊盘420和422上方之后的IC器件400的底视图。第二管芯412的接合区域处在FC接地焊盘420和422(对于FC接地焊盘420和422参见图4A)上方的第二管芯412下方,从而处于第二管芯412下方的所述接合区域与第一管芯402的接合区域421重叠。虽然在图4A中仅仅示出了两个FC接地焊盘420和422,但是所公开的实施例没有这样的限制。在所示出的设置中,可以在通常不影响传感器413的操作的情况下使污染和线接合损坏的量最小化。此外,由于不需要线连接以把传感器413通过引线框404的FC芯片接地焊盘420和422直接连接到第一管芯402,因此这种方法可以提高传感器413的可靠性,并且导致可以适用于更严苛的化学环境或者更极端的天气的IC器件400。
前面所描述的示例性IC器件包括两个IC管芯,其中包括传感器的IC管芯处在封装基板的相对侧上并且朝向关于提供信号处理的IC管芯(诸如ASIC管芯)的相反方向。但是所公开的实施例在这方面不受限制。在某些所公开的实施例中,所述包括传感器的管芯和处理(例如ASIC)管芯可以处在封装基板的相对侧上并且全都朝向相同的方向而不会影响传感器的操作。也就是说,传感器可以朝向封装基板,并且可以通过所述封装基板和该封装基板的第一表面上的模塑料层中的一个或更多穿透区域进行操作。下面将关于图5A-5D描述这种IC器件的示例性设置。
图5A-5E示出了根据所公开的实施例的针对示例性IC器件的各中间组装步骤处的结果,所述IC器件包括引线框、包括传感器的管芯和包括处理器的管芯以及模塑料孔口。图5A示出了在安装传感器之前的IC器件500的顶视图。正如图5A中所示并且在前面关于图1A-1B中的IC器件100所描述的那样但是在将管芯焊盘505与引线指506隔离之前,IC器件500被示为包括带有管芯焊盘505和引线指506的引线框504、利用接合线508安装在管芯焊盘505的第一表面505a上的第一管芯502。在图5A中所示的IC器件500中,引线框504还包括用于附着包括传感器的第二管芯的第一和第二端子的第一和第二FC焊盘520、522。如图5A中所示,引线框504包括至少一个引线框孔口524(例如没有引线框金属的区域)。所述孔口524可以被用来提供对安装在引线框504的第二表面上的传感器的接进,正如下面描述的那样。正如前面关于图1A和1B中的IC器件100所描述的那样,在IC器件500中还可以包括封装第一管芯502的模塑层510。但是为了提供对安装在所述引线框的第二表面上的传感器的接进,模塑层510还可以包括与引线框孔口524的至少一部分重叠的至少一个模塑料孔口526,正如图5B中所示出的那样。正如前面关于图1B所描述并且如图5C中所示出的那样,引线框504的第二表面505a上的模塑层510可以被配置成提供用于在其中安装第二管芯的空腔518(参见图5C)。
图5C示出了在安装第二管芯512之前的IC器件500的底视图。如图5C中所示,空腔518可以被形成使得所述孔口不被模塑层510遮蔽。在图5A-5C中,引线框孔口524和模塑孔口526被示为具有近似相同的尺寸。但是所公开的实施例在这方面不受限制,并且孔口524和526可以具有不同的尺寸,前提是其重叠部分提供用以接进空腔518中的传感器的足够大的面积。此外,正如前面关于图3所描述的那样,可以使用引线框孔口524、模塑料孔口526或二者中的一个或更多保护层来保护空腔518中的传感器。看到引线框504包括FC焊盘520和522。
图5D示出了在空腔518内安装第二管芯512之后的IC器件500的底视图,其中使得第二管芯512被安装在FC焊盘520和522上方并与之接合,并且还被安装在引线框孔口524上方。其结果是,第二管芯被安装在第一管芯502的占用空间内,所述第一管芯502被安装在管芯焊盘505的另一侧。如图5D中所示,第二管芯512可以包括安装在管芯焊盘505的第二表面505b上的至少一个传感器513,从而可以通过孔口524和526从第一表面505a(与第二表面505b相对)接进传感器513(例如以从中感测局部周围环境)。也就是说,传感器513被安装成朝向引线框504的第二表面505b,并且被放置在孔口524和526正上方。但是所公开的实施例在这方面不受限制。举例来说,在湿度传感器的情况下,传感器513只需要可以接进周围环境。因此,在这样的实施例中,传感器513可以朝向第二表面505b并且位于远离孔口524和526而仍然提供可靠的测量。在安装了第二管芯512之后,可以把遮罩520附着到模塑层510以封闭所述空腔,正如图5E中所示出的那样。在这样的实施例中,在遮罩520上不需要孔口来提供对传感器的接进。但是所公开的实施例在这方面不受限制。在某些实施例中,第二管芯512可以包括处于其两侧(即顶侧和低侧)的传感器。因此,为了提供对传感器的接进,可以在遮罩520中提供一个或更多穿透区域(诸如孔口),正如前面所描述的那样。
通过在这里所公开的IC器件中提供包括传感器的管芯与包括处理器的管芯的高度集成,获得几个优点。举例来说,传感器与处理电子装置的紧邻通过改进的信噪比和带宽而大大提高信号质量。
前面描述的IC可以由半导体基板形成,所述半导体基板可以包括其中的各元件和/或其上的各层。这些可以包括:势垒层,其他电介质层,器件结构,包括源极区、漏极区,位线,基极,发射极,集电极,导线,导电通孔等等的有源元件和无源元件。此外,所公开的实施例及其等效方案可以被使用在多种工艺中,包括双极型、CMOS、BiCMOS以及MEMS。
虽然前面描述了所公开的各实施例,但是应当理解的是,所述实施例仅仅是通过举例的方式给出的,而不是为了进行限制。在不背离这里所公开的精神或范围的情况下,根据这里的公开内容可以对所公开的实施例做出许多改变。从而,所公开的实施例的广度和范围不应当受到前面所描述的任一个实施例的限制。相反,所公开的实施例的范围应当根据所附权利要求书及其等效表述进行限定。
虽然关于一种或更多种实现方式说明并描述了所公开的实施例,但是在阅读并理解了本说明书和附图之后,本领域技术人员将会想到等效的更改和修改。此外,虽然可能仅仅关于几种实现方式的一种公开了具体特征,但是如对于任何给定的且具体的应用可能期望和有利的,将这种特征与其他实现方式的一个或更多其他特征相组合。
这里所使用的术语只是为了描述具体实施例,而不意图限制所公开的实施例或其等效方案。除非上下文清楚地另有所指,否则这里所使用的“一个”、“所述”也意图包括复数。此外,就在详细说明书和/或权利要求书中所使用的术语“包含”、“具有”、“带有”或其变型而言,这些术语意图是以与术语“包括”类似的方式是包含性的。
除非另行定义,否则这里所使用的所有术语(包括技术术语和科学术语)的含义与所公开的实施例所属的领域内的技术人员通常所理解的含义相同。还将理解的是,诸如在常用的词典中所定义的术语的含义应当被解释为与其在相关领域的情境中的含义一致,并且除非在这里明确定义,否则不应按照理想化的或者过于正式的意义来对其进行解释。
Claims (13)
1. 一种集成电路(IC)器件(100),包括:
包括管芯焊盘(105)和多个引线指(106)的引线框(104),所述管芯焊盘(105)具有第一(105(a))和第二相对表面(105(b));
被安装在所述管芯焊盘的所述第一表面上的包括信号处理器(103)的第一管芯(102),以及被安装在所述管芯焊盘的所述第二表面上的第二管芯(112),其中所述第二管芯包括至少一个传感器(113),所述传感器感测至少一个非电参数并且具有提供感测信号的至少一个传感器输出(113(a)),
其中所述传感器输出耦合到所述信号处理器,并且其中所述第一管芯对所述感测信号进行处理。
2. 权利要求1的IC器件,其中所述第二管芯(112)和所述第一管芯(102)至少部分地彼此重叠。
3. 权利要求1的IC器件,其中所述传感器(113)包括操作来感测湿度的湿度传感器,并且所述感测信号包括湿度感测信号。
4. 权利要求3的IC器件,其中所述湿度传感器包括电容性湿度传感器,并且所述引线框(104)包括用于允许气流到达所述电容性湿度传感器的引线框孔口(524)。
5. 权利要求1的IC器件,其中所述引线框包括多个倒装芯片接地焊盘(420,422),并且其中所述第二管芯被安装在所述倒装芯片接地焊盘上方。
6. 权利要求4的IC器件,还包括:
所述引线框上的至少一个模塑层(510),所述第一表面上的所述模塑层至少处在所述第一管芯上方并且在所述第二表面上定义用于所述第二管芯的空腔(518);以及
用于覆盖所述空腔的至少一部分的遮罩(520),
其中所述模塑层、所述引线框和所述遮罩中的至少一个定义至少一个孔口(526)以提供对所述电容性湿度传感器的所述气流接进。
7. 一种用于制造集成电路(IC)器件的方法,包括:
提供包括管芯焊盘(105)和多个引线指(106)的引线框(104),所述管芯焊盘(105)具有第一(105(a))和第二相对表面(105(b));
把包括信号处理器(103)的第一管芯(102)附着到所述引线框的所述第一表面;以及
把包括至少一个传感器(113)的第二管芯(112)附着到所述引线框的所述第二表面,其中所述传感器具有至少一个传感器输出(113(a)),其感测至少一个非电参数并且提供所述参数的感测信号,
其中所述第一管芯耦合到所述信号处理器以接收并处理所述感测信号。
8. 权利要求7的方法,其中所述传感器(113)包括化学或生化传感器。
9. 权利要求7的方法,其中所述传感器(113)包括湿度传感器。
10. 权利要求9的方法,其中所述湿度传感器包括电容性湿度传感器。
11. 权利要求7的方法,其中所述第二管芯(112)和所述第一管芯(102)至少部分地彼此重叠。
12. 权利要求9的方法,还包括:
在所述附着所述第一管芯之前,在所述引线框上形成至少一个模塑层(510),所述形成包括:
在至少所述第一管芯上方把所述模塑层沉积在所述第一表面上;以及
把所述模塑层沉积在所述第二表面上以形成空腔(518),所述空腔定义所述第二表面的用于所述第二管芯到所述引线框的所述耦合的区域。
13. 权利要求11的方法,还包括把遮罩(520)附着到所述第二表面上的所述模塑层以覆盖所述空腔的至少一部分。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10763108P | 2008-10-22 | 2008-10-22 | |
US61/107631 | 2008-10-22 | ||
US12/580,968 US8115286B2 (en) | 2008-10-22 | 2009-10-16 | Integrated sensor including sensing and processing die mounted on opposite sides of package substrate |
US12/580968 | 2009-10-16 | ||
PCT/US2009/061212 WO2010048102A2 (en) | 2008-10-22 | 2009-10-20 | Integrated sensor including sensing and processing die mounted on opposite sides of package substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102257614A true CN102257614A (zh) | 2011-11-23 |
CN102257614B CN102257614B (zh) | 2015-09-02 |
Family
ID=42119919
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200980151689.5A Active CN102257614B (zh) | 2008-10-22 | 2009-10-20 | 包括安装在封装基板的相对侧的感测和处理管芯的集成传感器 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8115286B2 (zh) |
EP (1) | EP2342747B1 (zh) |
CN (1) | CN102257614B (zh) |
AU (1) | AU2009307832B2 (zh) |
WO (1) | WO2010048102A2 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106662476A (zh) * | 2014-07-30 | 2017-05-10 | 日立汽车系统株式会社 | 物理量检测装置 |
CN111029323A (zh) * | 2018-10-09 | 2020-04-17 | 恩智浦有限公司 | 使用模制带的顶部包封封装 |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8492720B2 (en) * | 2010-06-08 | 2013-07-23 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Small low-profile optical proximity sensor |
US8742350B2 (en) | 2010-06-08 | 2014-06-03 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Proximity sensor |
IT1403433B1 (it) * | 2010-12-27 | 2013-10-17 | St Microelectronics Srl | Sensore magnetoresistivo con capacita' parassita ridotta, e metodo |
IT1403434B1 (it) | 2010-12-27 | 2013-10-17 | St Microelectronics Srl | Sensore di campo magnetico avente elementi magnetoresistivi anisotropi, con disposizione perfezionata di relativi elementi di magnetizzazione |
US9209121B2 (en) * | 2013-02-01 | 2015-12-08 | Analog Devices, Inc. | Double-sided package |
US9041220B2 (en) | 2013-02-13 | 2015-05-26 | Qualcomm Incorporated | Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device |
EP3198754B1 (en) * | 2014-09-24 | 2018-11-07 | Dac System SA | Failure detection system of transmitting antennas |
US9731959B2 (en) | 2014-09-25 | 2017-08-15 | Analog Devices, Inc. | Integrated device packages having a MEMS die sealed in a cavity by a processor die and method of manufacturing the same |
US9533878B2 (en) | 2014-12-11 | 2017-01-03 | Analog Devices, Inc. | Low stress compact device packages |
CN109417041A (zh) * | 2016-02-01 | 2019-03-01 | 欧克特沃系统有限责任公司 | 用于制造电子器件的系统和方法 |
US9952110B2 (en) * | 2016-03-29 | 2018-04-24 | Infineon Technologies Ag | Multi-die pressure sensor package |
US20170287757A1 (en) * | 2016-03-30 | 2017-10-05 | Robert F. Kwasnick | Damage monitor |
KR102520038B1 (ko) * | 2018-01-10 | 2023-04-12 | 삼성전자주식회사 | 가스 센서 패키지 및 이를 포함하는 센싱 장치 |
US11296005B2 (en) | 2019-09-24 | 2022-04-05 | Analog Devices, Inc. | Integrated device package including thermally conductive element and method of manufacturing same |
US11698307B2 (en) * | 2019-12-31 | 2023-07-11 | Texas Instruments Incorporated | Methods and apparatus to trim temperature sensors |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5523608A (en) * | 1992-09-01 | 1996-06-04 | Sharp Kabushiki Kaisha | Solid state imaging device having a solid state image sensor and its peripheral IC mounted on one package |
US6401545B1 (en) * | 2000-01-25 | 2002-06-11 | Motorola, Inc. | Micro electro-mechanical system sensor with selective encapsulation and method therefor |
US6683370B1 (en) * | 2003-04-15 | 2004-01-27 | Motorola, Inc. | Semiconductor component and method of manufacturing same |
US20050146000A1 (en) * | 2003-10-01 | 2005-07-07 | Woojin Kim | Surface mount package and method for forming multi-chip microsensor device |
CN1841728A (zh) * | 2005-03-30 | 2006-10-04 | 三洋电机株式会社 | 半导体模块及其制造方法 |
US20070164402A1 (en) * | 2006-01-17 | 2007-07-19 | Advanced Semiconductor Engineering Inc. | Semiconductor package and process for making the same |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000329632A (ja) * | 1999-05-17 | 2000-11-30 | Toshiba Chem Corp | 圧力センサーモジュール及び圧力センサーモジュールの製造方法 |
US6300670B1 (en) * | 1999-07-26 | 2001-10-09 | Stmicroelectronics, Inc. | Backside bus vias |
DE10231385B4 (de) * | 2001-07-10 | 2007-02-22 | Samsung Electronics Co., Ltd., Suwon | Halbleiterchip mit Bondkontaktstellen und zugehörige Mehrchippackung |
US6798057B2 (en) * | 2002-11-05 | 2004-09-28 | Micron Technology, Inc. | Thin stacked ball-grid array package |
US6861288B2 (en) * | 2003-01-23 | 2005-03-01 | St Assembly Test Services, Ltd. | Stacked semiconductor packages and method for the fabrication thereof |
US7368320B2 (en) * | 2003-08-29 | 2008-05-06 | Micron Technology, Inc. | Method of fabricating a two die semiconductor assembly |
US7816775B2 (en) * | 2004-09-09 | 2010-10-19 | United Test And Assembly Center Limited | Multi-die IC package and manufacturing method |
JP2006186282A (ja) * | 2004-12-28 | 2006-07-13 | Nec Electronics Corp | 半導体装置およびその製造方法 |
TWI270190B (en) * | 2005-09-29 | 2007-01-01 | Siliconware Precision Industries Co Ltd | Lead frame structure and package for integrating the same |
US7511371B2 (en) * | 2005-11-01 | 2009-03-31 | Sandisk Corporation | Multiple die integrated circuit package |
JP4674529B2 (ja) * | 2005-11-07 | 2011-04-20 | 株式会社デンソー | 湿度センサ装置及びその製造方法 |
US7986043B2 (en) * | 2006-03-08 | 2011-07-26 | Stats Chippac Ltd. | Integrated circuit package on package system |
TW200847385A (en) * | 2007-05-18 | 2008-12-01 | Chipmos Technologies Inc | Chip-on-lead and lead-on-chip stacked structure |
JP5036409B2 (ja) * | 2007-05-31 | 2012-09-26 | ラピスセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
US7763493B2 (en) * | 2007-06-26 | 2010-07-27 | Stats Chippac Ltd. | Integrated circuit package system with top and bottom terminals |
US8455988B2 (en) * | 2008-07-07 | 2013-06-04 | Stats Chippac Ltd. | Integrated circuit package system with bumped lead and nonbumped lead |
-
2009
- 2009-10-16 US US12/580,968 patent/US8115286B2/en not_active Expired - Fee Related
- 2009-10-20 AU AU2009307832A patent/AU2009307832B2/en not_active Ceased
- 2009-10-20 EP EP09822514.7A patent/EP2342747B1/en not_active Not-in-force
- 2009-10-20 CN CN200980151689.5A patent/CN102257614B/zh active Active
- 2009-10-20 WO PCT/US2009/061212 patent/WO2010048102A2/en active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5523608A (en) * | 1992-09-01 | 1996-06-04 | Sharp Kabushiki Kaisha | Solid state imaging device having a solid state image sensor and its peripheral IC mounted on one package |
US6401545B1 (en) * | 2000-01-25 | 2002-06-11 | Motorola, Inc. | Micro electro-mechanical system sensor with selective encapsulation and method therefor |
US6683370B1 (en) * | 2003-04-15 | 2004-01-27 | Motorola, Inc. | Semiconductor component and method of manufacturing same |
US20050146000A1 (en) * | 2003-10-01 | 2005-07-07 | Woojin Kim | Surface mount package and method for forming multi-chip microsensor device |
CN1841728A (zh) * | 2005-03-30 | 2006-10-04 | 三洋电机株式会社 | 半导体模块及其制造方法 |
US20070164402A1 (en) * | 2006-01-17 | 2007-07-19 | Advanced Semiconductor Engineering Inc. | Semiconductor package and process for making the same |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106662476A (zh) * | 2014-07-30 | 2017-05-10 | 日立汽车系统株式会社 | 物理量检测装置 |
CN111029323A (zh) * | 2018-10-09 | 2020-04-17 | 恩智浦有限公司 | 使用模制带的顶部包封封装 |
CN111029323B (zh) * | 2018-10-09 | 2022-10-14 | 恩智浦有限公司 | 使用模制带的顶部包封封装 |
Also Published As
Publication number | Publication date |
---|---|
EP2342747A4 (en) | 2013-09-04 |
CN102257614B (zh) | 2015-09-02 |
US20100133629A1 (en) | 2010-06-03 |
EP2342747A2 (en) | 2011-07-13 |
EP2342747B1 (en) | 2018-09-05 |
WO2010048102A3 (en) | 2010-07-22 |
WO2010048102A2 (en) | 2010-04-29 |
AU2009307832A1 (en) | 2010-04-29 |
US8115286B2 (en) | 2012-02-14 |
AU2009307832B2 (en) | 2014-09-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102257614B (zh) | 包括安装在封装基板的相对侧的感测和处理管芯的集成传感器 | |
US9105479B2 (en) | Integrated circuit including an environmental sensor | |
CN101217156B (zh) | 电子元件与cmos图像传感器的芯片级封装及制造方法 | |
US9324586B2 (en) | Chip-packaging module for a chip and a method for forming a chip-packaging module | |
US20070188054A1 (en) | Surface acoustic wave packages and methods of forming same | |
EP1357605A1 (en) | Image sensor semiconductor package with castellation | |
US6833287B1 (en) | System for semiconductor package with stacked dies | |
US20030201535A1 (en) | Image sensor semiconductor package | |
JP2001516956A (ja) | 透明な封入剤を用いた集積回路パッケージ及びそのパッケージの製造方法 | |
US9478517B2 (en) | Electronic device package structure and method of fabricating the same | |
EP2230507A1 (en) | Humidity or gas sensor | |
CN102760816A (zh) | 发光二极管封装结构及其制造方法 | |
TWI662695B (zh) | 晶圓級晶片尺寸封裝結構 | |
EP3206027A1 (en) | Sensor chip comprising electrostatic discharge protection element | |
TW201349414A (zh) | 具微機電元件之封裝結構及其製法 | |
TWI538113B (zh) | 微機電晶片封裝及其製造方法 | |
CN107611147B (zh) | 多芯片塑胶球状数组封装结构 | |
US20060097405A1 (en) | IC chip package and method for packaging same | |
CN105720019B (zh) | 具有盖帽的图像感测装置和相关方法 | |
EP2884242B1 (en) | Sensor Package And Manufacturing Method | |
US8153976B2 (en) | Infrared sensor and manufacturing method thereof | |
US20050258216A1 (en) | Packaging for optoelectronic devices | |
US20080061409A1 (en) | Micro electro-mechanical system module package | |
US7345356B2 (en) | Optical package with double formed leadframe | |
CN117142424A (zh) | 一种mems光电传感器的封装结构及其制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |