CN102257573B - 错误检测方法和包括一个或多个存储器设备的系统 - Google Patents

错误检测方法和包括一个或多个存储器设备的系统 Download PDF

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Publication number
CN102257573B
CN102257573B CN200980151271.4A CN200980151271A CN102257573B CN 102257573 B CN102257573 B CN 102257573B CN 200980151271 A CN200980151271 A CN 200980151271A CN 102257573 B CN102257573 B CN 102257573B
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CN
China
Prior art keywords
error
command
packet
memory devices
semiconductor memory
Prior art date
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Expired - Fee Related
Application number
CN200980151271.4A
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English (en)
Chinese (zh)
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CN102257573A (zh
Inventor
P·吉利厄姆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nova Chip Canada Co
Original Assignee
Examine Vincent Zhi Cai Management Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/418,892 external-priority patent/US8880970B2/en
Application filed by Examine Vincent Zhi Cai Management Co filed Critical Examine Vincent Zhi Cai Management Co
Publication of CN102257573A publication Critical patent/CN102257573A/zh
Application granted granted Critical
Publication of CN102257573B publication Critical patent/CN102257573B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38Response verification devices
    • G11C29/42Response verification devices using error correcting codes [ECC] or parity check
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1016Error in accessing a memory location, i.e. addressing error
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0411Online error correction

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
  • Memory System (AREA)
CN200980151271.4A 2008-12-18 2009-12-10 错误检测方法和包括一个或多个存储器设备的系统 Expired - Fee Related CN102257573B (zh)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US13857508P 2008-12-18 2008-12-18
US61/138575 2008-12-18
US14014708P 2008-12-23 2008-12-23
US61/140147 2008-12-23
US12/418892 2009-04-06
US12/418,892 US8880970B2 (en) 2008-12-23 2009-04-06 Error detection method and a system including one or more memory devices
PCT/CA2009/001777 WO2010069045A1 (en) 2008-12-18 2009-12-10 Error detection method and a system including one or more memory devices

Publications (2)

Publication Number Publication Date
CN102257573A CN102257573A (zh) 2011-11-23
CN102257573B true CN102257573B (zh) 2014-11-05

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN200980151271.4A Expired - Fee Related CN102257573B (zh) 2008-12-18 2009-12-10 错误检测方法和包括一个或多个存储器设备的系统

Country Status (6)

Country Link
EP (1) EP2359372B1 (cg-RX-API-DMAC7.html)
JP (2) JP5753988B2 (cg-RX-API-DMAC7.html)
KR (1) KR101687038B1 (cg-RX-API-DMAC7.html)
CN (1) CN102257573B (cg-RX-API-DMAC7.html)
TW (1) TWI517174B (cg-RX-API-DMAC7.html)
WO (1) WO2010069045A1 (cg-RX-API-DMAC7.html)

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CN104813409A (zh) * 2012-09-28 2015-07-29 惠普发展公司,有限责任合伙企业 在存储器错误检测和存储器错误校正之间动态选择
KR20170086345A (ko) * 2016-01-18 2017-07-26 에스케이하이닉스 주식회사 메모리 칩 및 메모리 컨트롤러를 포함하는 메모리 시스템
CN107239363B (zh) * 2017-05-27 2020-04-24 北京东土军悦科技有限公司 一种ecc信息上报方法及系统
CN107134294B (zh) * 2017-05-27 2020-04-24 北京东土军悦科技有限公司 一种ecc信息获取方法及系统
KR102433098B1 (ko) 2018-02-26 2022-08-18 에스케이하이닉스 주식회사 어드레스 생성회로, 어드레스 및 커맨드 생성회로 및 반도체 시스템
US11200118B2 (en) 2019-08-29 2021-12-14 Micron Technology, Inc. Semiconductor device with modified command and associated methods and systems
US10963336B2 (en) 2019-08-29 2021-03-30 Micron Technology, Inc. Semiconductor device with user defined operations and associated methods and systems
US11042436B2 (en) 2019-08-29 2021-06-22 Micron Technology, Inc. Semiconductor device with modified access and associated methods and systems
KR102762245B1 (ko) 2020-01-20 2025-02-03 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 그것을 포함하는 메모리 시스템
JP7575955B2 (ja) * 2021-01-13 2024-10-30 キヤノン株式会社 制御装置、システム、リソグラフィ装置、物品の製造方法、制御方法及びプログラム
KR102867713B1 (ko) * 2021-04-07 2025-10-13 삼성전자주식회사 반도체 메모리 장치 및 이를 포함하는 메모리 시스템
US11822793B2 (en) 2022-04-04 2023-11-21 Western Digital Technologies, Inc. Complete and fast protection against CID conflict
CN119339751A (zh) * 2023-07-19 2025-01-21 美光科技公司 基于错误率的电压缩放

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US7143207B2 (en) * 2003-11-14 2006-11-28 Intel Corporation Data accumulation between data path having redrive circuit and memory device
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Also Published As

Publication number Publication date
KR20110103388A (ko) 2011-09-20
KR101687038B1 (ko) 2016-12-15
EP2359372A4 (en) 2017-06-21
TWI517174B (zh) 2016-01-11
CN102257573A (zh) 2011-11-23
EP2359372B1 (en) 2020-04-08
JP2015099598A (ja) 2015-05-28
JP5753988B2 (ja) 2015-07-22
TW201106369A (en) 2011-02-16
WO2010069045A1 (en) 2010-06-24
JP2012512467A (ja) 2012-05-31
EP2359372A1 (en) 2011-08-24

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