CN102254804A - Method for preparing trench type power MOS (Metal Oxide Semiconductor) transistor - Google Patents
Method for preparing trench type power MOS (Metal Oxide Semiconductor) transistor Download PDFInfo
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- CN102254804A CN102254804A CN2011102248900A CN201110224890A CN102254804A CN 102254804 A CN102254804 A CN 102254804A CN 2011102248900 A CN2011102248900 A CN 2011102248900A CN 201110224890 A CN201110224890 A CN 201110224890A CN 102254804 A CN102254804 A CN 102254804A
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Abstract
The invention relates to a method for preparing a trench type power MOS (Metal Oxide Semiconductor) transistor, comprising the following steps of: providing a substrate; implanting ions of first energy in a region to form a body on the substrate; and implanting ions of second energy in the region to form the body on the substrate, wherein the energy of the ions of the first energy is more than that of the ions of the second energy; and the ion injection depth of the second energy is near a source junction. The net concentration near the source junction in the body of the trench type power MOS transistor formed by using the method disclosed by the invention is increased so as to effectively inhibit leakage current between a source and a drain.
Description
Technical field
(metal-oxide-semiconductor, MOS) transistorized preparation method relate in particular to a kind of preparation method of tagma of groove type power MOS transistor to the present invention relates to a kind of groove (trench) type power (power) metal-oxide semiconductor (MOS).
Background technology
Traditional MOS transistor, its grid, source electrode and drain electrode be (horizontal channel) on same horizontal plane, this kind structure is very convenient during fabrication, but because of source electrode and the drain electrode between the distance too closely can't satisfy powerful demand.In order to satisfy the demand of high power transistor, the MOS transistor of vertical trench has appearred having, it has not only inherited advantages such as horizontal channel MOS transistor input impedance height, drive current be little, also has advantages such as withstand voltage height, operating current is big, power output is high, switching speed is fast.
The power MOS transistor of prior art generally includes the tagma (body) that is formed in the substrate, and is formed on source region (source) or drain region (drain) in the described tagma.Described tagma forms usually by the following method: a substrate is provided; Surface at described substrate forms the photoresist layer pattern; With described photoresist layer pattern is mask, and the zone in the tagma to be formed of described substrate is carried out ion and implanted (ion implant).Concrete, the energy of ions of implantation is 180Kev, concentration is 6.7*10
12/ cm
3
Because the tagma of the power MOS transistor of prior art is implanted by primary ions and is formed, therefore, near the source junction of MOS transistor hole concentration is lower, cause power MOS transistor source electrode and the drain electrode between leakage current IDSS bigger, as shown in Figure 1, the I-V curve of power MOS transistor forms tangible projection (hump).
Summary of the invention
The object of the present invention is to provide a kind of preparation method that can improve the groove type power MOS transistor of drain saturation current.
A kind of preparation method of groove type power MOS transistor is characterized in that, comprises the steps: to provide a substrate; The ion of first energy is implanted in zone in the tagma to be formed of described substrate; The ion of second energy is implanted in zone in the tagma to be formed of described substrate, and the energy of ions of described first energy is greater than the energy of ions of described second energy, and the degree of depth that the ion of described second energy injects is near the source junction of described MOS transistor.
As the preferred technique scheme, the ion of described first energy is identical with the ionic species of described second energy, and described ion is the boron ion.
As the preferred technique scheme, the concentration of the ion of described first energy equals the concentration of the ion of described second energy, and the concentration of described ion is 5.5*10
12/ cm
3
As the preferred technique scheme, the energy of ions of described first energy is 180Kev, and the energy of ions of described second energy is 55Kev.
Compared with prior art, the preparation method of groove type power MOS transistor of the present invention is when forming the tagma, carrying out two secondary ions injects, inject for the first time energy of ions greater than injecting for the second time energy of ions, and inject the degree of depth of ion near source junction for the second time, thereby make near the hole concentration of source region knot (source junction) in the described tagma increase, and then effectively suppressed the leakage current between source electrode and the drain electrode.
Description of drawings
Fig. 1 is a kind of I-V curve chart of power MOS transistor of prior art.
Fig. 2 is the preparation method's of a groove type power MOS transistor of the present invention flow chart.
Fig. 3 is hole (net) the concentration profile comparison diagram of the groove type power MOS transistor of the method formation of employing the present invention and prior art.
Fig. 4 is the I-V curve chart of the groove type power MOS transistor of employing method formation of the present invention.
Embodiment
The preparation method of groove type power MOS transistor of the present invention is when forming the tagma, carrying out two secondary ions injects, and inject energy of ions for the first time greater than injecting for the second time energy of ions, thereby make near the hole concentration of source junction in the described tagma increase, and then effectively suppressed the leakage current between source electrode and the drain electrode.For making the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing.
Fig. 2 is the preparation method's of a groove type power MOS transistor of the present invention flow process.The preparation method of groove type power MOS transistor of the present invention comprises the steps:
One substrate is provided, and described substrate can not repeat them here for various types of substrates of the prior art.Described substrate comprises the zone that is used to form the tagma.
The ion of first energy is implanted in zone in the tagma to be formed of described substrate.Preferably, the energy of ions of described first energy is 180Kev, and described ion is boron (B) ion, and the concentration of described ion is 5.5*10
12/ cm
3Concrete, before the ion of implanting described first energy, form the photoresist layer pattern on the surface of described substrate, be mask with described photoresist layer pattern, carry out ion to the zone in described substrate tagma to be formed and implant
The ion of second energy is implanted in zone in the tagma to be formed of described substrate, and the degree of depth that the ion of second energy injects should be near source junction, thereby makes near the source region knot in the described tagma hole concentration increase.The ion of described second energy is identical with the ionic species of described first energy, and the concentration of the ion of described second energy equals the concentration of the ion of described first energy.Preferably, the energy of ions of described second energy is 55Kev, and described ion is the boron ion, and the concentration of described ion is 5.5*10
12/ cm
3
Compared with prior art, the preparation method of groove type power MOS transistor of the present invention is when forming the tagma, carrying out two secondary ions injects, inject for the first time energy of ions greater than injecting for the second time energy of ions, and the degree of depth of injecting ion for the second time should be near source junction, thereby make near the hole concentration of source region knot in the described tagma increase, as shown in Figure 3.Fig. 3 is the hole concentration distribution curve comparison diagram of the groove type power MOS transistor of the method formation of employing the present invention and prior art, wherein, the hole concentration distribution curve of the groove type power MOS transistor of curve 31 expression prior aries, the hole concentration distribution curve of the groove type power MOS transistor of method formation of the present invention is adopted in curve 32 expressions, as seen from the figure, compared with prior art, groove type power MOS transistor of the present invention significantly increases in the regional hole concentration of source region knot, helps suppressing leakage current between source-drain electrode.Fig. 4 is the I-V curve chart of the groove type power MOS transistor that adopts method of the present invention and form, as seen from the figure, adopts the projection of I-V curve of the groove type power MOS transistor of method preparation of the present invention to disappear.
Under situation without departing from the spirit and scope of the present invention, can also constitute many very embodiment of big difference that have.Should be appreciated that except as defined by the appended claims, the invention is not restricted at the specific embodiment described in the specification.
Claims (7)
1. the preparation method of a groove type power MOS transistor is characterized in that, comprises the steps:
One substrate is provided;
The ion of first energy is implanted in zone in the tagma to be formed of described substrate;
The ion of second energy is implanted in zone in the tagma to be formed of described substrate, and the energy of ions of described first energy is greater than the energy of ions of described second energy, and the degree of depth that the ion of described second energy injects is near the source junction of described MOS transistor.
2. the preparation method of groove type power MOS transistor according to claim 1 is characterized in that, the ion of described first energy is identical with the ionic species of described second energy.
3. the preparation method of groove type power MOS transistor according to claim 2 is characterized in that, described ion is the boron ion.
4. the preparation method of groove type power MOS transistor according to claim 1 is characterized in that, the concentration of the ion of described first energy equals the concentration of the ion of described second energy.
5. the preparation method of groove type power MOS transistor according to claim 4 is characterized in that, the concentration of described ion is 5.5*10
12/ cm
3
6. the preparation method of groove type power MOS transistor according to claim 1 is characterized in that, the energy of ions of described first energy is 180Kev.
7. the preparation method of groove type power MOS transistor according to claim 1 is characterized in that, the energy of ions of described second energy is 55Kev.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011102248900A CN102254804A (en) | 2011-08-08 | 2011-08-08 | Method for preparing trench type power MOS (Metal Oxide Semiconductor) transistor |
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|---|---|---|---|
| CN2011102248900A CN102254804A (en) | 2011-08-08 | 2011-08-08 | Method for preparing trench type power MOS (Metal Oxide Semiconductor) transistor |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010048132A1 (en) * | 2000-05-30 | 2001-12-06 | Hiroyasu Ito | Semiconductor device and manufacturing method of the same |
| CN1638144A (en) * | 2003-12-25 | 2005-07-13 | 恩益禧电子股份有限公司 | Semiconductor apparatus and method for manufacturing the same |
| CN1983597A (en) * | 1997-11-14 | 2007-06-20 | 费查尔德半导体有限公司 | Field effect transistor and method of its manufacture |
-
2011
- 2011-08-08 CN CN2011102248900A patent/CN102254804A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1983597A (en) * | 1997-11-14 | 2007-06-20 | 费查尔德半导体有限公司 | Field effect transistor and method of its manufacture |
| US20010048132A1 (en) * | 2000-05-30 | 2001-12-06 | Hiroyasu Ito | Semiconductor device and manufacturing method of the same |
| CN1638144A (en) * | 2003-12-25 | 2005-07-13 | 恩益禧电子股份有限公司 | Semiconductor apparatus and method for manufacturing the same |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140430 |
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Effective date of registration: 20140430 Address after: 201203 Shanghai Zhangjiang hi tech park Zuchongzhi Road No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 818 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
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Application publication date: 20111123 |