CN102253914B - Data transmitting and processing method and device and equipment interface - Google Patents
Data transmitting and processing method and device and equipment interface Download PDFInfo
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- CN102253914B CN102253914B CN201110149950.7A CN201110149950A CN102253914B CN 102253914 B CN102253914 B CN 102253914B CN 201110149950 A CN201110149950 A CN 201110149950A CN 102253914 B CN102253914 B CN 102253914B
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Abstract
The invention provides a data transmitting and processing method and device and an equipment interface. The method comprises the following steps of: verifying data returned after being processed through a level switch chip and data received from a processor; carrying out switching or inverse control processing on a data path according to a verified result; and transmitting the data through the data path subjected to control processing. The device comprises a signal comparison unit and a data path selection unit, wherein the signal comparison unit is used for verifying the data returned after being processed by the level switch chip and the data received from the processor; and the data path selection unit is used for carrying out control processing on the data path according to the verified result and transmitting the data through the data path subjected to control processing. The embodiment of the invention also provides the equipment interface. According to the invention, the troubles brought to users due to difference of network cables are reduced.
Description
Technical field
The present invention relates to the communication technology, relate in particular to a kind of data transmission processing method, device and equipment interface.
Background technology
In common communication apparatus design, its management interface is all to adopt serial ports design, and the external-connected port of this serial ports adopts the most frequently used RJ45 network interface, and this serial ports can receive respectively or send data by 2 pairs of differential lines in 4 pairs of twisted-pair feeders of netting twine.Conventionally, the serial ports inside of communication apparatus is provided with a conventional level transferring chip (as MAX3243), by this level transferring chip by pair transistor logic (the Transistor-Transistor Logic in equipment; Hereinafter to be referred as: TTL) be converted to can be for the level signal of the applicable long Distance Transmission such as the RS232 level signal of serial ports or RS485 for level signal, and then this signal is linked RJ45 interface as the external communication interface of equipment according to certain line order.When other communication apparatus need to be when this communication apparatus be communicated by letter, the RJ45 interface that need to access this equipment by netting twine just can operate accordingly.
In the prior art, the serial ports design for unified communication apparatus inside, is all set to the transmit-receive position of the serial ports of standard unanimously.And the prerequisite that can communicate by letter between the serial ports of two distinct devices is, wherein the signal sending/receiving end of an equipment need to reception/transmitting terminal cross-connect of an other equipment, need to realize the interconnected of two equipment with a pair of cross spider of specially joining.
Yet, the netting twine that main flow is used is at present direct-through line, and existing Serial Port Line reality with time all independent for equipment with cross spider, cause easily obscuring with common netting twine in machine room or actual environment, and common direct-through line cannot be realized the interconnected of two equipment, thereby bring puzzlement for user.
Summary of the invention
The invention provides a kind of data transmission processing method, device and equipment interface, make user no matter by direct-through line or cross spider, all can carry out easily mutual between communication apparatus, reduce the puzzlement bringing to user because of netting twine difference.
The invention provides a kind of data transmission processing method, comprising:
The data of returning after level transferring chip and the data that receive from processor are carried out to checking treatment;
According to check results, data path switched or reverse to control and process, and the data path after processing by control carries out transmission process to data.
The invention provides a kind of data transmission and processing device, comprising:
Signal comparing unit, for carrying out checking treatment to the data of returning after level transferring chip and the data that receive from processor;
Data path selected cell, for according to check results, data path being switched or reversing to control and process, and the data path after processing by control carries out transmission process to data.
The invention provides a kind of equipment interface, comprise processor interface, logic chip, level transferring chip and device external interface, described logic chip comprises above-mentioned data transmission and processing device.
Data transmission processing method of the present invention, device and equipment interface, by the data of returning after level transferring chip and the data that receive from processor are carried out to checking treatment, and according to check results, data path switched or reverse to control and process, and the data path after processing by control carries out transmission process to data.The present embodiment adapts to the transceiver mode of opposite end by the transceiver mode of automatically adjusting self, guarantee normally carrying out of data transmit-receive, make user no matter by direct-through line or cross spider, all can carry out easily mutual between communication apparatus, greatly reduce the peripheral complicacy connecting of the serial ports causing because cable is inconsistent, reduced the puzzlement bringing to user because of netting twine difference.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the process flow diagram of data transmission processing method embodiment mono-of the present invention;
Fig. 2 is the schematic diagram of data transmission procedure in data transmission processing method embodiment mono-of the present invention;
Fig. 3 is the process flow diagram of data transmission processing method embodiment bis-of the present invention;
Fig. 4 is the schematic diagram one of data transmission procedure in data transmission processing method embodiment bis-of the present invention;
Fig. 5 is the schematic diagram two of data transmission procedure in data transmission processing method embodiment bis-of the present invention;
Fig. 6 is the process flow diagram of data transmission processing method embodiment tri-of the present invention;
Fig. 7 is the schematic diagram of data transmission procedure in data transmission processing method embodiment tri-of the present invention;
Fig. 8 is the structural representation of data transmission and processing device embodiment mono-of the present invention;
Fig. 9 is the structural representation of data transmission and processing device embodiment bis-of the present invention.
Embodiment
For making object, technical scheme and the advantage of the embodiment of the present invention clearer, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
First the technical term using in the present embodiment is introduced herein.Exchange (switching) is according to the needs of communication two ends transmission information, uses method artificial or that equipment completes automatically, the information that transmit is delivered to the general designation of the technology in satisfactory corresponding route.The switch of broad sense (switch) is exactly a kind of equipment that completes information exchange functions in communication system.Serial line interface (Serial Interface; Hereinafter to be referred as: SI) refer to that one one ground order of data transmits, and is characterized in that communication line is simple, as long as a pair of transmission line just can be realized two-way communication, and can utilize telephone wire or netting twine, thereby greatly reduce cost, be specially adapted to telecommunication, but transfer rate is slower.Article one, the communication modes that each bit data of information is transmitted by turn is in order called serial communication.The feature of serial communication is: data bit transmits, and passes step-by-step and sequentially carries out, and transmission line of minimum need can complete; Cost is low but transfer rate is slow.The distance of serial communication can be from several meters to several kms.Direct-through line claims again main track or standard lines, and two ends adopt 568B to do line standard, and its crystal head two ends are all same line orders and corresponding one by one, and the unification of line order is: 1, Bai Cheng, 2, orange, 3, in vain green, 4, blue, 5, Bai Lan, 6, green, 7, white brown, 8, palm fibre.Cross spider claims again anti-line, and line order is according to one end 568A, the good line order of the standard ordering of one end 568B, its crystal head one end adopts line order: 1, in vain green, 2, green, 3, Bai Cheng, 4, indigo plant, 5, Bai Lan, 6, orange, 7, in vain brown, 8, palm fibre, i.e. 568A standard.The other end is on this basis by No. 1 in these eight lines and No. 3 lines, the location swap of No. 2 and No. 6 lines, and now line order just becomes 568B (i.e. white orange, orange, green in vain, indigo plant, Bai Lan, green, palm fibre in vain, the order of palm fibre).Although twisted-pair feeder has 4 pairs of 8 heart yearns, but wherein 4 in fact in network, have only been used, it is the 1st, the 2nd and the 3rd, the 6th pin of crystal head, they play a part respectively sending and receiving signal, between two equipment, intercommunication adopts 1-3,2-6 cross connection method conventionally, adopts the 1st, 2 sequence number lines of twisted-pair feeder as transmission, and the 3rd, 6 sequence number lines are as reception, one side's transmission is linked to the other side's reception, receive the transmission of linking the other side.Proposed standard (RecommendStandard; Hereinafter to be referred as: RS)-(Electronic IndustryAssociation of 232Shi EIA; Hereinafter to be referred as: a kind of serial physical interface standard of EIA) formulating, 232 is identification number.RS-232-C bus standard is provided with 25 signal line, comprises a main channel and an accessory channel.Mainly use as a rule main channel, for general duplex communication, only need several signal line just can realize, as a transmission line, a reception line and a ground wire.RS485 adopts differential signal negative logic, and+2V～+ 6V represents " 0 ", and-6V～-2V represents " 1 ".RS485 has two-wire system and two kinds of wiring of four-wire system, and many employings is the two-wire system mode of connection now, and this mode of connection is that bus type topological structure can articulate at most 32 nodes on same bus.In RS485 communication network, general employing is master-slave communication mode, i.e. a plurality of slaves of main frame band.
Fig. 1 is the process flow diagram of data transmission processing method embodiment mono-of the present invention, and as shown in Figure 1, the present embodiment provides a kind of data transmission processing method, can specifically comprise the steps:
The present embodiment can specifically be applied in the serial ports design of communication facilities, processor herein can be specially CPU, be illustrated in figure 2 the schematic diagram of data transmission procedure in data transmission processing method embodiment mono-of the present invention, the chip relevant to the scheme of the present embodiment mainly comprises cpu i/f, logic chip, level transferring chip and device external interface.Wherein, logic chip is the programmable logic chip between cpu i/f and level transferring chip that is arranged on increasing newly in the present embodiment, for example, can be specially field programmable gate array (Field-Programmable Gate Array; Hereinafter to be referred as: FPGA), CPLD (Complex Programmable Logic Device; Hereinafter to be referred as: the chip such as CPLD).Level transferring chip is for Transistor-Transistor Logic level being converted to the chip of RS232/RS485 level, such as thinking RS232 level transferring chip MAX3243 etc.Device external interface can be specially the interfaces such as RJ45.As shown in Figure 2, the present embodiment logic chip comprises two groups of data paths, these two groups of data paths comprise straight-through data path and reverse data path, be that logic chip adopts 22 of receipts to be connected respectively to level transferring chip, wherein 2 signal line are as straight-through data path, and 2 signal line are as reverse data path.In the present embodiment, adopt two groups of data paths, wherein reverse data path can be used as standby data path, while there is conflict in data transmit-receive process, follow-up by straight-through data path with reverse data path switches or the control of reversing, be about to straight-through data by switching to reverse data path, or the transmit-receive position of straight-through data path is reversed, and then under the prerequisite of not changing netting twine, realize the function of direct-through line or cross spider.
In this step, logic chip carries out checking treatment to the data of returning after level transferring chip and the data that receive from CPU, be specially data that judgement returns after level transferring chip whether with the data consistent receiving from CPU.As shown in Figure 2, in the present embodiment, when CPU sends data to opposite equip., first by the OUT signal wire in Fig. 2, send on logic chip; Logic chip can carry out caching process to the data that send from CPU, and then logic chip sends to level transferring chip by these data; After processing by the level conversion of level transferring chip, data are sent to device external interface, the data that send are returned a to logic chip again by level transferring chip simultaneously.Logic chip just can compare verification by the data of returning from level transferring chip and the local data from CPU reception buffer memory, to judge that whether the two is consistent.
Step 102, according to check results, data path is switched or reverse to control and process, and the data path after processing by control carries out transmission process to data.
Checking treatment through above-mentioned steps 101, logic chip is controlled processing according to check results to data path, the transceiver mode of self is controlled, can be specifically according to the data consistent of check results or the inconsistent data path of selecting, be specially data path is carried out to switching controls processing or the control processing of reversing, and according to the data path of switching controls processing or the rear selection of control processing of reversing, data integrity is also transferred in opposite equip. exactly.
Particularly, this step 102 can specifically comprise the steps: when the data of returning through level transferring chip and the described data that receive from processor are when inconsistent, show that this equipment occurs conflicting with the transmitting-receiving port of opposite equip., logic chip is switched to another group data path in two groups of data paths by current data path, suppose that current data path is for straight-through data path, now logic chip is carried out to the data path that transceiving data uses and switch to other one group of reverse data path, and by this reverse data path, data are carried out to follow-up transmission process.When the data of returning through level transferring chip and the described data consistent receiving from processor, show this equipment with opposite equip. without conflicting, logic chip directly carries out transmission process by current data path to data.
Or, this step 102 can specifically comprise the steps: when the data of returning through level transferring chip and the described data that receive from processor are when inconsistent, show that this equipment occurs conflicting with the transmitting-receiving port of opposite equip., the processing of the data transmitting channel in current data path and data receiver channel being reversed, and by the data path after reversion, data are carried out to transmission process; When the data of returning through level transferring chip and the described data consistent receiving from processor, show this equipment with opposite equip. without conflicting, by current data path, data are carried out to transmission process.
The present embodiment provides a kind of data transmission processing method, by the data of returning after level transferring chip and the data that receive from processor are carried out to checking treatment, and according to check results, data path switched or reverse to control and process, and the data path after processing by control carries out transmission process to data.The present embodiment adapts to the transceiver mode of opposite end by the transceiver mode of automatically adjusting self, guarantee normally carrying out of data transmit-receive, make user no matter by direct-through line or cross spider, all can carry out easily mutual between communication apparatus, greatly reduce the peripheral complicacy connecting of the serial ports causing because cable is inconsistent, reduced the puzzlement bringing to user because of netting twine difference.
Fig. 3 is the process flow diagram of data transmission processing method embodiment bis-of the present invention, and as shown in Figure 3, the present embodiment provides a kind of data transmission processing method, and the present embodiment can specifically comprise the steps:
When the data of local device need to send, now data output to logic chip by " OUT " signal wire of cpu i/f.
Fig. 4 is the schematic diagram one of data transmission procedure in data transmission processing method embodiment bis-of the present invention, as shown in Figure 4, the present embodiment specifically be take the RS232 fiduciary level signal of serial ports and is described as example, suppose the interconnected employing direct-through line between current local device and opposite equip., be the RX that the RX of the serial ports of local device connects opposite equip., the TX of the serial ports of local device meets the TX of opposite equip., and the serial ports transmit-receive position of local device and the transmit-receive position of opposite equip. should be contrary.In this step, logic chip after receiving the data that CPU sends, can be in the data buffer of self buffer memory a, in order in subsequent check process, use.
Step 303, logic chip is configured to straight-through data path by data path.
As shown in Figure 4, two signal line that are positioned in four signal line between logic chip and level transferring chip are above one group of data path, i.e. reverse data path, and two signal line that are positioned at are below other one group of data path, i.e. straight-through data path.This step is that logic chip is first configured to default data path by its data path, and default data path herein can be specially straight-through data path, can adopt the signal line in reverse data path to be used as signal checking process.
Logic chip sends to level transferring chip by straight-through data path by the data that receive from CPU.
Step 305, level transferring chip is carried out level conversion to data, the data after conversion is sent to device external interface, and these data are returned to logic chip.
Level transferring chip is carried out level conversion to data, the data after conversion is sent to device external interface, and these data are returned to logic chip portion by the signal line in the reverse data path in Fig. 4, in order to signal checking, uses.
Step 306, the data that logic chip returns level transferring chip are carried out checking treatment with the data that receive from CPU, judge that whether the two is consistent, if so, perform step 307, otherwise execution step 308.
As shown in Figure 4, the data that signal comparing unit in logic chip specifically returns level transferring chip are carried out checking treatment with the data that receive from CPU, whether the data that signal comparing unit decision level conversion chip returns are consistent with the data that receive from CPU of local cache, if, perform step 307, otherwise execution step 308.
Step 307, logic chip sends to opposite equip. by current data path by data.
When the data of returning when level transferring chip and the data consistent receiving from CPU of local cache, show local device with the data transmit-receive of opposite equip. without conflicting, logic chip can directly select current data path to carry out transceiving data.
Step 308, logic chip will lead directly to data path and switch to reverse data path, and by the data path after switching, data be carried out to transmission process.
When the data of returning when level transferring chip and the data that receive from CPU of local cache are inconsistent, show that local device occurs conflicting with the data transmit-receive of opposite equip., the transmitting-receiving order due to opposite equip. is sequentially reverse with the transmitting-receiving of local device, local device can clash with the data of the TX direction of opposite equip. in the data of current TX direction, as shown in Figure 4, now the signal comparing unit in logic chip, when signal is carried out to verification, is just found to have error between two data.Now, data path selected cell in logic chip switches current data path, be about to current data path and be adjusted into reverse data path, select the one group of signal wire being positioned at above between logic chip and level transferring chip in Fig. 4 to be used as new data path.Then, logic chip carries out follow-up transmission process by the data path after switching to data, be illustrated in figure 5 the schematic diagram two of data transmission procedure in data transmission processing method embodiment bis-of the present invention, be that Fig. 5 is the data transmission procedure after data path switches, now adopt and be positioned at two signal line above as data path between logic chip and level transferring chip, and adopt a signal line that is arranged in two signal line below to carry out signal checking, adopt reverse data path as data path, adopt the signal line in straight-through data path to carry out signal checking.As can be seen from Figure 5, after carrying out data path switching, the data transmit-receive of local device no longer conflicts mutually with the data transmit-receive of opposite equip., has guaranteed normally carrying out of data transmit-receive.
The present embodiment provides a kind of data transmission processing method, by the data of returning after level transferring chip and the data that receive from processor are carried out to checking treatment, and according to check results, data path is carried out to switching controls processing, and the data path after processing by control carries out transmission process to data.The present embodiment adapts to the transceiver mode of opposite end by the transceiver mode of automatically adjusting self, guarantee normally carrying out of data transmit-receive, make user no matter by direct-through line or cross spider, all can carry out easily mutual between communication apparatus, greatly reduce the peripheral complicacy connecting of the serial ports causing because cable is inconsistent, reduced the puzzlement bringing to user because of netting twine difference.
Fig. 6 is the process flow diagram of data transmission processing method embodiment tri-of the present invention, and as shown in Figure 6, the present embodiment provides a kind of data transmission processing method, and the present embodiment can specifically comprise the steps:
Step 601, CPU sends data to logic chip.
Step 602, logic chip carries out caching process to the data that receive.
Step 603, logic chip is configured to straight-through data path by data path.
Continue with reference to above-mentioned Fig. 4, two signal line that are positioned in four signal line between logic chip and level transferring chip are above one group of data path, be reverse data path, two signal line that are positioned at are below other one group of data path, i.e. straight-through data path.This step is that logic chip is first configured to default data path by its data path, and default data path herein can be specially straight-through data path, can adopt the signal line in reverse data path to be used as signal checking process.
Step 604, logic chip sends to level transferring chip by the data that receive.
Step 605, level transferring chip is carried out level conversion to data, the data after conversion is sent to device external interface, and these data are returned to logic chip.
Step 606, the data that logic chip returns level transferring chip are carried out checking treatment with the data that receive from CPU, judge that whether the two is consistent, if so, perform step 607, otherwise execution step 608.
Step 607, logic chip sends to opposite equip. by current data path by data.
Step 608, logic chip is the processing of reversing of the data transmitting channel in current data path and data receiver channel, and by the data path after reversion, data carried out to transmission process.
Continuation is referring to Fig. 4, when the data of returning when level transferring chip and the data that receive from CPU of local cache are inconsistent, data path selected cell in logic chip is to the processing of reversing of the data transmitting channel in current data path and data receiver channel, be about to the signal wire as data transmitting channel in former straight-through data path and be used as data receiver, signal wire as data receiver channel in former straight-through data path is sent as data, obtain the transmission signal shown in Fig. 7.Then, logic chip carries out follow-up transmission process by the data path after reversing to data, as can be seen from Figure 7, and after carrying out data path switching, the data transmit-receive of local device no longer conflicts mutually with the data transmit-receive of opposite equip., has guaranteed normally carrying out of data transmit-receive.
The present embodiment provides a kind of data transmission processing method, by the data of returning after level transferring chip and the data that receive from processor are carried out to checking treatment, and according to check results, data path is reversed to control and process, and the data path after processing by control carries out transmission process to data.The present embodiment adapts to the transceiver mode of opposite end by the transceiver mode of automatically adjusting self, guarantee normally carrying out of data transmit-receive, make user no matter by direct-through line or cross spider, all can carry out easily mutual between communication apparatus, greatly reduce the peripheral complicacy connecting of the serial ports causing because cable is inconsistent, reduced the puzzlement bringing to user because of netting twine difference.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can complete by the relevant hardware of programmed instruction, aforesaid program can be stored in a computer read/write memory medium, this program, when carrying out, is carried out the step that comprises said method embodiment; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CDs.
Fig. 8 is the structural representation of data transmission and processing device embodiment mono-of the present invention, and as shown in Figure 8, the present embodiment provides a kind of data transmission and processing device, can specifically carry out each step in said method embodiment mono-, repeats no more herein.The data transmission and processing device that the present embodiment provides can comprise signal comparing unit 801 and data path selected cell 802.Wherein, signal comparing unit 801 is for carrying out checking treatment to the data of returning after level transferring chip and the data that receive from processor.Data path selected cell 802 is for according to check results, data path being switched or reversing to control and process, and the data path after processing by control carries out transmission process to data.
Fig. 9 is the structural representation of data transmission and processing device embodiment bis-of the present invention, and as shown in Figure 9, the present embodiment provides a kind of data transmission and processing device, can specifically carry out each step in said method embodiment bis-or embodiment tri-, repeats no more herein.Data path selected cell 802 in the data transmission and processing device that the present embodiment provides can specifically comprise the first chooser unit 812 and the second chooser unit 822.Wherein, the first chooser unit 812 is for when the described data of returning through level transferring chip and the described data that receive from processor are when inconsistent, current data path is switched to another group data path in two groups of data paths, and by the data path after switching, data is carried out to transmission process.The second chooser unit 822, for when the described data of returning through level transferring chip and the described data consistent receiving from processor, carries out transmission process by current data path to data.
Or the data path selected cell 802 in the present embodiment can specifically comprise the 3rd chooser unit 832 and the 4th chooser unit 842.Wherein, the 3rd chooser unit 832 is for when the described data of returning through level transferring chip and the described data that receive from processor are when inconsistent, by the processing of reversing of the data transmitting channel in current data path and data receiver channel, and by the data path after reversion, data are carried out to transmission process.The 4th chooser unit 842, for when the described data of returning through level transferring chip and the described data consistent receiving from processor, carries out transmission process by current data path to data.
Further, the data transmission and processing device that the present embodiment provides can also comprise data buffer 803, and data buffer 803 is for carrying out buffered to the data that send from described processor that receive.It will be understood by those skilled in the art that the data transmission and processing device that the present embodiment provides can also comprise reset unit 804, this reset unit 804 is similar with the reset unit in existing other chips, all, for the signal of reset chip, repeats no more herein.
The present embodiment provides a kind of data transmission and processing device, by the data of returning after level transferring chip and the data that receive from processor are carried out to checking treatment, and according to check results, data path switched or reverse to control and process, and the data path after processing by control carries out transmission process to data.The present embodiment adapts to the transceiver mode of opposite end by the transceiver mode of automatically adjusting self, guarantee normally carrying out of data transmit-receive, make user no matter by direct-through line or cross spider, all can carry out easily mutual between communication apparatus, greatly reduce the peripheral complicacy connecting of the serial ports causing because cable is inconsistent, reduced the puzzlement bringing to user because of netting twine difference.
The present embodiment also provides a kind of equipment interface, can specifically comprise processor interface, logic chip, level transferring chip and device external interface, and wherein, described logic chip can comprise the data transmission and processing device shown in above-mentioned Fig. 8 or Fig. 9.
Finally it should be noted that: above embodiment only, in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to previous embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or part technical characterictic is wherein equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (9)
1. a data transmission processing method, is characterized in that, comprising:
Logic chip carries out checking treatment to the data of returning after level transferring chip and the data that receive from processor;
Described logic chip switches data path according to check results or reverses to control and process, and the data path after processing by control carries out transmission process to data;
Wherein, described logic chip adopts 2 four signal line of 2 receipts to be connected respectively to described level transferring chip, and wherein 2 signal line are as straight-through data path, and 2 signal line are as reverse data path; If adopt described straight-through data path to send data as data path to described level transferring chip, adopt a signal line in described reverse data path for transmit the data of returning after described level transferring chip; Or, if adopt described reverse data path to send data as data path to described level transferring chip, adopt a signal line in described straight-through data path for transmit the data of returning after described level transferring chip.
2. method according to claim 1, is characterized in that, according to check results, data path is carried out to switching controls processing, and the data path after processing by control carries out transmission process to data and comprises:
When the described data of returning through level transferring chip and the described data that receive from processor are when inconsistent, current data path is switched to another group data path in two groups of data paths, and by the data path after switching, data is carried out to transmission process;
When the described data of returning through level transferring chip and the described data consistent receiving from processor, by current data path, data are carried out to transmission process.
3. method according to claim 1, is characterized in that, according to check results, data path is reversed and control processed, and the data path after processing by control carries out transmission process to data and comprises:
When the described data of returning through level transferring chip and the described data that receive from processor are when inconsistent, by the processing of reversing of the data transmitting channel in current data path and data receiver channel, and by the data path after reversion, data are carried out to transmission process;
When the described data of returning through level transferring chip and the described data consistent receiving from processor, by current data path, data are carried out to transmission process.
4. according to the method in claim 2 or 3, it is characterized in that, also comprise:
The data that send from described processor that receive are carried out to buffered.
5. a data transmission and processing device, is characterized in that, comprising:
Signal comparing unit, for carrying out checking treatment to the data of returning after level transferring chip and the data that receive from processor;
Data path selected cell, for according to check results, data path being switched or reversing to control and process, and the data path after processing by control carries out transmission process to data;
Wherein, described data transmission and processing device adopts 2 four signal line of 2 receipts to be connected respectively to described level transferring chip, and wherein 2 signal line are as straight-through data path, and 2 signal line are as reverse data path; If adopt described straight-through data path to send data as data path to described level transferring chip, adopt a signal line in described reverse data path for transmit the data of returning after described level transferring chip; Or, if adopt described reverse data path to send data as data path to described level transferring chip, adopt a signal line in described straight-through data path for transmit the data of returning after described level transferring chip.
6. device according to claim 5, is characterized in that, described data path selected cell comprises:
The first chooser unit, for when described data that level transferring chip returns and the described data that receive from processor of passing through are when inconsistent, current data path is switched to another group data path in two groups of data paths, and by the data path after switching, data is carried out to transmission process;
The second chooser unit, for when the described data of returning through level transferring chip and the described data consistent receiving from processor, carries out transmission process by current data path to data.
7. device according to claim 5, is characterized in that, described data path selected cell comprises:
The 3rd chooser unit, for when described data that level transferring chip returns and the described data that receive from processor of passing through are when inconsistent, by the processing of reversing of the data transmitting channel in current data path and data receiver channel, and by the data path after reversion, data are carried out to transmission process;
The 4th chooser unit, for when the described data of returning through level transferring chip and the described data consistent receiving from processor, carries out transmission process by current data path to data.
8. according to the device described in claim 6 or 7, it is characterized in that, also comprise:
Data buffer, for carrying out buffered to the data that send from described processor that receive.
9. an equipment interface, is characterized in that, comprises processor interface, logic chip, level transferring chip and device external interface, and described logic chip comprises the data transmission and processing device described in any one in claim 5-8.
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| CN201110149950.7A CN102253914B (en) | 2011-06-02 | 2011-06-02 | Data transmitting and processing method and device and equipment interface |
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| CN102591836B (en) * | 2012-01-20 | 2015-02-04 | 华为技术有限公司 | Configuration method and configuration device for communication connector personal identification number (PIN) foot |
| EP3169064B1 (en) * | 2015-11-10 | 2020-08-12 | Panasonic Intellectual Property Management Co., Ltd. | Intercom system and communication method thereof |
| CN106126465B (en) * | 2016-06-21 | 2017-09-12 | 广东欧珀移动通信有限公司 | A kind of data transmission method and device |
| CN106898923B (en) * | 2017-02-10 | 2020-06-19 | 新华三技术有限公司 | Interface connection method and interface connection device of network equipment |
| TWI627852B (en) * | 2017-04-07 | 2018-06-21 | 宏正自動科技股份有限公司 | Signal relaying device and signal relaying method |
| CN109871342B (en) * | 2017-12-05 | 2024-02-09 | 炬芯科技股份有限公司 | Self-adaptive connection serial interface circuit and self-adaptive connection method thereof |
| CN109871344B (en) * | 2017-12-05 | 2021-08-31 | 炬芯科技股份有限公司 | Communication system, interface circuit and signal transmission method thereof |
| CN113014547B (en) * | 2021-01-29 | 2022-11-01 | 深圳市风云实业有限公司 | Sequencing mapping-based direct data transmission system and method |
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| CN101853235A (en) * | 2009-04-02 | 2010-10-06 | 鸿富锦精密工业（深圳）有限公司 | Switching device of serial ports |
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| CN101853235A (en) * | 2009-04-02 | 2010-10-06 | 鸿富锦精密工业（深圳）有限公司 | Switching device of serial ports |
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Address after: 350002 19 Building, Citrus Industrial Park, 618 Jinshan Road, Cangshan District, Fuzhou, Fujian. Patentee after: RUIJIE NETWORKS Co.,Ltd. Address before: 350002 19 Building, Citrus Industrial Park, 618 Jinshan Road, Cangshan District, Fuzhou, Fujian. Patentee before: Fujian Star Network Ruijie Networks Co.,Ltd. |
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