CN102163967A

CN102163967A - Method for sampling pulse data

Info

Publication number: CN102163967A
Application number: CN 201110009685
Authority: CN
Inventors: 赵进云
Original assignee: FUJIAN XINNUO COMMUNICATION TECHNOLOGY Co Ltd
Current assignee: FUJIAN XINNUO COMMUNICATION TECHNOLOGY Co Ltd
Priority date: 2011-01-17
Filing date: 2011-01-17
Publication date: 2011-08-24
Anticipated expiration: 2031-01-17
Also published as: CN102163967B

Abstract

The invention discloses a method for sampling pulse data, which is characterized in that a GPIO (general purpose input/output) for generating pulses is directly connected to an MISO (multiple input single output) pin of a CPU SPI (synchronous parallel interface) interface, the CPU is replaced with the existing SPI interface of the CPU (central processing unit) for carrying out pulse data sampling, and the sampled data are stored by a DMA (direct memory access). When the pulse is a low power pulse, the value of continuous bit of data sampled by the SPI is 0, and when the pulse is a high power pulse, the value of continuous bit of the data sampled by the SPI is 1. So, according to the sampling accuracy, the time width of pulses can be calculated just by calculating the number of continuous bits with a value of 0 or 1. By using the method disclosed by the invention, high-precision and high-performance pulse data sampling can be realized without adding additional hardware, therefore, the method has a good implementation effect and low cost.

Description

A kind of number of pulses is according to the method for sampling

[technical field]

The invention belongs to a kind of number of pulses according to the method for sampling, be applicable to end product with pulse data sampling function.

[background technology]

Along with the generation of Internet of Things industry, require increasing end product to have the function of pulse data sampling, for example to the black and white camera, the pulse data of one dimension laser head output is done sampling and is handled.Traditional number of pulses mainly contains two kinds according to the way of sampling.

First method: as shown in Figure 1, the GPIO pin that produces pulse is connected on the external interrupt pin of CPU.And be this outside interrupt configuration that dual edge triggers, as long as the state of pulse one changes, will trigger interruption like this, the time interval of in interrupt handling routine, calculating and preserving two edges of a pulse.

Second method: interfaces such as shown in Figure 2, expand a chip of being responsible for pulse data sampling specially, chip is by serial ports, USB and CPU are interconnected.

First method does not need additionally to add hardware just can finish the sampling function.The realization cost is low, but can cause sampling precision not high owing to there is time-delay in Interrupt Process, and sampling process needs the participation of CPU can cause system loading to increase.So but this is not a kind of method of commercialization, it is used to be used for being familiar with principle.A kind of at last perfect method of second method, but this need add extra hardware, can cause the increase of product cost.

[summary of the invention]

Technical problem to be solved by this invention is to provide a kind of low cost, the high-precision pulse data method of sampling, and this method need not to add additional hardware, and has higher sampling precision and sampling performance.

The present invention solves the problems of the technologies described above by the following technical solutions:

A kind of number of pulses comprises the steps: according to the method for sampling

Step 1: the GPIO pin of the corresponding SPI interface of initialization at first;

Step 2: the clock of spi bus is set, i.e. the sampling clock of pulse data;

Step 3: the initialization dma controller, and the preservation address of sampled data is set;

Step 4: in the time will beginning to gather, just enable the SPI interface, MISO is gone up the pulse of input and do sampling;

Step 5:SPI whenever samples the data of 4 bytes and just initiates a DMA request, and dma controller can be saved in data the core position of appointment;

Step 6: after sampling finished, all data that sample were kept at step 3 appointed positions;

Step 7: the sampling clock according to step 2 is provided with can calculate the every sampling one digit number of SPI according to the time that is spent;

Step 8: the data that escape samples, step-by-step come data are resolved; If continuously the value of position is 0, what this part sampled data correspondence just was described is low pulse, being that 0 the figure place and the value of step 7 can calculate the time width that hangs down pulse mutually at convenience continuously; If continuously the value of position is 1, what this part sampled data correspondence just was described is high impulse, and the value that is 1 figure place and step 7 is continuously multiplied each other can calculate the time width of high impulse.

The invention has the advantages that: the GPIO that produces pulse is directly linked on the MISO pin of CPU SPI interface, utilize the existing SPI interface of CPU to come replaced C PU to carry out the sampling of pulse data, the data that sample replace being responsible for preservation by DMA.Need not to add extra hardware and just can realize high accuracy, high performance pulse data sampling.Have good realization effect and lower realization cost.

[description of drawings]

The invention will be further described in conjunction with the embodiments with reference to the accompanying drawings.

Fig. 1 is that the logic of one of prior art connects block diagram.

Fig. 2 is that two logic of prior art connects block diagram.

Fig. 3 is that logic of the present invention connects block diagram.

Fig. 4 is a hardware elementary diagram of the present invention.

Fig. 5 is a software control flow process of the present invention.

[embodiment]

Please consult Fig. 3 to Fig. 5 simultaneously, a kind of number of pulses comprises the steps: according to the method for sampling

Step 2: the clock of spi bus is set, i.e. the sampling clock of pulse data;

The whole impulse waveform of like this, just denumerable value input.

Among the present invention, the GPIO pin of output pulse is connected to the MISO pin of CPU SPI interface, just the input data of pulse as the SPI interface, when pulse when low, the data that SPI samples just are 0, and when pulse when being high, the data that SPI samples just are 1.As long as be 0 continuously or be 1 figure place so obtain, just can obtain the time width of pulse again according to sampling precision.

Because the FIFO size of SPI controller is limited, so must in time take the data that sample away.Overflow otherwise FIFO will take place, cause losing of sampled data.

So for the load that prevents that Interrupt Process from delaying time and causing FIFO to overflow and reduce system in the sampling process, the present invention adopts the mode of DMA that sampled data is in time shifted and directs at fixed core position.

The present invention directly links the GPIO that produces pulse on the MISO pin of CPU SPI interface, utilizes the existing SPI interface of CPU to come replaced C PU to carry out the sampling of pulse data, and the data that sample replace being responsible for preservation by DMA.Need not to add extra hardware and just can realize high accuracy, high performance pulse data sampling.Have good realization effect and lower realization cost.

Claims

1. a number of pulses is characterized in that: comprise the steps: according to the method for sampling

Step 2: the clock of spi bus is set, i.e. the sampling clock of pulse data;