CN102157371A - Method for producing monocrystalline silicon nanometer structure - Google Patents
Method for producing monocrystalline silicon nanometer structure Download PDFInfo
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- CN102157371A CN102157371A CN 201110070920 CN201110070920A CN102157371A CN 102157371 A CN102157371 A CN 102157371A CN 201110070920 CN201110070920 CN 201110070920 CN 201110070920 A CN201110070920 A CN 201110070920A CN 102157371 A CN102157371 A CN 102157371A
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- mask pattern
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Abstract
The invention discloses a method for producing a monocrystalline silicon nanometer structure. The method comprises the following steps of: firstly, carrying out photoetching on a silicon substrate according to the pattern of the monocrystalline silicon nanometer structure, and defining the mask pattern with micron line width; secondly, forming a heavy doping area outside the mask pattern through ion implantation; thirdly, carrying out high temperature annealing to cause implanted ions to be diffused in silicon materials under the mask pattern so that a moderate doping area can be formed, and reducing the line width of a low doping density area under the mask pattern to the nanometer degree; and finally selectively corroding silicon in the moderate doping area through HNA (High Apparent Nucleic Acid) solutions so as to obtain the monocrystalline silicon nanometer structure with low doping density. The method not only has the advantages of good compatibility of the MEMS (Micro-Electro-Mechanical System) process and the IC (Integrated Circuit) process, convenience in operation, low cost, convenience in mass production, and the like, but also has better line width controllability in comparison with the nanometer structure producing method utilizing the side wall and photoresist ashing technology.
Description
Technical field
The present invention relates to the minute mechanical and electrical system field, be particularly related to a kind of method of making the monocrystalline silicon nanostructure, this is a kind of manufacturing process of utilizing traditional MEMS, with low cost, straightforward procedure of making the monocrystalline silicon nanostructure in enormous quantities makes the size of monocrystalline silicon nanostructure of making controlled substantially.
Background technology
The monocrystalline silicon nanostructure has the character of many excellences as the important component part of nano-silicon device at aspects such as quantum limit and surface activitys, therefore have a wide range of applications.For example, combine the detection of carrying out such as large biological molecules such as protein, DNA with MOSFET; As the basic structure of photonic crystal research or the research of nanometer self-spining device and device or the like.
Traditional silicon nanowires (SiNWs) manufacture method mainly adopts nanoprocessing technology.Nanoprocessing technology is " assembling " nano wire from bottom to top, mainly comprises laser ablation method (Laserablation), porous alumina formwork method or the like.Laser ablation method mainly utilizes air-liquid-solid phase method (Vapor-liquid-solid method, VLS), when saturated gaseous state silicon constantly diffused into the alloy liquid droplet of silicon and metallic catalyst, solid-state silicon will constantly be separated out from drop, thereby grows nano wire between liquid-solid interface.The porous alumina formwork method utilizes nanoporous aluminium as template, and silane gas is under the effect of gold (Au), silver catalyst such as (Ag), and synthetic silicon is removed porous aluminum at last and obtained nano wire in nanoaperture.Though these nanoprocessing technologies have advantages such as cost is low, size is even, the condition harshness is difficult to operation, poor compatibility, and be subject to catalyst contamination.
In recent years along with the progress of photoetching technique, the scan-probe photoetching (Scanning Probe Lithograph, SPL) and electron beam lithography (EBL) also more and more be used for the making of monocrystalline silicon nanostructure.But these methods are more consuming time, and the expense of input is also relatively more expensive, is difficult to use in extensive making monocrystalline silicon nanostructure.
With respect to above several method, based on the method for micromachined prepared nanostructure have with the IC process compatible, with low cost, be convenient to advantages such as large-scale production.Reported method mainly is side wall mask technique (Sidewall Masking Technique) and photoresist ashing technology (Photoresist Ashing Technique).These two kinds of methods all are to utilize the material of deposit or the photoresist of silication to form side wall earlier, carry out etching with this as mask again, obtain nano wire, but the live width controllable degree are not high.
Hence one can see that, at correlative technology field, need extensive, the economic and effective monocrystalline silicon Fabrication of nanostructures method of a kind of energy, and micromachined technology is the focus of paying close attention to.
Summary of the invention
The objective of the invention is based on micromachined technology, the method for a kind of low cost, extensive, making monocrystalline silicon nanostructure that live width is controlled is provided.Further, utilize the monocrystalline silicon nanostructure batch making of made to have monocrystalline silicon nanostructure sensors, nanometer quantum device of predetermined live width etc.
Technical scheme of the present invention is as follows:
A kind of method of making the monocrystalline silicon nanostructure comprises the steps:
1) select doping content 10
12Cm
-3Following low doping concentration silicon substrate;
2), define the mask pattern of micron order live width according to figure photoetching on silicon substrate of the monocrystalline silicon nanostructure that will make;
3) carry out ion and inject, form heavily doped region outside the mask pattern of micron order live width, doping content is greater than 10
19Cm
-3
4) silicon substrate is carried out high annealing, the ion of injection will diffuse into the silicon materials below the mask pattern, form the medium doped zone, and doping content is 10
17～10
19Cm
-3, make the live width in low doping concentration zone under the mask pattern be decreased to nanometer scale;
5) fall silicon in the medium doped zone with the selective corrosion of HNA solution, obtain the monocrystalline silicon nanostructure of low doping concentration.
Further, above-mentioned steps 2) can on silicon substrate, use the method for thermal oxidation to form one deck SiO before earlier
2Layer, this SiO
2Layer will inject protective layer as the ion of follow-up injection; Before step 5) is with HNA solution selective corrosion silicon, earlier with buffered hydrofluoric acid (BHF) solution (HF: NH
4F=1: 4 (volume ratios)) erode this SiO
2The natural oxidizing layer that may form when layer and annealing.
Above-mentioned steps 1) generally select for use ordinary silicon substrate or soi wafer as substrate, the doping content of silicon substrate is greatly about 1011cm
-3
Above-mentioned steps 2) live width of mask pattern is less than 2 μ m, preferably less than 1 μ m.
Above-mentioned steps 3) the general type with employed substrate of the kind of ion injection is suitable, and promptly p type substrate injects III family ion, and n type substrate injects V family ion.Ion implantation concentration should be tried one's best greatly, and the doping content of the heavily doped region that forms after guaranteeing to inject is higher than 10
19Cm
-3In case of necessity, should before injection, cure, can not inject cracking in heavy dose to guarantee photoresist to photoresist.
Above-mentioned steps 4) Tui Huo temperature is at 950 ℃～1050 ℃, the time of annealing is by mask pattern size and the decision of required nanostructure size, the analog result that can carry out theoretical calculation or use related software in conjunction with the size and the concrete technological parameter of design was generally 3-10 hour.During annealing, the ion of injection will spread to all directions of substrate, comprises the sideways diffusion that is parallel to substrate surface.Utilize the diffusion of injecting ion, some medium doped zones that in silicon substrate, form,
Above-mentioned steps 5) used HNA solution is preferably HNO
3: HF: HAc=3: the solution of 1: 8 (volume ratio).Since HNA solution to doping content 10
17Cm
-3Above silicon substrate corrosion rate is greatly about 1～2 μ m/min, and far faster than lightly doped silicon substrate, corrosion selects ratio greatly about 160: 1.Therefore, utilize HNA solution selective removal medium doped zone after, will stay lightly doped monocrystalline silicon nanostructure.When HNA solution corrosion silicon substrate, HNO
3In corrosive liquid, can be reduced into HNO
2Along with the carrying out of HNA solution corrosion silicon substrate, HNO
2Concentration will increase.The HNO of higher concentration
2Can influence the selectivity of HNA solution.In this case, can add an amount of oxidant (as H
2O
2), HNO
2Be oxidized to HNO
3, eliminate HNO
2Influence; Also can add an amount of reducing agent NaN
3, remove HNO
2Very fast in view of the corrosion rate of HNA solution, and in corrosion process, can generate the HNO that ratio is selected in influence
2, so the etching time of HNA solution is unsuitable long.The concrete time can be determined by preliminary experiment according to the live width of the nanostructure of required preparation.
The present invention adopts HNA selective corrosion technology to make the monocrystalline silicon nanostructure on silicon substrate, overcome the condition harshness that adopts nanoprocessing technology, be difficult to operate, poor compatibility and be subject to the problem of catalyst contamination, and the consuming time and expensive problem of scan-probe photoetching (SPL) and electron beam lithography (EBL) technology.Method of the present invention not only possesses the advantage based on the preparation method of traditional MEMS technology, and is good such as compatibility, easy to operate, with low cost, be convenient to large-scale production etc.,, have better live width controllability simultaneously with respect to the method for utilizing side wall and photoresist ashing technology.
The present invention by adopt simply, operation repeatably, can make the monocrystalline silicon nano-device of high integration, and not limited by the photoetching minimum dimension, can replace the electron beam lithography method of costliness consuming time, and air-liquid-solid phase method wayward, poor compatibility.By the monocrystalline silicon nanostructure that the inventive method is made, can be applicable to the preparation of multiple micro-nano mechanical device, for example, can make the Bio-MEMS transducer of detection of biological bioactive molecule, and the important devices of research nanometer spintronics etc.
Description of drawings
Fig. 1 (a)-(d) is the process flow diagram of embodiment of the invention making monocrystalline silicon nano line, wherein: (a) shown the step that forms the photoresist mask on the silica resilient coating; (b) shown the high concentration ion implantation step; (c) shown that annealing forms the step in moderate ion doping zone; (d) shown that HNA selective corrosion silicon forms the step of nanostructure.
Fig. 2 is two stereoscan photographs that utilize the monocrystalline silicon nanostructure of the inventive method making.
Embodiment
Below in conjunction with accompanying drawing, the method that HNA selective corrosion legal system is made the monocrystalline silicon nanostructure is described in further detail by embodiment.
As shown in Figure 1, make the monocrystalline silicon nanostructure according to following step:
1. select for use common silicon chip or soi wafer as substrate 1, the doping content of silicon substrate is greatly about 10
11Cm
-3
2. the method with thermal oxidation forms one deck SiO on silicon substrate 1
2 Layer 2, this SiO
2The protective layer that layer will inject as ion; According to layout design, the mask pattern of lithographic definition micron order live width forms photoresist ion implantation mask 3, referring to Fig. 1 (a) then.
3. carry out ion and inject, on silicon substrate, form heavily doped region 4 outside the mask pattern, see Fig. 1 (b).
4. high annealing, the ion that injects will spread to all directions of substrate 1 at high annealing, comprises the sideways diffusion that is parallel to substrate surface, owing to inject the diffusion of ion, some medium doped zones 5 that will form on silicon substrate 1, doping content is greatly about 10
17～10
19Cm
-3, the live width in low doping concentration zone also will be decreased to nanometer scale under the mask pattern, see Fig. 1 (c).The temperature of annealing is 1000 ℃, and the time of annealing is more than 3 hours.
5. earlier with buffered hydrofluoric acid (BHF) solution (HF: NH
4F=1: 4 (volume ratios)) corrosion SiO
2Ion injects protective layer 2, uses HNA solution (HNO again
3: HF: HAc=3: 1: 8) carry out selective corrosion and fall medium doped zone 5, on silicon substrate, obtain the monocrystalline silicon nanostructure 6 of low doping concentration, see Fig. 1 (d).
Said method utilizes HNA selective corrosion legal system to make the monocrystalline silicon nanostructure, and can be by the layout design of mask pattern and the live width of annealing time adjustment nanostructure.
Fig. 2 is the stereoscan photograph that utilizes the monocrystalline silicon nano line of the inventive method making, wherein Fig. 2 (a) layout design live width is 2 μ m, the live width of the nano wire that HNA corrosion back forms is about 1 μ m, Fig. 2 (b) is 0.6 μ m for the layout design live width, and the live width of the nano wire that HNA corrosion back forms is about 370nm.
More than by embodiment the method that the monocrystalline silicon nanostructure is made in selective corrosion that the present invention utilizes HNA has been described, it will be understood by those of skill in the art that foregoing description should not be considered as limitation of the present invention.In the scope that does not break away from the present invention's spirit and essence, can make certain deformation or modification to the present invention, protection scope of the present invention is decided on appended claims.
Claims (9)
1. a method of making the monocrystalline silicon nanostructure comprises the steps:
1) select doping content 10
12Cm
-3Following low doping concentration silicon substrate;
2), define the mask pattern of micron order live width according to figure photoetching on silicon substrate of monocrystalline silicon nanostructure;
3) carry out ion and inject, form heavily doped region outside the mask pattern of micron order live width, doping content is greater than 10
19Cm
-3
4) high annealing, the ions diffusion of injection enters the silicon materials below the mask pattern, forms doping content 10
17～10
19Cm
-3The medium doped zone, make the live width in low doping concentration zone under the mask pattern be decreased to nanometer scale;
5) fall silicon in the medium doped zone with the selective corrosion of HNA solution, obtain the monocrystalline silicon nanostructure of low doping concentration.
2. the method for claim 1 is characterized in that, step 1) selects for use silicon chip or soi wafer as substrate.
3. the method for claim 1 is characterized in that step 2) in the live width of mask pattern less than 2 μ m.
4. the method for claim 1 is characterized in that, in step 2) before earlier on silicon substrate thermal oxidation form one deck SiO
2Ion injects protective layer; Before step 5) is with HNA solution selective corrosion silicon, fall this SiO with the buffered hydrofluoric acid solution corrosion earlier
2Layer.
5. the method for claim 1 is characterized in that, step 3) is cured the photoresist ion implantation mask before ion injects.
6. the method for claim 1 is characterized in that, the kind that the step 3) ion injects is suitable with the type of silicon substrate, injects III family ion for p type substrate, and injects V family ion for n type substrate.
7. the method for claim 1 is characterized in that, the step 4) annealing time is 3-10 hour.
8. the method for claim 1 is characterized in that, the used HNA solution of step 5) is HNO
3: HF: HAc=3: the solution of 1: 8 (volume ratio).
9. the method for claim 1 is characterized in that, step 5) adds an amount of oxidant or reducing agent and removes HNO in HNA solution corrosion process
2
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Cited By (5)
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|---|---|---|---|---|
| CN103021806A (en) * | 2012-09-18 | 2013-04-03 | 上海集成电路研发中心有限公司 | Method for preparing silicon nanowire on monocrystalline silicon substrate |
| CN103232023A (en) * | 2013-04-22 | 2013-08-07 | 西安交通大学 | Silicon microstructure processing method based on femtosecond laser treatment and wet etching |
| CN103958397A (en) * | 2011-08-22 | 2014-07-30 | 约尔格·阿布席斯 | Method for producing and aligning nanowires and applications of such a method |
| CN104347385A (en) * | 2013-07-23 | 2015-02-11 | 中芯国际集成电路制造(上海)有限公司 | Selective etching method of semiconductor device, and manufacture method of BSI image sensor |
| CN110854018A (en) * | 2019-11-28 | 2020-02-28 | 长春长光圆辰微电子技术有限公司 | High-selectivity silicon etching solution and use method thereof |
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| CN103232023A (en) * | 2013-04-22 | 2013-08-07 | 西安交通大学 | Silicon microstructure processing method based on femtosecond laser treatment and wet etching |
| CN103232023B (en) * | 2013-04-22 | 2016-06-29 | 西安交通大学 | A kind of silicon microstructure processing method processed based on femtosecond laser with wet etching |
| CN104347385A (en) * | 2013-07-23 | 2015-02-11 | 中芯国际集成电路制造(上海)有限公司 | Selective etching method of semiconductor device, and manufacture method of BSI image sensor |
| CN110854018A (en) * | 2019-11-28 | 2020-02-28 | 长春长光圆辰微电子技术有限公司 | High-selectivity silicon etching solution and use method thereof |
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| CN102157371B (en) | 2012-08-22 |
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