CN102136462B - General output and input unit as well as related device and method thereof - Google Patents
General output and input unit as well as related device and method thereof Download PDFInfo
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- CN102136462B CN102136462B CN2010101189614A CN201010118961A CN102136462B CN 102136462 B CN102136462 B CN 102136462B CN 2010101189614 A CN2010101189614 A CN 2010101189614A CN 201010118961 A CN201010118961 A CN 201010118961A CN 102136462 B CN102136462 B CN 102136462B
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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Abstract
The invention provides a general output and input unit as well as a related device and a method thereof, which can be applied to a crystalline grain/ chip and an integrated circuit. In the embodiment of the invention, each general output and input unit is provided with a power joint pad opening and a plurality of signal joint pad openings so as to realize different functions. According to the function requirement of each general output and input unit, the power joint pad of each general output and input unit is selectively connected with a corresponding electrical conductor and is coupled with a certain voltage by the electrical conductor; and each signal joint pad opening is respectively and selectively connected with a corresponding signal conductor to transfer the signal by the signal conductor.
Description
Technical field
The present invention is about a kind of general output/input unit and relevant apparatus and method, and espespecially a kind of have an electric power connection pad opening and at least one signal bonding pad opening and can utilize the selectivity of these connection pad openings to set and be combined into the general output/input unit and the apparatus and method of using this general output/input unit of difference in functionality.
Background technology
Chip (crystal grain) is the most important hardware foundation of advanced information society with integrated circuit.In order to make chip and obtain the required electric power of running with other circuit (similarly being other crystal grain/chip, integrated circuit and/or printed circuit board (PCB)) exchange signal, in the chip a plurality of output/input units can be set, form the interface that chip connects outward.
In the prior art, each output/input unit in the chip has single connection pad opening, to be connected to other outer circuit of chip by corresponding signal conductor or electric lead (similarly being routing), and each output/input unit only can be carried out a kind of default function, so chip need to have the output/input unit of several different frameworks to come the respectively various functions of executive's interface.For example, the function of some output/input unit just is simple signal driver/output, some output/input unit then can drive and the signal reception by executive signal, also has in addition some output/input units then to be used for specially being coupled predetermined voltage (for example being operating voltage or ground connection) so that chip can be obtained the required electric power of running.
Except the various different output/input units that differentiate because function is different, also Chang Yinwei will reduce the size of chip interface and make the connection pad opening of adjacent output/input unit be arranged in the import and export configuration (staggered IO) that intermeshes in the prior art, and this further makes the diverse location output/input unit also must have different frameworks.In other words, even the function of two output/input units is identical, but for the connection pad opening of these two output/input units is intermeshed, the framework of these two output/input units also can be different.When design one chip, more than all factors all can make the technology of automatic putting and coiling be difficult to be applied to this output/input unit, can only be difficult to make the circuit arrangement optimization manually to carry out putting and winding the line of output/input unit, also increase time and the cost of chip design.
And, the elasticity on the output/input unit of aforementioned this single connection pad opening/simple function also is short of design and uses; In the time will realizing the chip of distinct interface, each all will the redesign for the demand of interface configuration/output/input unit corresponding to arrangement make customized time and cost be difficult to reduce.In addition, the output/input unit of prior art also can't effectively increase the aggregation degree that the connection pad opening arranges, and is difficult to be used in the limited application of connection pad.
Summary of the invention
Therefore, purpose of the present invention namely is will propose a kind ofly can be combined into difference in functionality and effectively increase the general output/input unit of connection pad opening aggregation degree and chip/integrated circuit and the method for using this general output/input unit with the same architecture selectivity.
According to an aspect of the present invention, provide a kind of general output/input unit, this general output/input unit is provided with an electric power connection pad opening, a plurality of signal bonding pad opening, one and is coupled to the electric power block of electric power connection pad opening, a plurality of import and export block that is respectively coupled to a respective signal connection pad opening, and a plurality of application block that is respectively coupled to a corresponding import and export block; Utilize the setting of these connection pad openings and corresponding circuits block, the present invention is that the general output/input unit of available same architecture is combined into different functions.Wherein, electric power connection pad opening can connect the electric lead of a correspondence to be coupled to a predetermined voltage (for example being operating voltage or ground connection) by this electric lead according to desired functionally selective ground; The signal conductor that each signal bonding pad opening also can optionally connect according to functional requirement a correspondence with undertaken by this signal conductor the signal transmission (its can comprise signal driver and signal receive among both at least one of them).
In one embodiment of this invention, the electric power block in each general output/input unit is provided with various electric power coilings, similarly is electric power path (power rail) etc.; When each general output/input unit adjoined each other to realize chip interface, the electric power block of each general output/input unit can couple mutually by the electric power coiling, with transferring electric power between each general output/input unit.In addition, in individual other general output/input unit, its electric power block is coupled to electric power connection pad opening, also electric power transfer to each import and export block and each can be used block.Under this kind framework, the electric power connection pad opening of some the first general output/input units is coupled to predetermined voltage (operating voltage or ground connection) by corresponding electric lead, this the first general output/input unit just can reach the function of transmit outer electric power, its electric power block not only can be with the electric power transfer to the first of operating voltage/ground connection each circuit blocks of general output/input unit itself, can also with electric power transfer to other the second general output/input unit that is not coupled to operating voltage/ground connection by corresponding electric power connection pad opening, make each circuit blocks (import and export block and application block) in these second general output/input units can obtain electric power.
In the general output/input unit of the present invention, a plurality of import and export blocks that are respectively coupled to respective signal connection pad opening can be independent controlled to determine its function respectively.In one embodiment, each import and export block is independent controlled determining whether be enabled respectively, and the import and export block that is enabled can be controlled with executive signal optionally drive in receiving with signal at least one of them.
For example, the general output/input unit of the present invention can be applicable to the memory interface of a memory control chip; Setting drives with signal the controlled executive signal of an import and export block in the one general output/input unit and receives, just can be from this import and export block corresponding signal bonding pad opening transmitting-receiving (receiving/send) data (data) signal or data indication (data strobe) signal.Setting makes another import and export block of same general output/input unit or the import and export block of another general output/input unit is controlled and executive signal drives, and just can export a memory clock pulse (clock), an address (address) signal or an instruction (command) signal from connection pad opening corresponding to this import and export block.Thus, the general output/input unit of the present invention just can be realized out different input functions with the same circuits framework.Because a plurality of signal bonding pad openings in each general output/input unit are independent controlled separately with corresponding import and export block, as long as can connect by suitable signal conductor, even also can realize out multiple signal input functions simultaneously with a general output/input unit; For example, same general output/input unit both can be by a certain signal bonding pad opening receiving and transmitting data signals, again can be from another signal bonding pad opening OPADD signal.In other words, the general output/input unit of the present invention has high design and uses elasticity.
Provide according to a further aspect of the invention the chip of the above-mentioned general output/input unit of a kind of the present invention of application.Except a plurality of general output/input units, this chip also be provided with one control engine, make in each general output/input unit each signal bonding pad opening can according to this setting of controlling engine carry out the signal transmission (similarly be signal driver and signal receive among both at least one of them).More particularly, whether each import and export block that this control engine can independently be set respectively each general output/input unit is enabled to set it, and the control that the import and export block that is enabled (and use block) also can accept to control engine with executive signal optionally drive in receiving with signal at least one of them, and the running that can optionally set each import and export block (and even use block) is configured in response to different environment of operation and functional requirement, for example is different speed/frequency, different signal driver ability and different operating voltage.
For example, chip of the present invention can be a memory control chip, each general output/input unit is to be applied to a memory interface, and the control engine just can make the controlled executive signal of at least one import and export block at least one general output/input unit drive and the signal reception, to receive and dispatch data (data) signal or data indication (data strobe) signal by connection pad opening corresponding to this import and export block.And this control engine also can make at least one import and export block at least one general output/input unit controlled and executive signal drives, to export a memory clock pulse (clock), an address (address) signal or an instruction (command) signal from connection pad opening corresponding to import and export block.
In an embodiment of chip of the present invention, the control engine is to carry out a program code when chip enable, and sets respectively each signal bonding pad opening in each general output/input unit according to execution result.
Provide integrated circuit after a kind of encapsulation according to another aspect of the invention.This integrated circuit includes aforementioned chip of the present invention and a substrate.In embodiments of the present invention, this substrate can be the substrate of a soldered ball trellis array (BallGrid Array, BGA) or the substrate of one or four side pin flat packaging (Quad Flat Package, QFP).In addition, this integrated circuit also can be with substrate system in package (SiP in package shape by a plurality of chips, Silicon in Package) integrated circuit also can promote the use between chip and chip so the present invention is connected framework at chip and wire between substrate.
Just as discussed earlier, the present invention can make the general output/input unit of same architecture/identical type be applied to different functional requirements by the setup control of control engine.The most basic application is to select one to be coupled to substrate with wire (electric lead/signal conductor) in the electric power connection pad opening of each general output/input unit and signal bonding pad opening.For example, a certain general output/input unit only is coupled to substrate by its electric power connection pad opening and introduces operating voltage/ground connection, and each signal bonding pad opening of this general output/input unit just is not attached to substrate, and the import and export block that each signal bonding pad opening is corresponding/application block is controlled anergy also.In like manner, another general output/input unit then can be coupled to substrate to carry out the signal transmission in a signal bonding pad opening, and electric power connection pad opening and other signal bonding pad opening then are coupled to substrate no longer separately.
In further Application Example, as long as the arrangement of signal conductor is suitable, two signal bonding pad openings of same general output/input unit can be respectively signal conductor by mutually insulated be connected on two independent signal pin positions of substrate, make same general output/input unit can realize simultaneously two kinds of different and signal input functions independently.The electric power connection pad opening of this general output/input unit then can be coupled to substrate.
In the another embodiment of integrated circuit of the present invention, this substrate includes an electric power ring (ring) and a signal pin (pin), and being electric lead by correspondence, the electric power connection pad opening that has a general output/input unit in the chip of the present invention at least is connected to aforementioned electric power ring, and a signal bonding pad opening of same general output/input unit also is connected to aforementioned signal pin by the signal conductor of correspondence, make this general output/input unit can not only realize the signal input functions, also external power can be transferred to chip.
Provide according to a further aspect of the present invention a kind of method of design one chip, its key step includes:
Purchase the general output/input unit of the identical one species of a plurality of circuit structures, each general output/input unit can be controlled to realize different functions respectively, just such as aforementioned general output/input unit of the present invention;
Carry out an automatic putting and coiling (automatic placing and routing) with a computer, to determine this position and the coiling of a plurality of general output/input units in chip;
In the chip internal circuit, arrange built-in (numeral) to control engine to set the function of each general output/input unit; For example be to make the control engine be able to according to the function of each general output/input unit optionally that the block that respectively reads in of each general output/input unit of activation receives with executive signal; And make the control engine can be according to the function of each general output/input unit optionally the block that respectively writes out of each general output/input unit of activation drive with executive signal; And
Arrange one to read in application circuit in the chip internal circuit, what be coupled to each general output/input unit respectively reads in block to process the signal that respectively reads in the block transmission; Also can arrange other auxiliary circuit in the chip internal circuit, similarly be phase-locked loop etc.
As discussed earlier, because the present invention can realize different electric power function and signal input functions with the identical general output/input unit of circuit framework, so design of the present invention is high with application elasticity, also can significantly simplify the design cycle of chip, make general output/input unit put with coiling be able to computer and Software tool automation finish.
In order to enable further to understand feature of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing, yet accompanying drawing only provide with reference to and explanation, the present invention is limited.
Description of drawings
Can obtain more deep understanding by following to the present application by reference to the accompanying drawings to the detailed description of preferred embodiment of the present invention, wherein:
Fig. 1 is the schematic diagram that the general output/input unit of the present invention applies to chip.
The different embodiment of the general output/input unit of the present invention in Fig. 2 and Fig. 3 difference schematic diagram 1.
What Fig. 4 to Fig. 6 illustrated is the various Application Examples of Fig. 1 chips.
That Fig. 7 and Fig. 8 illustrate is the various embodiment that Fig. 1 chips is set.
What Fig. 9 illustrated is to use the flow implementation example that the general output/input unit of the present invention carries out chip design.
Embodiment
Please refer to Fig. 1; That Fig. 1 illustrates is the embodiment that the general output/input unit of the present invention is applied to the present invention's one chip 10.In this schematic embodiment, general output/input unit IO of the present invention (0), IO (1) ..., IO (n) is to IO (N-1), and general output/input unit IO (N) namely is used to respectively realize the outer connector MI (0) and MI (1) of chip 10 to IO (M); The internal circuit 12 of chip 10 is exactly the circuit-switched signals of and chip exterior next by these interfaces MI (0), MI (1) etc. and obtains electric power.Illustrate take general output/input unit IO (n) as representative, be provided with an electric power connection pad opening PG (n) and two signal bonding pad opening Fa (n) and Fb (n) among each general output/input unit IO (n) of the present invention.Wherein, the alternative electric lead of a correspondence that connects of electric power connection pad opening PG (n) is to be coupled to a predetermined voltage (i.e. a working voltage source or ground connection) by electric lead; Each signal bonding pad opening Fa (n) also can optionally connect respectively a corresponding signal conductor with Fb (n).
Except a plurality of general output/input units, also be provided with a control engine CE and in the chip 10 and read in application circuit MISC.Control engine CE can utilize setting signal group CS (n) to set the function of corresponding general output/input unit IO (n), each signal bonding pad opening Fa (n) that makes each general output/input unit IO (n) and Fb (n) can be individually independently according to setting carry out signal driver (signal output) and signal reception at least one of them.For further specifying framework and the operation situation of the general output/input unit IO of the present invention (n), please refer to Fig. 2 and Fig. 3; That Fig. 2 and Fig. 3 illustrate is the embodiment of the general output/input unit IO of the present invention (n).
Just as shown in Figure 1, in the embodiment of Fig. 2, be provided with an electric power connection pad opening PG (n) and a plurality of signal bonding pad opening Fa (n) and Fb (n) among the general output/input unit IO of the present invention (n).Electric power connection pad opening PG (n) can connect the electric lead of a correspondence to be coupled to operating voltage or ground connection by this electric lead according to desired functionally selective ground; The signal conductor that each signal bonding pad opening Fa (n)/Fb (n) also can optionally connect according to functional requirement a correspondence with undertaken by signal conductor that signal driver or signal receive at least one of them.
Can be by respectively independent setting for the function that makes each connection pad opening, each connection pad opening PG (n) has corresponding output/input circuit separately with Fa (n), Fb (n).Concerning electric power connection pad opening PG (n), namely be provided with an electric power block pb who is coupled to electric power connection pad opening among the general output/input unit IO (n).For signal bonding pad opening Fa (n) and Fb (n), general output/input unit IO (n) then is respectively equipped with import and export block ioa and iob, and uses block ma and mb.Each import and export block ioa/iob is respectively coupled to corresponding signal bonding pad opening Fa (n)/Fb (n), and each is used block ma/mb and then is respectively coupled to corresponding import and export block ioa/iob.Carry out different settings for these connection pad openings from the corresponding circuits block, the present invention is that the general output/input unit of available same architecture is combined into different functions.
In one embodiment of this invention, can be provided with various electric power coilings corresponding to the electric power block pb of electric power connection pad opening PG (n), similarly be electric power path (power rail) etc.; When each general output/input unit adjoins each other to realize chip interface (similarly being that general output/input unit IO (0), the IO (1) of adjacency among Fig. 1 interface MI (0) are to IO (N-1)), the electric power block pb of each general output/input unit can couple mutually by the electric power coiling, with transferring electric power between each general output/input unit; Perhaps, the general output/input unit of the present invention also can with the circuit unit of other kind (similarly being the fixing circuit unit of function) together in abutting connection with arranging; And the coiling of the electric power of the general output/input unit of the present invention also can couple with transferring electric power mutually with the electric power coiling of these circuit units.In addition, in individual other general output/input unit IO (n), its electric power block pb not only is coupled to electric power connection pad opening PG (n), also can be with electric power transfer to each import and export block ioa/iob and each application block ma/mb.Under this kind framework, the electric power connection pad opening PG (n) of some general output/input unit IO (n) is coupled to operating voltage or ground connection by corresponding electric lead, this general output/input unit IO (n) just can bring into play the function of transmit outer electric power, its electric power block pb not only can be with electric power transfer each circuit blocks to general output/input unit IO (n) itself, can also with electric power transfer to other general output/input unit that is not coupled to operating voltage/ground connection by electric power connection pad opening, for example be the general output/input unit IO (n-1) of an adjacency.So, even the electric power connection pad opening PG (n-1) of general output/input unit IO (n-1) does not connect any electric lead, each circuit blocks among the general output/input unit IO (n-1) (import and export block and application block) still can obtain electric power.Except electric power coiling, also can arrange among the electric power block pb of the present invention ESD protection circuit and power regulator (power regulator) or other power conversion circuit at least one of them.In setting signal group CS (n), setting signal CSp (n) namely is used for setting the function of electric power block pb.
On the other hand, in the general output/input unit IO of the present invention (n), the import and export block ioa/iob that is coupled to respective signal connection pad opening Fa (n)/Fb (n) then can be independent controlled to determine its function respectively; Application block ma/mb then is intended for the interface between corresponding import and export block ioa/iob and chip internal circuit 12 (Fig. 1).In one embodiment, each import and export block ioa/iob is independent controlled to determine whether be enabled respectively, and the import and export block that is enabled can be controlled with executive signal optionally drive in receiving with signal at least one of them, and the running that can optionally set each import and export block (and even use block) is configured in response to different environment of operation and functional requirement, for example is different speed/frequency, different signal driver ability and different operating voltage.In setting signal group CS (n), setting signal CSa (n) namely is used for setting/controlling the function of import and export block ioa (and using block ma); Setting signal CSb (n) then is used for setting/controlling the function that import and export block iob/ uses block mb.Setting signal CSa (n)/CSb (n) can be respectively a digital signal that list is one or more.
In general output/input unit IO (n), include respectively among the import and export block ioa/iob that an import and export is read in sub-block iora/iorb and an import and export is write out sub-block iowa/iowb; Sub-block iora and iowa are controlled by respectively setting signal CSa (n) and can be by optionally activation or anergies.Concerning signal bonding pad opening Fa (n), when import and export is read in sub-block iora when being set signal CSa (n) and setting activation, but import and export block ioa just executive signal receive; And when import and export is write out sub-block iowa and is enabled, but corresponding import and export block ioa then executive signal drive (output).In like manner, whether signal bonding pad opening Fb (n) can carry out the function that signal driver/signal receives with sub-block iowb/iorb, is then set by setting signal CSb (n).
Each sub-block of collocation import and export block ioa/iob, each is used and also is respectively arranged with one among the block ma/mb and uses and read in sub-block mra/mrb and write out sub-block mwa/mwb with an application.Application is read in sub-block mra/mrb and is respectively coupled to corresponding import and export and reads in sub-block iora/iorb, to read in the interface of sub-block as import and export; Use and to write out sub-block mwa/mwb and then be respectively coupled to corresponding import and export and write out sub-block iowa/iowb, to write out the interface of sub-block as import and export.Import and export is read in sub-block iora/iorb, import and export and is write out sub-block iowa/iowb, uses and read in sub-block mra/mrb and application and write out sub-block mwa/mwb and all can be controlled by and control engine CE (Fig. 1) and set its function mode and function.
Take signal bonding pad opening Fa (n) as example, to use and write out circuit such as can being provided with level shifter (levelshifter) among the sub-block mwa, import and export is write out among the sub-block iowa then can be provided with the drive circuit that operates on high working voltage.When the signal driver function of signal bonding pad opening Fa (n) is set activation, the signal (namely writing out signal Swa (n)) that is sent by chip internal circuit 12 (operating on low-work voltage) can transfer to import and export by the conversion (such as level deviation) that sub-block mwa is write out in application and write out sub-block iowa, and import and export is write out sub-block iowa just can write out application signal driver that sub-block mwa transmits to corresponding signal bonding pad opening Fa (n).
In like manner, import and export is read in sub-block iora and can be provided with the circuit that buffer circuit and/or Schmidt trigger (Schmitttrigger) etc. operate on high working voltage.When the signal receiving function of signal bonding pad opening Fa (n) is enabled, the signal that is transmitted outward by chip can read in sub-block iora by import and export by the transmission of signal bonding pad opening Fa (n) and receive, and converts 12 signals that can receive of chip internal circuit (namely reading in signal Sra (n)) to read in the level adjustment of sub-block mra by application after.That is to say that the import and export of signal bonding pad opening Fa (n) is read in sub-block iora and read in sub-block mra one-tenth one capable of being combined with corresponding application and read in block, receive with the signal of realizing signal bonding pad opening Fa (n); And import and export is write out sub-block iowa and corresponding application and is write out sub-block mwa and can regard one as and write out block, to realize the signal driver (output) of signal bonding pad opening Fa (n).
According to identical circuit framework and operation principles, when the signal driver function of signal bonding pad opening Fb (n) is enabled, just can writes out sub-block mwb and import and export by application and write out the running of sub-block iowb and the signal Swb (n) that writes out of inside chip is sent.If the signal receiving function of signal bonding pad opening Fb (n) also is enabled, the signal that signal bonding pad opening Fb (n) receives just can read in sub-block iorb by import and export and read in the running of sub-block mrb and be back to internal circuit 12 with the form of reading in signal Srb (n) with application.Signal bonding pad opening Fa (n) and Fb's (n) reads in signal Sra (n) and Srb (n) and can form the parallel signal group Sr (n) that reads in; Writing out signal Swa (n) and Swb (n) then can comprehensively be considered as one and write out signal group Sw (n).
In the embodiment of Fig. 2, the present invention is arranged at the corresponding import and export block of signal bonding pad opening Fa (n) ioa between signal bonding pad opening Fa (n) and the Fb (n) with using block ma, the import and export block iob of signal bonding pad opening Fb (n) is with the opposite side of using block mb and then be arranged at signal bonding pad opening Fb (n), namely away from that side of electric power connection pad opening PG (n).
The embodiment of continuity Fig. 2, in the embodiments of figure 3, the element with same numeral is also followed identical operation principles, repeats no more in this.But, in the embodiments of figure 3, two import and export block ioa are to be arranged at together between corresponding the signal bonding pad opening Fa (n) and Fb (n) with iob, the corresponding application block of import and export block ioa/iob ma/mb then is arranged at the opposite side of this two signal bonding pad opening Fa (n)/Fb (n) together, namely away from that side of electric power connection pad opening PG (n).In general, when layout designs, the import and export block will be followed certain design rule (design rule) usually with the placement position of using block; Under the design rule of some technology, import and export block and application area interblock must have certain spacing distance, so in the embodiments of figure 3, import and export block ioa/iob is arranged with using block ma/mb difference group, can save the clearance space of import and export block and application area interblock.In addition, under some technology, some active element (active area) can directly be arranged under the connection pad opening, and the general output/input unit of the present invention also can be used this technology.
No matter be that embodiment among Fig. 2 or Fig. 3 all can be applicable to the chip 10 among Fig. 1.Please once again with reference to figure 1.Just as discussing the front, in the internal circuit 12 of chip 10 of the present invention, control engine CE namely is the function of setting each general output/input unit IO (n) with setting signal group CS (n); And the signal that internal circuit 12 will send is namely integrated by control engine CE and is assigned as each and writes out signal group Sw (n), with by suitable general output/input unit IO (n) driver output.On the other hand, receiving the signal group Sr (n) that reads in that returns by each general output/input unit IO (n) then can be by reading in application circuit MISC reception.Each of reading in that application circuit MISC is coupled to each general output/input unit IO (n) used and to be read in sub-block mra/mrb (Fig. 2, Fig. 3), is used for processing by what sub-block mra/mrb transmission was read in each application reading in signal Sra (n)/Srb (n).For example, read in to include among the application circuit MISC and fasten lock circuit, read in the signal of sub-block and form corresponding digital signal with each application of lock of taking a sample/fasten, the internal circuit 12 of chip can be understood.In addition, read among the application circuit MISC and also serial/parallel change-over circuit (SERDES, SErializer/DESerializer) can be set, be converted to digital serial signal with the parallel and column signal (reading in signal) with the different connecting pad opening.Also can arrange other auxiliary circuit in the internal circuit 12, similarly be phase-locked loop etc.
In the embodiment in figure 1, the electric power connection pad opening PG (n) of each general output/input unit IO (n) all is arranged in same hurdle along a direction dir1 with signal bonding pad opening Fa (n) and Fb (n); This direction dir1 is parallel to the side of general output/input unit IO (n), make general output/input unit IO (n) can be along direction dir2 and with other circuit unit (similarly be that general output/input unit IO (0) is to IO (N-1), or the circuit unit of other kind) is arranged as together row (row), wherein, direction dir1 is mutually vertical with direction dir2.In addition, the electric power connection pad opening of adjacent general output/input unit is also aligned with each other along direction dir2; Jointly, the adjacent signals connection pad opening of adjacent general output/input unit equally also aligns along direction dir2.For example, general output/input unit IO (0) is to the electric power connection pad opening PG (0) of IO (N-1) arrangement of aliging to PG (N-1) along direction dir2, and each signal bonding pad opening Fa (0) also aligns along direction dir2 to Fa (N-1).Because the general output/input unit IO of the present invention (n) has gathered the connection pad opening that a plurality of (3) have standalone feature in same hurdle, so can effectively promote the aggregation degree of connection pad opening, save required layout area and the size of chip.
On the other hand, between each connection pad opening PG (n), the Fa (n) and Fb (n) that become the hurdle to arrange, each signal bonding pad opening Fa (n) and Fb (n) all are arranged at the same side of this electric power connection pad opening PG (n), the opposite opposite side that makes electric power connection pad opening PG (n) is signalization connection pad opening not, namely electric power connection pad opening PG (n) is arranged in the outermost of general output/input unit IO (n), becomes in each connection pad opening the connection pad opening near chip edge S.
Generally, in chip 10 of the present invention, because control engine CE can distinguish each import and export block ioa/iob of independent each general output/input unit IO (n) of setting to determine respectively whether the function that its signal driver and signal receive is enabled, so application elasticity of the present invention is very big.For example, chip 10 can be a memory control chip, be used for controlling, the memory of access one outer company, and each the general output/input unit IO (n) in the chip 10 can realize the memory interface of this memory control chip.
In order to control/access memory, the memory control chip should be wanted and can send memory clock pulse (clock), address (address) signal and instruction (command) signal to memory, want to cooperate the transmission of data indication (datastrobe) signal and export data (data) signal to memory, and the data index signal of energy reception memorizer is to cooperate to the memory reception of data signal.When realizing the memory control chip with the technology of the present invention, the present invention just can set the controlled executive signal of an import and export block ioa who makes among the general output/input unit IO (n) and drive and the signal reception, in order to receive and dispatch (receiving/send) data-signal or data index signal from the signal bonding pad opening Fa (n) of correspondence.Setting makes another import and export block iob of general output/input unit IO (n) or the import and export block ioa/iob of another general output/input unit IO (i) is controlled and executive signal drives, just can be from each import and export block corresponding signal bonding pad opening output storage clock pulse, address signal or command signal.
In other words, the present invention can realize out different input functions with each identical general output/input unit of circuit framework.Because a plurality of signal bonding pad openings in each general output/input unit are independent controlled separately with corresponding import and export block, as long as can connect by suitable signal conductor, even also can realize out multiple signal input functions simultaneously with a general output/input unit, for example same general output/input unit both can be by a signal bonding pad opening receiving and transmitting data signals, again can be from another signal bonding pad opening OPADD signal.Hence one can see that, and the general output/input unit of the present invention has high design and uses elasticity.
Please refer to Fig. 4 and Fig. 5; This two figure signal be chip 10 collocation one substrates 20 of the present invention and realize the Application Example of integrated circuit after the encapsulation.Substrate 20 can be the substrate of soldered ball trellis array (Ball Grid Array, BGA) or the substrate of one or four side pin flat packaging (Quad Flat Package, QFP).In addition, this integrated circuit also can be by the system in package (SiP of a plurality of chips with the substrate encapsulated moulding, Silicon inPackage) so integrated circuit is following about respectively being connected framework embodiment and all can promoting the framework that is connected that is in use between chip and the chip between chip of the present invention and substrate.
Just as discussed earlier, the present invention can make the general output/input unit of same architecture be satisfied different functional requirements by the setup control of control engine CE (Fig. 1).The most basic application is to select one to be coupled to substrate 20 with electric lead or signal conductor (similarly being routing) in the electric power connection pad opening PG (n) of each general output/input unit IO (n) and signal bonding pad opening Fa (n)/Fb (n).That Fig. 4 illustrates namely is this kind embodiment; As shown in the figure, general output/input unit IO (k) only is coupled to the electric power pin position PP (k) of substrate 20 to introduce operating voltage by its electric power connection pad opening PG (k); And other each signal bonding pad opening of this general output/input unit IO (k) all is not coupled to substrate 20 separately, and the import and export block that each signal bonding pad opening is corresponding/application block is controlled anergy also.The signal pin SP (i) that another general output/input unit IO (i) then is coupled to substrate 20 in single signal connection pad opening Fa (i) is carrying out handshaking, and this electric power connection pad opening and other signal bonding pad opening once general output/input unit IO (i) is coupled to substrate 20 no longer separately.Similarly, general output/input unit IO (j) also only is coupled to the signal pin SP (j) of substrate 20 by single signal connection pad opening Fb (j).
With respect to the embodiment of Fig. 4, Fig. 5 then shows further application of the invention embodiment.As long as the arrangement of signal conductor is (for example routing can meet the standard of encapsulation) suitably, two signal bonding pad opening Fa (i) of same general output/input unit IO (i) and Fb (i) can be respectively on signal conductor by mutually insulated two independent signal pin position SP (ia) of being connected to substrate and the SP (ib), make same general output/input unit can realize simultaneously two kinds of different and signal input functions independently.The electric power connection pad opening PG (i) of general output/input unit IO (i) then can be coupled to substrate 20.
Please refer to Fig. 6, what it was illustrated is that chip 10 collocation one substrate 22 of the present invention is to be applied to the another embodiment of integrated circuit of the present invention.In this embodiment, substrate 22 is provided with electric power ring (ring) PR working voltage source is provided.In chip 10, the electric power connection pad opening PG (i) of general output/input unit IO (i) namely is that the electric lead by correspondence is connected to electric power ring PR, and the signal bonding pad opening Fa (i) of same general output/input unit IO (i) the also signal conductor by correspondence is connected to signal pin SP (i) on the substrate 22, make general output/input unit IO (i) can not only realize the signal input functions, also can be between electric power ring PR and chip 10 transferring electric power.
In an embodiment of chip 10 of the present invention, control engine CE loads and carries out a program code when chip enable, and sets respectively function in each general output/input unit according to execution result.So, as long as the substrate of suitably collocation correspondence just can utilize the chip of same architecture to form different types of integrated circuit.Please refer to Fig. 7 and Fig. 8; That this two figure illustrates is exactly the present invention realizes respectively different integrated circuits with identical chips embodiment.
In Fig. 7, chip 10 of the present invention is to come the respectively function of setting general-purpose output/input unit IO (i-1), IO (i), IO (i+1) with setting signal group CS (i-1), CS (i), CS (i+1) etc.After chip 10 is assembled in substrate 20, suppose that general output/input unit IO (i-N) is defined as respectively the 0th to N the position (being denoted as Addr (0:N) among Fig. 7) in the address signal to the signal bonding pad opening Fa (i-N) of IO (i) to Fa (i), and general output/input unit IO (i+1) is defined as data-signal DQ (0:M-1) to the signal bonding pad opening Fa (i+1) of IO (i+M) to Fa (i+M).Jointly, will record accordingly the functional definition of each signal bonding pad opening Fa (i-N) to Fa (i), Fa (i+1) to Fa (i+M) among the program code cdA, and recorded corresponding setting signal group CS (i-N) to CS (i) and CS (i+1) to CS (i+M).
Behind chip 10 executive program code cdA, control engine CE just can utilize setting signal group CS (i-N) to CS (i) and CS (i+1) to (CS (i+M) comes the function of setting general-purpose output/input unit IO (i-N) to IO (i), IO (i+1) to IO (i+M); For example, control engine CE can with signal bonding pad opening Fa (i-N) to the function setting of Fa (i) be that signal driver/output is to write out address signal Addr (0:N), signal bonding pad opening Fa (i+1) to the signal driver of Fa (i+M) and signal receiving function then by in the lump activation, to cooperate reading in and writing out of data-signal DQ (0:M-1).
On the other hand, in Fig. 8, same chip 10 is to cooperate another substrate 20 ' take customized as different types of integrated circuit.In this integrated circuit, signal bonding pad opening Fa (i-K) is defined by data-signal DQ (0:K-1) to Fa (i-1), electric power connection pad opening PG (i) is defined by electric power pin position (being denoted as power among Fig. 8), and general output/input unit IO (i+1) then is defined by command signal CMD (0:L-1) to IO (i+L) corresponding signal bonding pad opening Fb (i+1) to Fb (i+L).For cooperating above-mentioned definition, function that each general output/input unit IO (i-K) should possess to IO (i+L) and corresponding setting signal group CS (i-K) have also been recorded among the program code cdB to CS (i+L).Behind control engine CE executive program code cdB, but just enable signal connection pad opening Fa (i-K) to the signal driver function of Fa (i-1) and signal receiving function can receiving and transmitting data signals DQ (0:K-1); General output/input unit IO (i) then is set to the function of electric power transfer.To the Fb (i+L), its signal driver function then is enabled, in order to send (writing out) command signal CMD (0:L-1) concerning signal bonding pad opening Fb (i+1).
When reality is implemented, but control engine CE relevant deposit unit (register) among the setup control engine CE behind the executive program code, control engine CE namely is the function of setting respectively each general output/input unit according to the mode bit in these deposit units.
The said procedure code can be stored in the outer external memory storage (for example being nonvolatile memory) of chip of the present invention, in order to when chip/integrated circuit of the present invention comes into operation program code is loaded on chip 10 of the present invention and controls engine CE.In another kind of embodiment, chip 10 is interior itself just to have built-in nonvolatile memory to store aforementioned program code.Because the application elasticity of the general output/input unit of the present invention is very high, so when being applied to the memory control chip, can go out take identical general output/input unit framework the memory interface (DDR as double data frequency, Double Data Rate) of the different sizes such as DDR1, DDR2 and DDR3.
Because the present invention can realize different electric power function and signal input functions with the identical general output/input unit of circuit framework, so design of the present invention is high with application elasticity, also can significantly simplify the design cycle of chip, make general output/input unit put with coiling be able to computer and Software tool automation finish.Please refer to Fig. 9; What Fig. 9 illustrated is the flow process 900 of using the general output/input unit design chips of the present invention (especially its output/input interface), and its key step includes:
Step 902: purchase the general output/input unit of the identical one species of a plurality of circuit structures, each general output/input unit can be realized respectively different functions, just such as aforementioned general output/input unit IO of the present invention (n).In this step, can determine required general output/input unit according to the functional requirement of integrated circuit, chip and interface, need with several general output/input units, and each general output/input unit function that should possess.
Step 904: for the general output/input unit of previous step, carry out the tool software of an automatic putting and coiling (automatic placing and routing) with a computer, to determine position and the coiling of these general output/input units in chip.
Step 906: in the chip internal circuit, arrange built-in (numeral) to control engine to set the function of each general output/input unit.For example, in the control engine, suitable digital control logic and register are set, make the control engine can be according to the function of each general output/input unit optionally the block that respectively reads in of each general output/input unit of activation receive with executive signal, and the block that respectively writes out of each general output/input unit of activation drives with executive signal to make the control engine be able to according to the function of each general output/input unit optionally.
Step 908: in the chip internal circuit, arrange other circuit.The application circuit that reads in that the front discussed for example being set in chip, also can arranging other auxiliary circuit in the chip internal circuit, similarly is phase-locked loop etc.
The sequencing of above-mentioned steps can change arbitrarily on demand.For example, also can carry out first step 906 and 908, carry out step 904 again, unify to determine to control position and the coiling of engine, various auxiliary circuit and each general output/input unit with the technology of automatic putting and coiling.
Before the step 902 of carrying out flow process 900 of the present invention, can pre-designed general output/input unit of the present invention, and its design (with the mode of setting) is recorded in the circuit unit database (cell library), as the resource of circuit design.Deng to design/during customized chip, just directly adopt the general output/input unit that has before designed in the circuit unit database thus.
In summary, compared to prior art, in general output/input unit of the present invention and correlation technique, the general output/input unit of same is the multiple different function that realizes out capable of being combined, has better application elasticity, also can promote the aggregation degree of interface.Extend the extensive use of each general output/input unit, the chip of using the general output/input unit of the present invention is also related to have better function elasticity, can be in response to various integrated circuit demand.
In sum; although the present invention discloses as above with preferred embodiment; yet it is not to limit the present invention; anyly be familiar with this operator; without departing from the spirit and scope of the present invention; when can doing the various changes that are equal to or replacement, so protection scope of the present invention is when looking accompanying being as the criterion that the application's claim scope defines.
Claims (17)
1. a general output/input unit is applied in the chip, and this chip comprises a control engine, and described general output/input unit includes:
One electric power connection pad opening, it optionally connects an electric lead to be coupled to a predetermined voltage by this electric lead;
At least one signal bonding pad opening, each signal bonding pad opening optionally connect a signal conductor to carry out the signal transmission by this signal conductor;
At least one import and export block, each import and export block is coupled to the signal bonding pad opening of a correspondence, and each import and export block is by the respectively independent control of this control engine, and to set its function, wherein this control engine is set the speed/frequency of each import and export block operation; And
At least one application block couples the import and export block of a correspondence, as the interface between the internal circuit of this corresponding import and export block and this chip;
Wherein this at least one import and export block comprises that writing out sub-block and reads in sub-block, this at least one application block comprises that then sub-block is write out in a corresponding application and sub-block is read in an application, this writes out sub-block and is provided with the drive circuit that operates on high working voltage, this application is write out sub-block and is provided with level shifter, this reads in sub-block and is provided with buffer circuit or Schmidt trigger, and this application is read in sub-block and is provided with level shifter.
2. general output/input unit according to claim 1 is characterized in that, this electric power connection pad opening is to be arranged in same hurdle with each signal bonding pad opening.
3. general output/input unit according to claim 2 is characterized in that, each signal bonding pad opening all is arranged at a side of this electric power connection pad opening, and the opposite opposite side that makes this electric power connection pad opening is signalization connection pad opening not.
4. general output/input unit according to claim 3, it is characterized in that, to be applied to a memory interface, wherein, have at least the controlled and executive signal of an import and export block to drive with signal and receive, to receive and dispatch a data-signal or a data index signal from signal bonding pad opening corresponding to this import and export block.
5. general output/input unit according to claim 3, it is characterized in that, to be applied to a memory interface, wherein, have at least the controlled and executive signal of an import and export block to drive, to export a memory clock pulse, an address signal or a command signal from signal bonding pad opening corresponding to this import and export block.
6. a chip is characterized in that, includes:
One control engine, and
A plurality of general output/input units are coupled to this control engine, and each general output/input unit includes:
One electric power connection pad opening, its alternative electric lead of a correspondence that connects is to be coupled to a predetermined voltage by this electric lead;
At least one signal bonding pad opening, each signal bonding pad opening optionally connect the signal conductor of a correspondence to carry out the signal transmission according to the setting of this control engine;
At least one import and export block, each import and export block is coupled to the signal bonding pad opening of a correspondence, and this control engine be set respectively in each general output/input unit each import and export block with undertaken by each corresponding signal bonding pad opening that signal driver and signal receive at least one of them, wherein this control engine is set the speed/frequency that each import and export block operates; And
At least one application block couples the import and export block of a correspondence, as the interface between the internal circuit of this corresponding import and export block and this chip;
Wherein this at least one import and export block comprises that writing out sub-block and reads in sub-block, this at least one application block comprises that then sub-block is write out in a corresponding application and sub-block is read in an application, this writes out sub-block and is provided with the drive circuit that operates on high working voltage, this application is write out sub-block and is provided with level shifter, this reads in sub-block and is provided with buffer circuit or Schmidt trigger, and this application is read in sub-block and is provided with level shifter.
7. chip according to claim 6, it is characterized in that, each general output/input unit is to be applied to a memory interface, and this control engine is that the controlled executive signal of at least one import and export block at least one general output/input unit is driven and the signal reception, to receive and dispatch a data-signal or a data index signal from signal bonding pad opening corresponding to this import and export block.
8. chip according to claim 6, it is characterized in that, each general output/input unit is to be applied to a memory interface, and this control engine is to make at least one import and export block at least one general output/input unit controlled and executive signal drives, to export a memory clock pulse, an address signal or a command signal from signal bonding pad opening corresponding to this import and export block.
9. chip according to claim 6 is characterized in that, this control engine is to carry out a program code when this chip enable, and sets respectively each signal bonding pad opening in each general output/input unit according to execution result.
10. chip according to claim 6, it is characterized in that, in each general output/input unit, this electric power connection pad opening and each signal bonding pad opening are to be arranged in a hurdle along a first direction, and the electric power connection pad opening of adjacent general output/input unit is along second direction alignment, and wherein this second direction is vertical with this first direction.
11. chip according to claim 6, it is characterized in that, in each general output/input unit, this electric power connection pad opening and each signal bonding pad opening are to be arranged in a hurdle along a first direction, and the signal bonding pad opening of adjacent general output/input unit is along second direction alignment, and wherein this second direction is vertical with this first direction.
12. an integrated circuit is characterized in that, includes:
One substrate;
One chip, it includes:
One control engine, and
A plurality of general output/input units are coupled to this control engine, and each general output/input unit includes:
One electric power connection pad opening, its alternative is connected to this substrate by the electric lead of a correspondence, to be coupled to a predetermined voltage by this electric lead;
At least one signal bonding pad opening, each signal bonding pad opening optionally are connected to this substrate to carry out the signal transmission according to the setting of this control engine by the signal conductor of a correspondence;
At least one import and export block, each import and export block is coupled to the signal bonding pad opening of a correspondence, and this control engine be set respectively in each general output/input unit each import and export block with undertaken by each corresponding signal bonding pad opening that signal driver and signal receive at least one of them, wherein this control engine is set the speed/frequency that each import and export block operates; And
At least one application block couples the import and export block of a correspondence, as the interface between the internal circuit of this corresponding import and export block and this chip;
Wherein this at least one import and export block comprises that writing out sub-block and reads in sub-block, this at least one application block comprises that then sub-block is write out in a corresponding application and sub-block is read in an application, this writes out sub-block and is provided with the drive circuit that operates on high working voltage, this application is write out sub-block and is provided with level shifter, this reads in sub-block and is provided with buffer circuit or Schmidt trigger, and this application is read in sub-block and is provided with level shifter.
13. integrated circuit according to claim 12, it is characterized in that, this substrate includes an electric power ring and a signal pin, be connected to this electric power ring and the electric power connection pad opening that has a general output/input unit in this chip at least is electric lead by correspondence, and at least one signal bonding pad opening of this general output/input unit is that signal conductor by correspondence is connected to this signal pin.
14. integrated circuit according to claim 12, it is characterized in that, this substrate includes an electric power pin position, be connected to this electric power pin position and the electric power connection pad opening that a general output/input unit is arranged in this chip is electric lead by correspondence, and each signal bonding pad opening of this general output/input unit all is not connected to this substrate by the signal conductor of correspondence.
15. integrated circuit according to claim 12, it is characterized in that, this substrate includes two independently signal pins, and each general output/input unit of this chip includes respectively a plurality of signal bonding pad openings, and two signal bonding pad openings that a general output/input unit is wherein arranged are that the signal conductor by correspondence is connected to these two independently signal pins respectively.
16. the method for design one chip is characterized in that, comprises following steps:
Purchase the identical general output/input unit of a plurality of kinds, each general output/input unit includes:
One electric power connection pad opening, it can selectivity connect the electric lead of a correspondence to be coupled to a predetermined voltage by this electric lead according to the function of this general output/input unit;
At least one signal bonding pad opening, each signal bonding pad opening are optionally to connect the signal conductor of a correspondence according to the function of this general output/input unit to carry out the signal transmission;
At least one import and export block, each import and export block is coupled to the signal bonding pad opening of a correspondence; And
At least one application block couples the import and export block of a correspondence, as the interface between the internal circuit of this corresponding import and export block and this chip;
Carry out an automatic putting and coiling with a computer, to determine this position and the coiling of a plurality of general output/input units in this chip; And
In this chip, arrange a built-in control engine, this control engine is each import and export block of setting respectively in each general output/input unit, to set the function of each general output/input unit, wherein this control engine is set the speed/frequency of each import and export block operation;
Wherein this at least one import and export block comprises that writing out sub-block and reads in sub-block, this at least one application block comprises that then sub-block is write out in a corresponding application and sub-block is read in an application, this writes out sub-block and is provided with the drive circuit that operates on high working voltage, this application is write out sub-block and is provided with level shifter, this reads in sub-block and is provided with buffer circuit or Schmidt trigger, and this application is read in sub-block and is provided with level shifter.
17. method according to claim 16 is characterized in that, when respectively this signal bonding pad opening in each general output/input unit carries out signal when transmitting by this signal conductor, be optionally carry out in the reception of signal driver and signal at least one of them.
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| US6798069B1 (en) * | 2003-03-28 | 2004-09-28 | Lsi Logic Corporation | Integrated circuit having adaptable core and input/output regions with multi-layer pad trace conductors |
| CN1649129A (en) * | 2004-01-30 | 2005-08-03 | 恩益禧电子股份有限公司 | Automatic placement and routing device, method for placement and routing of semiconductor device, semiconductor device and manufacturing method of the same |
| CN1771598A (en) * | 2003-04-09 | 2006-05-10 | 飞思卡尔半导体公司 | Integrated circuit die I/O cells |
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| US6798069B1 (en) * | 2003-03-28 | 2004-09-28 | Lsi Logic Corporation | Integrated circuit having adaptable core and input/output regions with multi-layer pad trace conductors |
| CN1771598A (en) * | 2003-04-09 | 2006-05-10 | 飞思卡尔半导体公司 | Integrated circuit die I/O cells |
| CN1649129A (en) * | 2004-01-30 | 2005-08-03 | 恩益禧电子股份有限公司 | Automatic placement and routing device, method for placement and routing of semiconductor device, semiconductor device and manufacturing method of the same |
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