CN101388238A - Flash storage chip an flash array storage system - Google Patents
Flash storage chip an flash array storage system Download PDFInfo
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- CN101388238A CN101388238A CNA2007101496466A CN200710149646A CN101388238A CN 101388238 A CN101388238 A CN 101388238A CN A2007101496466 A CNA2007101496466 A CN A2007101496466A CN 200710149646 A CN200710149646 A CN 200710149646A CN 101388238 A CN101388238 A CN 101388238A
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Abstract
The invention relates to a flash storage chip, which comprises a circuit board, a microcontroller, a flash and a high speed peripheral element interconnection connecting interface, wherein the microcontroller, the flash and the high speed peripheral element interconnection connecting interface are sealed on the single circuit board together, and the microcontroller is equipped with a flash interface and a high speed peripheral element interconnection interface. When a system host computer wants to write data to the flash storage chip, and the microcontroller receives data through the high speed peripheral element interconnection interface and writes the data to the flash through the flash interface. When the system host computer wants to read the data which are stored in the flash storage chip, the microcontroller reads the data through the flash interface, and transports the data to the system host computer through the high speed peripheral element interconnection interface via the high speed peripheral element interconnection connecting interface.
Description
Technical field
The present invention relates to a kind of memory storage, and particularly relate to a kind of flash memory chip and flash array storage system.
Background technology
Along with the constantly evolution of electronics industry on semiconductor technology, electronic product strides forward towards directions such as promoting processing speed and multifunction.In computer system, the processing speed of logical process element (for example central processing unit) and internal memory also constantly promotes under this trend.
Yet the processing speed except logical process element and internal memory in computer system affects the operational paradigm of computer system, and the access speed of access device (for example hard disk) also is one of the key factor that influences the operational paradigm of computer system.Promote its access speed because access device can't be broken through the technology barrier of self, make its access speed still can't cooperate, thereby cause the overall efficiency of computer system to promote effectively with the processing speed of central processing unit and internal memory.
The speed of transmission data depends on the transmission speed of bus, in order to make the enhancing efficiency of computing machine, relevant dealer constantly researches and develops the interface of carrying the energy that comes into force, for example integrated driving electronics (IDE) interface, peripheral element interconnection (PCI) interface, high-speed peripheral element interconnection (PCI Express) connecting interface etc.
In addition, in order to promote the access speed of access device in the computer system, prior art proposes a kind of disk array (Redundant Array of Independent Disks, method RAID).Disk array is that a plurality of access devices are combined as an access device.When access device carried out the access of data, data can be divided into a plurality of parts, simultaneously and be accessed in abreast in a plurality of access devices afterwards.Therefore disk array can provide access speed faster.In addition, lose for fear of damage the data that caused because of a certain entity disc driver, the RAID technology is more utilized the idea of parity check, assists data reconstruction work in case of necessity.
Yet, therefore bulky because the technology of this kind disk array must be used a plurality of Winchester disk drive, so can't be applied to general small-sized portable computer system.Therefore, there is it to develop and is applied to the disc array system that uses in the small-size computer device.
Summary of the invention
The invention provides a kind of flash array storage system, its volume I is applicable to minicomputer system.
The invention provides a kind of flash array storage system, its volume I is applicable to minicomputer system, can be compatible with the integrated driving electrical interface of host computer system.
The invention provides a kind of flash memory chip, it is to be encapsulated as one chip, therefore can make the volume-diminished of whole flash array storage system, to be applicable to minicomputer system.
The invention provides a kind of flash memory chip, it is to be encapsulated as one chip, therefore can make the volume-diminished of whole flash array storage system, being applicable to minicomputer system, and can be compatible with the integrated driving electrical interface of host computer system.
The present invention proposes a kind of flash array storage system, and it comprises a plurality of flash memory chip, a flash array controller and a data transmission interface.Flash memory chip is to arrange with the array pattern, wherein, each flash memory chip comprises a single circuit board, a microcontroller, at least one flash memory and a high-speed peripheral element interconnection (Peripheral Component Interconnect Express, PCI Express) connecting interface.Microcontroller is encapsulated on the single circuit board and has a flash interface and a PCI Express interface.Flash memory is encapsulated on the single circuit board and is coupled to microcontroller, in order to the storage data.The PCIExpress connecting interface is encapsulated on the single circuit board and is coupled to microcontroller.The flash array controller is to be coupled to flash memory chip to read and store data in the flash memory chip in order to be controlled at.Data transmission interface is to be coupled to the flash array controller, in order to be connected to system host and transfer instruction and data between system host and flash array storage system.Wherein, when system host desires to write data to the flash array storage system, then the flash array controller can assign flash memory chip one of them writes data at least, and the microcontroller of the flash memory chip of being assigned can receive data and write data to flash memory by flash interface by PCI Express connecting interface and PCI Express interface.Wherein when system host desires to read the data that are stored in the flash array storage system, then the flash array controller can be searched the flash memory chip of these data of storage, and the microcontroller of storing the flash memory chip of these data can read the data that are stored in the flash memory by flash interface, and transmits data by PCI Express interface and PCI Express connecting interface.
In one embodiment of this invention, at least one flash memory is a SLC (Single Level Cell-single-stage storage unit) flash memory or a MLC (Multi Level Cell-multi-level memory cell) and non-(NAND) flash memory in above-mentioned each flash memory chip.
In one embodiment of this invention, the method that in above-mentioned each flash memory chip microcontroller and flash memory is packaged on the single circuit board comprises four limit flat non-connection pin formulas (QFN), planar array formula (LGA), solder ball array type (BGA), ultra-thin plane plastic pellet bearing-type (LQFP), box-shaped flat pack type (QFP), crystal grain formula (DIE), the direct packaged type of chip (COB) or single pin packaged type (SIP) package method.
In one embodiment of this invention, above-mentioned flash memory chip and flash array storage system can be formed transmitting terminal (Tx) and receiving end (Rx) by at least one group of channel simplex at the physical layer of transmission data.
The present invention proposes a kind of flash array storage system, and it comprises a plurality of flash memory chip and a flash array driver.Flash memory chip is to arrange with the array pattern, and wherein each flash memory chip comprises a single circuit board, a microcontroller, at least one flash memory and a PCI Express connecting interface.Microcontroller is encapsulated on the single circuit board and has a flash interface, a PCI Express interface and a virtual integrated driving electrical interface (Integrated Device Electronics, IDE) module, virtual ID E module has in order to integrated driving electrical interface main control end that receives the IDE instruction and the IDE device end that instructs in order to execution IDE, and virtual ID E module can be done in fact by the firmware program that microcontroller is carried out.Flash memory is encapsulated on the single circuit board and is coupled to microcontroller, in order to the storage data.PCI Express connecting interface is encapsulated on the single circuit board and is coupled to microcontroller, in order to be connected to system host.The flash array driver is installed in the system host and is carried out to be controlled at by system host and reads and store data in the flash memory chip.Wherein when system host desires to read the data that are stored in the flash array storage system, then the flash array driver can be searched the flash memory chip of these data of storage, and the virtual ID E module of storing the flash memory chip of these data can receive the IDE instruction of being assigned with the executive system main frame, and these data can be read and are that the form that PCI Express connecting interface can receive transmits by PCI Express interface conversion by flash interface, wherein when system host desires to write data to the flash array storage system, then the flash array driver can assign flash memory chip one of them writes this data at least, and the virtual ID E module of the flash memory chip of being assigned can receive the IDE instruction of being assigned with the executive system main frame, and the data of desiring to write can be received and are converted to the form that flash memory can receive by flash interface and write to flash memory by PCI Express connecting interface and PCI Express interface.
In one embodiment of this invention, at least one flash memory is instead and (NAND) flash memory of a SLC (Single Level Cell) or MLC (Multi Level Cell) in above-mentioned each flash memory chip.
In one embodiment of this invention, the above-mentioned method that in each flash memory chip microcontroller and flash memory is packaged on the single circuit board comprises four limit flat non-connection pin formulas (QFN), planar array formula (LGA), solder ball array type (BGA), ultra-thin plane plastic pellet bearing-type (LQFP), box-shaped flat pack type (QFP), crystal grain formula (DIE), the direct packaged type of chip (COB) or single pin packaged type (SIP) package method.
In one embodiment of this invention, above-mentioned integrated driving electrical interface instruction is compatible with ATA specification or sequence A TA specification.
The present invention proposes a kind of flash memory chip, and it comprises a single circuit board, a microcontroller, at least one flash memory and a PCI Express connecting interface.Microcontroller is encapsulated on the single circuit board and has a flash interface and a PCI Express interface.Flash memory is encapsulated on the single circuit board and is coupled to microcontroller, in order to the storage data.PCI Express connecting interface is encapsulated on the single circuit board and is coupled to microcontroller.Wherein, when system host desired to write data to flash memory chip, then microcontroller can receive data and write these data to flash memory by flash interface by PCI Express interface.Wherein when system host desires to read the data that are stored in flash memory chip, then microcontroller can read data in the flash memory by flash interface, and is sent to system host by PCI Express interface via PCI Express connecting interface.
In one embodiment of this invention, at least one above-mentioned flash memory is that a SLC (Single LevelCell) or MLC (Multi Level Cell) instead reach (NAND) flash memory.
In one embodiment of this invention, the method that is encapsulated on the single circuit board of above-mentioned microcontroller and flash memory comprises four limit flat non-connection pin formulas (QFN), planar array formula (LGA), solder ball array type (BGA), ultra-thin plane plastic pellet bearing-type (LQFP), box-shaped flat pack type (QFP), crystal grain formula (DIE), the direct packaged type of chip (COB) or single pin packaged type (SIP) package method.
In one embodiment of this invention, above-mentioned flash memory chip, the pin position after its encapsulation comprises pin positions such as PERST#, REFCLK+, REFCLK-, PETp0, PETn0, PERp0, PERn0, Power, Ground at least.
The present invention proposes a kind of flash memory chip, and it comprises single circuit board, microcontroller, at least one flash memory and PCI Express connecting interface.Microcontroller is encapsulated on the single circuit board and has a flash interface, a PCI Express interface and a virtual ID E module, virtual ID E module has in order to IDE main control end that receives the IDE instruction and the IDE device end that instructs in order to execution IDE, and virtual ID E module is being done in fact by the firmware program that microcontroller is carried out.Flash memory is encapsulated on the single circuit board and is coupled to microcontroller, in order to the storage data.PCI Express connecting interface is encapsulated on the single circuit board and is coupled to microcontroller.Wherein, when system host desires to read the data that are stored in the flash memory, then the IDE instruction assigned of system host can be sent to virtual ID E module being carried out by virtual ID E module, and the data that are stored in the flash memory can read and are that the PCI Express connecting interface form that can receive is to be sent to system host by PCI Express interface conversion by flash interface.Wherein, when system host desires to write data to flash memory, then the IDE instruction assigned of system host can be sent to virtual ID E module being carried out by virtual ID E module, and the data of desiring to write can receive and are converted to form that flash memory can receive to write to flash memory by flash interface by PCI Express interface.
In one embodiment of this invention, at least one above-mentioned flash memory is that a SLC (Single LevelCell) or MLC (Multi Level Cell) instead reach (NAND) flash memory.
In one embodiment of this invention, the method that is packaged on the single circuit board of above-mentioned microcontroller and flash memory comprises four limit flat non-connection pin formulas (QFN), planar array formula (LGA), solder ball array type (BGA), ultra-thin plane plastic pellet bearing-type (LQFP), box-shaped flat pack type (QFP), crystal grain formula (DIE), the direct packaged type of chip (COB) or single pin packaged type (SIP) package method.
In one embodiment of this invention, above-mentioned IDE instruction is compatible with ATA or sequence A TA specification.
The present invention proposes a kind of flash memory chip, and it comprises single circuit board, microcontroller, a plurality of flash memory and PCI Express connecting interface.Microcontroller is encapsulated on the single circuit board and has flash interface and PCI Express interface.Flash memory is encapsulated on the single circuit board and is coupled to microcontroller, in order to the storage data.PCI Express connecting interface is encapsulated on the single circuit board and is coupled to microcontroller.Wherein when system host desired to write data to flash memory chip, then microcontroller can receive data and write these data to flash memory by flash interface by the PCIExpress interface.Wherein, when system host desired to read the data that are stored in flash memory chip, then microcontroller can read data in the flash memory by flash interface, and is sent to system host by PCI Express interface via PCI Express connecting interface.Wherein the data read of those flash memories is to carry out with a parallel processing with writing.
In one embodiment of this invention, at least one above-mentioned flash memory is that a SLC (Single LevelCell) or MLC (Multi Level Cell) instead reach (NAND) flash memory.
In one embodiment of this invention, the method that is packaged on the single circuit board of above-mentioned microcontroller and flash memory comprises four limit flat non-connection pin formulas (QFN), planar array formula (LGA), solder ball array type (BGA), ultra-thin plane plastic pellet bearing-type (LQFP), box-shaped flat pack type (QFP), crystal grain formula (DIE), the direct packaged type of chip (COB) or single pin packaged type (SIP) package method.
In one embodiment of this invention, above-mentioned flash memory chip, the pin position after its encapsulation comprises pin positions such as PERST#, REFCLK+, REFCLK-, PETp0, PETn0, PERp0, PERn0, Power, Ground at least.
In one embodiment of this invention, above-mentioned system host and flash memory chip can be formed transmitting terminal (Tx) and receiving end (Rx) by at least one group of channel simplex at the physical layer of transmission data.
In one embodiment of this invention, above-mentioned microcontroller more comprises a virtual ID E module, virtual ID E module has in order to IDE main control end that receives the IDE instruction and the IDE device end that instructs in order to execution IDE, and virtual ID E module is being done in fact by the firmware program that microcontroller is carried out.
The present invention has the flash array storage system of the flash memory chip of PCIExpress interface because of employing, therefore can dwindle the volume of medium, promotes message transmission rate simultaneously.
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 is the calcspar that illustrates the flash memory system according to first embodiment of the invention.
Fig. 2 shows the detailed block diagram of flash memory chip shown in Figure 1.
Fig. 3 is the calcspar that illustrates the flash array storage system according to second embodiment of the invention.
Fig. 4 shows the detailed block diagram of flash memory chip shown in Figure 3.
Fig. 5 shows the pin position standard specification of PCI Express.
Fig. 6 is the detailed block diagram that illustrates flash memory chip according to another embodiment of the present invention.
The reference numeral explanation
100: the flash array storage system
102: the flash array controller
104: data transmission interface
106-1,106-2,106-3,106-n: flash memory chip
112: single circuit board
114: microcontroller
116,116a, 116b: flash memory
118:PCI Express connecting interface
122: the flash memory interface
124:PCI Express interface
126: the flash management module
300: the flash array storage system
302: the flash array driver
306-1,306-2,306-3,306-n: flash memory chip
312: single circuit board
314: microcontroller
316: flash memory
318:PCI Express connecting interface
322: the flash memory interface
324:PCI Express interface
The 326:IDE module
The 326a:IDE main control end
The 326b:IDE device end
328: the flash management module.
Embodiment
Characteristics such as non-volatile, shatter-proof with low power consuming since flash memory comes out, high storage density in many portable apparatus, replace the internal memory of EEPROM or electromagnetism power supply gradually.More because present semiconductor technology progresses greatly the growth that the storage density of flash memory and transmission speed are advanced by leaps and bounds especially day by day.Therefore, the present invention uses flash memory to replace rigid hard disk in the disk array to realize the purpose of miniaturization.
[first embodiment]
Fig. 1 is the calcspar of the flash memory system that illustrates according to first embodiment of the invention.
Please refer to Fig. 1, flash array storage system 100 comprises a flash array controller 102, a data transmission interface 104 and a plurality of flash memory chip 106-1 to 106-n.
In embodiments of the present invention, system host and flash array storage system 100 can be formed transmitting terminal (Tx) and receiving end (Rx) by at least one group of channel simplex at the physical layer of transmission data.
Flash memory chip 106-1 to 106-n arranges and is coupled to flash array controller 102 with the array pattern, and in order to the storage data.Flash memory chip 106-1 to 106-n has identical structure, therefore, will be that example describes with flash memory chip 106-1 below.
Fig. 2 shows the detailed block diagram of flash memory chip shown in Figure 1.
Please refer to Fig. 2, flash memory chip 106-1 comprises a single circuit board 112, a microcontroller 114, at least one flash memory 116 and a PCI Express connecting interface 118.
Microcontroller 114 is to be encapsulated on the single circuit board 112.Microcontroller 114 is in order to the overall operation of control flash memory chip 106-1.Microcontroller 114 has a flash interface 122 and a PCIExpress interface 124.Flash interface 122 is the interfaces in order to access flash memory 116.And PCI Express interface 124 is in order to data are converted to 118 receptible forms of PCI Express connecting interface, to transmit by PCI Express connecting interface 118.In addition, microcontroller 114 also comprises flash management module 126, and it is in order to carry out functions such as flash memory block management, data error correcting (error correcting), power management.The flash memory block management function for example is execution average abrasion (wear leveling), bad block management, safeguards mapping table (mapping table) etc.In embodiments of the present invention, the method that microcontroller 114 is packaged on the single circuit board 112 is four limit flat non-connection pin formulas (QFN).But it must be appreciated that the present invention also can use planar array formula (LGA), solder ball array type (BGA), ultra-thin plane plastic pellet bearing-type (LQFP), box-shaped flat pack type (QFP), crystal grain formula (DIE), the direct packaged type of chip (COB) or single pin packaged type package methods such as (SIP).
PCI Express connecting interface 118 also is to be encapsulated on the single circuit board 112 and to be coupled to microcontroller 114, and it is in order to the transmission data.Specifically, flash memory chip 106-1 can comprise pin positions such as PERST#, REFCLK+, REFCLK-, PETp0, PETn0, PERp0, PERn0, Power, Ground at least according to the specification (as shown in Figure 5) of PCIExpress connecting interface 118.
In the present embodiment, when system host desires to write data to flash array storage system 100, the then instruction of flash array controller 102 meeting receiving system main frames, and the data that write are divided into a plurality of parts, and mean allocation transmits at least one flash memory chip 106-1 to 106-n.And the microcontroller 114 that receives the flash memory chip 106-1 to 106-n of this partition data can receive data and be stored to flash memory 116 by flash interface 122 by PCIExpress connecting interface 118 and PCI Express interface 124.
In the present embodiment, when system host desires to read the data that are stored in flash array storage system 100, then flash array controller 102 can be searched the data that it desires to read according to the instruction of system host, and the microcontroller 114 of storing at least one flash memory chip 106-1 to 106-n of these data can read these data that are stored in the flash memory 116 by flash interface 122, and transmits these data by 124 conversions of PCI Express interface and PCI Express connecting interface 118.That is to say that the data that receive by PCI Express connecting interface can be converted to the form that flash memory is accepted by flash interface, and can be the form that PCI Express connecting interface is accepted by PCI Express interface conversion from the data that flash memory reads.
In embodiments of the present invention, flash memory chip 106-1 to 106-n is encapsulated as one chip, therefore can make the volume-diminished of whole flash array storage system 100, to be applicable to minicomputer system.Moreover in the present embodiment, the external transmission interface of flash memory chip 106-1 to 106-n is to use high-speed PCI Express interface, its transfer rate when 1Lane single channel (PCIe x1) up to 250MB/s.The base this, in the present embodiment, can effectively promote the data rate of array storage system.
[second embodiment]
Fig. 3 is the calcspar that illustrates the flash array storage system according to second embodiment of the invention.
Please refer to Fig. 3, flash array storage system 300 comprises a flash array driver 302 and a plurality of flash memory chip 306-1 to 306-n.
Flash memory chip 306-1 to 306-n arranges and is coupled to system host with the array pattern, and in order to the storage data.Flash memory chip 306-1 to 306-n has identical structure, therefore, will be that example describes with flash memory chip 306-1 below.
Fig. 4 shows the detailed block diagram of flash memory chip shown in Figure 3.
Please refer to Fig. 4, flash memory chip 306-1 comprises a single circuit board 312, a microcontroller 314, at least one flash memory 316 and a PCI Express connecting interface 318.
Single circuit board 312 is in order to all component package substrate together with flash memory chip 306-1.
In embodiments of the present invention, the method that microcontroller 314 is packaged on the single circuit board 312 is four limit flat non-connection pin formulas (QFN).But it must be appreciated that the present invention also can use planar array formula (LGA), solder ball array type (BGA), ultra-thin plane plastic pellet bearing-type (LQFP), box-shaped flat pack type (QFP), crystal grain formula (DIE), the direct packaged type of chip (COB) or single pin packaged type package methods such as (SIP).
PCI Express connecting interface 318 also is to be encapsulated on the single circuit board 312 and to be coupled to microcontroller 314, and it is in order to the transmission data.Specifically, flash memory chip 306-1 can comprise pin positions such as PERST#, REFCLK+, REFCLK-, PETp0, PETn0, PERp0, PERn0, Power, Ground at least according to the specification (as shown in Figure 5) of PCIExpress connecting interface 318.
In the present embodiment, when with 300 runnings of flash array storage system, system host can be carried out flash array driver 302, and microcontroller 314 can apprizing system main frame flash memory chip 306-1 to 306-n be the IDE memory storage.
The base this, when system host desires to read the data that are stored in the flash array storage system 300, then flash array driver 302 can be according to the reading command of system host, for example IDE instruction, search the data that it desires to read, and this IDE instruction is sent at least one flash memory chip 306-1 to 306-n of these data of storage.Afterwards, store the virtual ID E module 326 of the flash memory chip 306-1 to 306-n of these data and can carry out this IDE instruction, and the microcontroller 314 of storing the flash memory chip 306-1 to 306-n of these data can instruct according to this and read in the data of desiring to read in the flash memory 316 by flash interface 322, and is stored in data in the flash memory 316 and can be converted to 318 forms that can receive of PCI Express connecting interface by PCI Express interface 324 and be sent to system host.
In addition, when system host desires to write data to flash array storage system 300, then flash array driver 302 can receive the instruction that writes of system host, for example IDE instruction, and the data that write are divided into a plurality of parts, and the data that will cut apart send at least one flash memory chip 306-1 to 306-n to the IDE instruction.Afterwards, receive instruction and can carry out this IDE instruction, and the data of desiring to write can be converted to 316 forms that can receive of flash memory by flash interface 322 and write to flash memory 316 with the virtual ID E module 326 of the flash memory chip 306-1 to 306-n of data.
In embodiments of the present invention, for example, the IDE instruction is compatible with the ATA specification.
In another embodiment of the present invention, the IDE instruction for example is compatible with sequence A TA specification.
In the present embodiment, flash memory chip 306-1 to 306-n is encapsulated as one chip, therefore can make the volume-diminished of whole flash array storage system 300, to be applicable to minicomputer system.In addition, in the present embodiment, the external transmission interface of flash memory chip 306-1 to 306-n is to use the PCIExpress interface, its transfer rate when 1Lane single channel (PCIe x1) up to 250MB/s.The base this, in the present embodiment, can effectively promote the data rate of array storage system.Particularly, in the present embodiment, microcontroller has virtual ID E interface module, can reach the speed of PCI Express interface in the time of therefore can making the system host access data, also gathers around simultaneously with the characteristic that is compatible with IDE is arranged.Base this, can not change under the environmental interface of host computer system, use PCI Express interface transmission data.
What deserves to be mentioned is that when employed flash memory chip among first and second embodiment of the present invention is when being encapsulated by a plurality of flash memories, these a little flash memories can be electrically connected to microcontroller (as shown in Figure 6) by parallel mode.
Fig. 6 is the detailed block diagram of the flash memory chip that illustrates according to another embodiment of the present invention.Please refer to Fig. 6,, do not repeat them here because the element of Fig. 6 is to be same as shown in Figure 2ly.What Fig. 6 was different with Fig. 2 is that flash memory chip 106-1 ' has two flash memory 116a and 116b.And flash memory 116a and 116b are electrically connected to microcontroller 114 with parallel mode, thus, but the transmission by mode expedited data in the parallel place.Similarly notion also can be applicable among Fig. 4.
Though be to realize in the above-mentioned enforcement of the present invention with flash array storage system with a plurality of flash memory chip.Yet, it must be appreciated that because flash memory chip of the present invention has complete memory storage framework, so flash memory chip also can be separately as the memory device that installs.For example, flash memory chip can directly be embedded on the motherboard, as the memory device of computing machine, for example replaces Winchester disk drive to dwindle the volume of computing machine.Perhaps, flash memory chip also can be applicable to embedded system, for example mobile phone, personal digital assistant, global position system, set-top box (Set-Top-Box) or embedded server etc., and it is more light, thin and small and exquisite to get this type of device thus.
In sum, the invention provides a kind of flash memory chip and flash array storage system.Because flash memory chip is to be encapsulated as one chip, therefore can make the volume-diminished of whole flash array storage system, to be applicable to minicomputer system.In addition, the external transmission interface of flash memory chip is to use high-speed peripheral element interconnection interface, can effectively promote the data rate of array storage system.Moreover the present invention also has virtual integrated driving electronic interface modules, can reach the speed of high-speed peripheral element interconnection interface in the time of therefore can making the system host access data, also gathers around simultaneously with the characteristic that integrated driving electrical interface is arranged.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining of the present invention.
Claims (22)
1. flash array storage system comprises:
A plurality of flash memory chip are arranged with the array pattern, and each flash memory chip comprises:
Single circuit board;
Microcontroller is encapsulated on this single circuit board and has a flash memory interface and a high-speed peripheral element interconnection interface;
At least one flash memory is encapsulated on this single circuit board and is coupled to this microcontroller, in order to the storage data; And
PCI Express connecting interface is encapsulated on this single circuit board and is coupled to this microcontroller;
The flash array controller is coupled to those flash memory chip and reads and store data in those flash memory chip in order to be controlled at; And
Data transmission interface is coupled to this flash array controller, in order to be connected to a system host and transfer instruction and data between this system host and this flash array storage system;
Wherein, when this system host desires to write data to this flash array storage system, then this flash array controller can assign those flash memory chip one of them writes this data at least, and the microcontroller of the flash memory chip of being assigned can receive these data and write these data to this flash memory by this flash interface by this PCI Express connecting interface and this PCIExpress interface
Wherein, when this system host desires to read the data that are stored in this flash array storage system, then this flash array controller can be searched the flash memory chip of these data of storage, and the microcontroller of storing the flash memory chip of these data can read the data that are stored in this flash memory by this flash interface, and transmits this data by this PCI Express interface and this PCI Express connecting interface.
2. flash array storage system as claimed in claim 1, wherein, this at least one flash memory is single-stage storage unit or multi-level memory cell and non-flash memory in each flash memory chip.
3. flash array storage system as claimed in claim 1, wherein the method that in each flash memory chip this microcontroller and this at least one flash memory is packaged on this single circuit board comprises four limit flat non-connection pin formulas, planar array formula, solder ball array type, ultra-thin plane plastic pellet bearing-type, box-shaped flat pack type, crystal grain formula, the direct packaged type of chip or single pin packaged type package method.
4. flash array storage system as claimed in claim 1, wherein this flash array controller and those flash memory chip can be formed transmitting terminal (Tx) and receiving end (Rx) by at least one group of channel simplex at the physical layer of transmission data.
5. flash array storage system comprises:
A plurality of flash memory chip are arranged with the array pattern, and each flash memory chip comprises:
Single circuit board;
Microcontroller, be encapsulated on this single circuit board and have flash interface, PCI Express interface and virtual integrated driving electronic module, this virtual integrated driving electronic module has in order to the integrated driving electronics main control end that receives integrated driving e-command and in order to carry out an integrated driving electrical interface devices end of this integrated driving e-command, this virtual integrated driving electronic module is being done in fact by the firmware program that this microcontroller is carried out;
At least one flash memory is encapsulated on this single circuit board and is coupled to this microcontroller, in order to the storage data; And
PCI Express connecting interface is encapsulated on this single circuit board and is coupled to this microcontroller, in order to be connected to a system host; And
The flash array driver is installed in this system host and is carried out to be controlled at by this system host and reads and store data in those flash memory chip;
Wherein, When this system host wants to read the data that are stored in this flash array storage system; Then this flash array driver can be searched the flash memory chip of these data of storage; And; The virtual integrated driving electronic module of storing the flash memory chip of these data can receive and this integrated driving e-command of carrying out this system host and assigning; And these data can be transmitted by the form that those flash memories read and can be received for those PCI Express connecting interfaces by those PCIExpress interface conversion
Wherein, when this system host desires to write data to this flash array storage system, then this flash array driver can assign those flash memory chip one of them writes this data at least, and the virtual integrated driving electronic module of the flash memory chip of being assigned can receive and carry out this integrated driving e-command that this system host is assigned, and these data of desiring to write can by this PCI Express connecting interface and this PCI Express interface receives and be converted to the form that those flash memories can receive by those flash interfaces write to those flash memories.
6. flash array storage system as claimed in claim 5, wherein, this at least one flash memory is single-stage storage unit or multi-level memory cell and non-flash memory in each flash memory chip.
7. flash array storage system as claimed in claim 5, wherein, the method that in each flash memory chip this microcontroller and this at least one flash memory is encapsulated on this single circuit board comprises four limit flat non-connection pin formulas, planar array formula, solder ball array type, ultra-thin plane plastic pellet bearing-type, box-shaped flat pack type, crystal grain formula, the direct packaged type of chip or single pin packaged type package method.
8. flash array storage system as claimed in claim 5, wherein, this integrated driving e-command is compatible with ATA specification or sequence A TA specification.
9. flash memory chip comprises:
Single circuit board;
Microcontroller is encapsulated on this single circuit board and has a flash interface and a PCI Express interface;
At least one flash memory is encapsulated on this single circuit board and is coupled to this microcontroller, in order to the storage data; And
PCI Express connecting interface is encapsulated on this single circuit board and is coupled to this microcontroller, in order to this flash memory chip is coupled to a system host,
Wherein, when this system host desired to write data to this flash memory chip, then this microcontroller can receive these data and write these data to this flash memory by this flash interface by this PCI Express interface,
Wherein, when this system host desires to read the data that are stored in this flash memory chip, then this microcontroller can read data in this flash memory by this flash interface, and is sent to this system host by this PCI Express interface via PCI Express connecting interface.
10. flash memory chip as claimed in claim 9, wherein, this at least one flash memory is single-stage storage unit or multi-level memory cell and non-flash memory.
11. flash memory chip as claimed in claim 9, wherein, the method that this microcontroller and this at least one flash memory are packaged on this single circuit board comprises four limit flat non-connection pin formulas, planar array formula, solder ball array type, ultra-thin plane plastic pellet bearing-type, box-shaped flat pack type, crystal grain formula, the direct packaged type of chip or single pin packaged type package method.
12. flash memory chip as claimed in claim 11, the pin position after its encapsulation comprises pin positions such as PERST#, REFCLK+, REFCLK-, PETp0, PETn0, PERp0, PERn0, Power, Ground at least.
13. a flash memory chip comprises:
Single circuit board;
Microcontroller, be encapsulated on this single circuit board and have a flash interface, a PCI Express interface and a virtual integrated driving electronic module, this virtual integrated driving electronic module has in order to the integrated driving electronics main control end that receives integrated driving e-command and in order to carry out the integrated drive electronics end of this integrated driving e-command, this virtual integrated driving electronic module is being done in fact by the firmware program that this microcontroller is carried out;
At least one flash memory is encapsulated on this single circuit board and is coupled to this microcontroller, in order to the storage data; And
PCI Express connecting interface is encapsulated on this single circuit board and is coupled to this microcontroller, in order to this flash memory chip is coupled to this system host,
Wherein, when this system host desires to read the data that are stored in this flash memory, then this integrated driving e-command of assigning of this system host can be sent to this virtual integrated driving electronic module to be carried out by this virtual integrated driving electronic module, and be stored in form that the data in this flash memory can read and can be received for this PCI Express connecting interface by this PCI Express interface conversion by this flash interface to be sent to this system host
Wherein, when this system host desires to write data to this flash memory, then this integrated driving e-command of assigning of this system host can be sent to this virtual integrated driving electronic module being carried out by this virtual integrated driving electronic module, and these data of desiring to write can receive and are converted to form that this flash memory can receive to write to this flash memory by this flash interface by this PCI Express interface.
14. flash memory chip as claimed in claim 13, wherein, this at least one flash memory is single-stage storage unit or multi-level memory cell and non-flash memory.
15. flash memory chip as claimed in claim 13, wherein, the method that this microcontroller and this at least one flash memory are packaged on this single circuit board comprises four limit flat non-connection pin formulas, planar array formula, solder ball array type, ultra-thin plane plastic pellet bearing-type, box-shaped flat pack type, crystal grain formula, the direct packaged type of chip or single pin packaged type package method.
16. flash memory chip as claimed in claim 13, wherein, this integrated driving e-command is compatible with ATA or sequence A TA specification.
17. a flash memory chip comprises:
Single circuit board;
Microcontroller is encapsulated on this single circuit board and has a flash interface and a PCI Express interface;
A plurality of flash memories are encapsulated on this single circuit board and are coupled to this microcontroller respectively, in order to the storage data; And
PCI Express connecting interface is encapsulated on this single circuit board and is coupled to this microcontroller, in order to this flash memory chip is coupled to system host,
Wherein, when this system host desired to write data to this flash memory chip, then this microcontroller can receive these data and write these data to those flash memories by this flash interface by this PCI Express interface,
Wherein, when this system host desires to read the data that are stored in this flash memory chip, then this microcontroller can read data in those flash memories by this flash interface, and is sent to this system host by this PCI Express interface via PCI Express connecting interface
Wherein, the data read of those flash memories is to carry out with parallel processing with writing.
18. flash memory chip as claimed in claim 17, wherein, each those flash memory is respectively single-stage storage unit or multi-level memory cell and non-flash memory.
19. flash memory chip as claimed in claim 17, wherein, the method that this microcontroller and those flash memories are encapsulated on this single circuit board comprises four limit flat non-connection pin formulas, planar array formula, solder ball array type, ultra-thin plane plastic pellet bearing-type, box-shaped flat pack type, crystal grain formula, the direct packaged type of chip or single pin packaged type package method.
20. flash memory chip as claimed in claim 19, the pin position after its encapsulation comprises pin positions such as PERST#, REFCLK+, REFCLK-, PETp0, PETn0, PERp0, PERn0, Power, Ground at least.
21. flash memory chip as claimed in claim 17, wherein, this system host and this flash memory chip can be formed transmitting terminal (Tx) and receiving end (Rx) by at least one group of channel simplex at the physical layer of transmission data.
22. flash memory chip as claimed in claim 17, wherein, this microcontroller more comprises a virtual integrated driving electronic module, this virtual integrated driving electronic module has in order to the integrated driving electronics main control end that receives integrated driving e-command and in order to carry out the integrated drive electronics end of this integrated driving e-command, this virtual integrated driving electronic module is being done in fact by the firmware program that this microcontroller is carried out.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101496466A CN101388238A (en) | 2007-09-10 | 2007-09-10 | Flash storage chip an flash array storage system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101496466A CN101388238A (en) | 2007-09-10 | 2007-09-10 | Flash storage chip an flash array storage system |
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| Publication Number | Publication Date |
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| CN101388238A true CN101388238A (en) | 2009-03-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNA2007101496466A Pending CN101388238A (en) | 2007-09-10 | 2007-09-10 | Flash storage chip an flash array storage system |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102281144A (en) * | 2011-06-21 | 2011-12-14 | 上海华申智能卡应用系统有限公司 | Passive m2m embedded module |
| CN102541469A (en) * | 2011-12-13 | 2012-07-04 | 华为技术有限公司 | Method, equipment and system for protecting data in firmware storage system |
| CN112232469A (en) * | 2020-09-29 | 2021-01-15 | 深圳宏芯宇电子股份有限公司 | Memory card and electronic device |
-
2007
- 2007-09-10 CN CNA2007101496466A patent/CN101388238A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102281144A (en) * | 2011-06-21 | 2011-12-14 | 上海华申智能卡应用系统有限公司 | Passive m2m embedded module |
| CN102541469A (en) * | 2011-12-13 | 2012-07-04 | 华为技术有限公司 | Method, equipment and system for protecting data in firmware storage system |
| CN102541469B (en) * | 2011-12-13 | 2015-01-21 | 华为技术有限公司 | Method, equipment and system for protecting data in firmware storage system |
| CN112232469A (en) * | 2020-09-29 | 2021-01-15 | 深圳宏芯宇电子股份有限公司 | Memory card and electronic device |
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