CN102097049B - Signal self-adaption device and method for liquid crystal module testing - Google Patents
Signal self-adaption device and method for liquid crystal module testing Download PDFInfo
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Abstract
The invention discloses a signal self-adaption device and method for liquid crystal module testing, relating to the field of liquid crystal module testing. Centering on digital signal processing and locked phase loop technology, the digital signal processing and locked phase loop function is realized by using a FPGA (Field Programmable Gate Array) module; the locked phase loop module is dynamically configured by using parameter control state machines through monitoring input video signals, clock of picture signals, effective signals, and the current liquid crystal modulus parameters in real time to ensure that the locked phase loop always outputs the correct clock, so that the corresponding signal is output by a subsequent circuit according to the clock, the video signal for the liquid crystal modulus testing and the picture signal are automatically switched and adapted, and the production efficiency of the liquid crystal modulus is improved, thereby the invention has the advantages of low cost and high stability and can realize production automation.
Description
Technical field
The present invention relates to the liquid crystal module field tests, specifically is the adaptive device and method of a kind of liquid crystal module test signal.
Background technology
Along with the technology of PFD (Flat Panel Display, flat-panel monitor) reaches its maturity, the main product function admirable has obtained increasing application at numerous areas such as mobile phone, computing machine, household electrical appliances.
The primary clustering of PFD is a liquid crystal module; General through automatic assembly line or semi-automatic batch production on production; In order to guarantee the quality of product, must adopt specialized apparatus to carry out strictness to each liquid crystal module on the production line and detect, this checkout equipment is called the liquid crystal module proving installation.And the detection of liquid crystal module is mainly comprised: can normally show, whether liquid crystal panel exists bad point, whether response reality is up to standard etc.; Therefore the liquid crystal module proving installation must be able to provide the power supply and the test signal of liquid crystal module; It can " be lighted ", just normally show.Usually whether the assessment liquid crystal panel exists bad point preferably to adopt static picture, and the assessment response time, promptly conditions of streaking preferably adopts the image of motion, and this just requires the liquid crystal module proving installation that the test signal that satisfies above-mentioned requirements can be provided; Moreover, be to improve the output of production line liquid crystal module, also require the liquid crystal module proving installation test signal that can automatically switch, the time cost of product is further reduced.Traditional liquid crystal module testing apparatus general utility functions are single; Do not support the vision signal input; Only support vision signal and picture signal to import from same signal source; But this proving installation is because complicated operation, and then causes switch speed slow, greatly reduces the production efficiency of liquid crystal module.
Summary of the invention
To the defective that exists in the prior art; The objective of the invention is to: provide a kind of liquid crystal module test signal adaptive device; Can pass through two signal sources incoming video signals and picture signal respectively, and can automatically switch picture signal and vision signal, the cost time of reducing product; Simple to operate, the production efficiency of raising liquid crystal module.
In order to achieve the above object; The present invention designs the adaptive device of a kind of liquid crystal module test signal; FPGA (field programmable gate array) module and the CPU module that comprise electric connection; But said FPGA module comprises electronic switch I, electronic switch II, phase-locked loop module, phaselocked loop reprovision module, state machine module, coding/decoding module and module adaptation module, and said state machine module connects electronic switch I and electronic switch II respectively, and electronic switch I links to each other with phase-locked loop module; But phase-locked loop module connects phaselocked loop reprovision module; But phaselocked loop reprovision module links to each other with state machine module again, and said electronic switch II connects coding/decoding module, and coding/decoding module links to each other with the module adaptation module.
The present invention also provides a kind of adaptive method of liquid crystal module test signal based on this device, comprises the steps:
(1) the CPU module is carried out system initialization, and the module parameter is set;
(2) electronic switch I acquiescence is selected the input of vision signal clock, gives phase-locked loop module with clock signal;
(3) whether phase-locked loop module real-time judge input clock signal is normal, if normally then forward step (4) to; If undesired, then electronic switch I carries out and switches, and after inserting normal one road signal clock, stops to switch;
(4) phase-locked loop module judges further whether said clock signal can lock, if can lock, then produces the required system clock of FPGA module, and forwards step (6) to; If can not lock, but the quality and the lock-out state of clock signal are issued phaselocked loop reprovision module, parameter is reset by the time;
(5) but phaselocked loop reprovision module the parameter of phase-locked loop module is reconfigured, guarantee that phaselocked loop is in the lock state all the time, the state with phase-locked loop module sends to state machine module simultaneously;
(6) state machine module is adjusted each parameter in real time according to the state of phase-locked loop module, but comprises configuration parameter, the control phaselocked loop reprovision modules configured of switching command, renewal phase-locked loop module;
(7) electronic switch II selects the input of vision signal or picture signal according to the switching command of state machine module generation, and selected signal is sent to coding/decoding module;
(8) coding/decoding module extract vision signal or each pixel of picture signal red, green, blue and row synchronously, the information of field synchronization and data enable, and above each signal sent to the module adaptation module;
(9) the module adaptation module be responsible for adjusting red, green, blue and row synchronously, the speed of field synchronization and data enable; Itself and LCD module under test parameter are complementary; And convert the parallel data of the low speed after the rate adapted to high speed serialization LVDS (low-voltage differential) signal, export to LCD module under test at last.
On the basis of technique scheme; If clock is undesired, then orders electronic switch I to carry out 1 time and switch in said (3), select another road signal clock input to judge again; If clock is still undesired; Represent that then the two paths of signals clock is all undesired, wait for that the normal post command electronic switch of at least one road clock recovery I carries out 1 time and switches, up to choosing normal a certain road signal clock.
On the basis of technique scheme, the job step of state machine module is in said (6):
(a1) power on the back for idle condition, if the input clock signal state does not change and phaselocked loop is in the lock state, then state machine resides in this idle condition always;
(a2) when the input clock signal state changes, get into input clock and correctly judge state, judge whether the clock input is desired consistent with system, judge state if correctly then get into the input clock performance, if the incorrect input clock switching state that then gets into;
On the basis of technique scheme, said (a2) input clock performance judges that input clock performance that state, system further confirm phaselocked loop is whether in normal range; If it is normal; Then get into the phaselocked loop reset mode,, then get into and judge again after the 1ms waiting status waits for a period of time if unusual.
On the basis of technique scheme; Said phaselocked loop reset mode, completion resets to phaselocked loop, gets into phaselocked loop reprovision state afterwards; Confirm the various parameters of phaselocked loop according to current liquid crystal module parameter; After reprovision was accomplished, state machine gets into waited for the configuration completion status, gets into phaselocked loop phase place reset mode afterwards again.
On the basis of technique scheme, said phase place reset mode once resets to phaselocked loop again, and state machine gets into phaselocked loop state confirmation state again, and behind the judgement phaselocked loop reprovision, whether clock can lock; If can lock, then reprovision success status machine is got back to idle condition; If can not lock, represent that this time phaselocked loop reprovision is unsuccessful, get into the 1ms waiting status and carry out reprovision again one time, according to this repeatedly, up to the success of phaselocked loop reprovision.
On the basis of technique scheme; Said (a2) clock switching state, but order phaselocked loop reprovision module is accomplished the switching of video and picture signal clock, gets into the 1ms state of waiting for after switching is accomplished; Get into phaselocked loop state confirmation state afterwards again; Judge after clock switches again whether can come back to lock-out state, if lock then that the clock handover success comes back to idle condition, if still losing lock is then got back to input clock again and correctly judged state.
Beneficial effect of the present invention is: with digital signal processing and PHASE-LOCKED LOOP PLL TECHNIQUE is core; Utilize the FPGA module to realize digital signal processing and phase locked looped function; Through clock and useful signal to incoming video signal, picture signal; And current liquid crystal module parameter monitors in real time, utilizes these parameter control state machine that phase-locked loop module is carried out dynamic-configuration, guarantees that phaselocked loop exports correct clock all the time; Thereby make subsequent conditioning circuit export corresponding signal according to this clock; Realize liquid crystal module test video signal and picture signal automatic switchover and adaptive, improve the production efficiency of liquid crystal module, the advantage that cost is low, stability is high, help realizing the production automation is arranged.
Description of drawings
Fig. 1 is the block diagram of liquid crystal module test signal self-reacting device of the present invention;
Fig. 2 is the flow chart of steps of liquid crystal module test signal adaptive approach of the present invention;
Fig. 3 is the state transition diagram of state machine module among the present invention.
Embodiment
Below in conjunction with accompanying drawing embodiments of the invention are done further explain.
As shown in Figure 1; The adaptive device of a kind of liquid crystal module test signal of the present invention; FPGA (field programmable gate array) module and the CPU module that comprise electric connection; Said FPGA module comprises electronic switch I, electronic switch II, and electronic switch I has vision signal or the input of picture signal clock, and electronic switch II has vision signal or picture signal input; Said FPGA module also comprises: but the module adaptation module that connects the phase-locked loop module of electronic switch I, the phaselocked loop reprovision module that is connected with phase-locked loop module, connects the state machine module of electronic switch I and electronic switch II, the coding/decoding module that is connected with electronic switch II and link to each other respectively with coding/decoding module, and said module adaptation module is used for connecting LCD module under test.
In the said apparatus, the CPU module need be carried out initialization to system when powering on, specifically comprise the corresponding registers that the liquid crystal module parameter is sent to the FPGA module, like link (passage) number, color-resolution, coded system, signal switch mode etc.The state machine module of FPGA is according to these parameter generating phaselocked loop reprovision orders, and the work of control signal Switching Module, the duty of dynamic debugging system, and the assurance test signal is correctly exported.For improving the dirigibility of product, the signal switch mode is supported manual switchover and automatic switchover, when system is in the manual switchover pattern, can select vision signal or picture signal to export as test signal through the PC workstation; When system was in automatic switchover mode, acquiescence was selected vision signal output, when vision signal does not have input, selected picture signal output automatically.When vision signal just often, but need to give phaselocked loop reprovision module, vision signal effective marker valid0 is provided, detect picture signal simultaneously just often, picture signal effective marker valid1 is provided also need for the reconfigurable module of phaselocked loop.These two effective marker signal valid0 and valid1 are used to judge whether status input signal changes, so that state machine module can correctly be worked.Because vision signal and picture signal are possible invalid sometime; It is the no signal input; Making phaselocked loop is not continuously effective according to the system clock that these two signal clocks produce, so this system clock can not offer state machine module and the reconfigurable module of phaselocked loop is used.For guaranteeing system's reliability service; Need provide one the tunnel independently clock to state machine module and the reconfigurable module of phaselocked loop; The present invention produces the 25MHz clock through the outside active crystal oscillator of FPGA (figure does not show) and inputs to above-mentioned two modules use, has guaranteed reliability of system operation and stability.
As shown in Figure 2, the present invention is based on the adaptive method of liquid crystal module test signal of this device, comprise the steps:
(1) the CPU module is responsible for system is carried out power-up initializing, comprises the setting of module parameter, test signal manual switchover or automatic switchover etc.
(2) electronic switch I acquiescence is selected the input of vision signal clock, gives phase-locked loop module with clock signal;
(3) quality of module real-time judge input clock signal is if clock normally then forwards step (4) to; If clock is undesired; Then ordering electronic switch I to carry out 1 time switches; Select another road signal clock input to judge again; If the still undesired two paths of signals clock of then representing of clock is all undesired, wait for that the normal post command electronic switch of at least one road clock recovery I carries out 1 time and switches, up to choosing normal a certain road signal clock.
(4) phase-locked loop module judges further whether said clock signal can lock, if can lock, then produces the required system clock of FPGA module, and forwards step (6) to; If can not lock, but the quality and the lock-out state of clock signal are issued phaselocked loop reprovision module, parameter is reset by the time;
(5) but phaselocked loop reprovision module the parameter of phase-locked loop module is reconfigured, guarantee that phaselocked loop is in the lock state all the time, the state with phase-locked loop module sends to state machine module simultaneously;
(6) state machine module is adjusted each parameter in real time according to the state of phase-locked loop module, but comprises configuration parameter, the control phaselocked loop reprovision modules configured of switching command, renewal phase-locked loop module.
As shown in Figure 3, be the state transition diagram of said state machine module, the step of said state machine is again:
(a1) power on the back for idle condition, if the input clock signal state does not change and phaselocked loop is in the lock state, then state machine resides in this idle condition always;
(a2) when the input clock signal state changes, get into input clock and correctly judge state, judge whether the clock input is desired consistent with system.
If it is incorrect; Then get into the input clock switching state: but order phaselocked loop reprovision module is accomplished the switching of video and picture signal clock; Get into wait 1ms state after switching completion, get into phaselocked loop state confirmation state afterwards again, judge after clock switches whether can come back to lock-out state again; If lock then that the clock handover success comes back to idle condition, if still losing lock is then got back to input clock again and correctly judged state;
If correct, then get into the input clock performance and judge state: the input clock performance that system further confirms phaselocked loop whether in normal range, if normally then get into the phaselocked loop reset mode, if then get into unusually the 1ms waiting status wait for a period of time after judgement again.
Said phaselocked loop reset mode, completion resets to phaselocked loop, gets into phaselocked loop reprovision state afterwards; Confirm the various parameters of phaselocked loop according to current liquid crystal module parameter; After reprovision was accomplished, state machine gets into waited for the configuration completion status, gets into phaselocked loop phase place reset mode afterwards again.Said phase place reset mode once resets to phaselocked loop again, and state machine gets into phaselocked loop state confirmation state again, and behind the judgement phaselocked loop reprovision, whether clock can lock; If can lock, then reprovision success status machine is got back to idle condition; If can not lock, represent that this time phaselocked loop reprovision is unsuccessful, get into the 1ms waiting status and carry out reprovision again one time, according to this repeatedly, up to the success of phaselocked loop reprovision.
(7) electronic switch II selects the input of vision signal or picture signal according to the switching command of state machine module generation, and selected signal is sent to coding/decoding module;
(8) coding/decoding module extract vision signal or each pixel of picture signal red, green, blue and row synchronously, the information of field synchronization and data enable, and above each signal sent to the module adaptation module;
(9) the module adaptation module be responsible for adjusting red, green, blue and row synchronously, the speed of field synchronization and data enable; Itself and LCD module under test parameter are complementary; And convert the parallel data of the low speed after the rate adapted to high speed serialization LVDS (low-voltage differential) signal, export to LCD module under test at last.
Above-mentioned steps (2) repeats to step (9), is exactly the work that liquid crystal module test video and picture signal automatically switch.
As shown in Figure 3; State transition diagram for said state machine module; Be equivalent to above-mentioned steps (6); The effect of state machine module is equivalent to the central control unit of FPGA module, but the control command of order of the dynamic-configuration of the monitoring of signal link state, phaselocked loop reprovision module and signal exchange module produces by state machine module.When state machine is in idle condition,, the phase-locked loop clock losing lock gets into the 1ms state of waiting for if also can triggering state machine.
The present invention is not limited to above-mentioned embodiment, for those skilled in the art, under the prerequisite that does not break away from the principle of the invention, can also make some improvement and retouching, and these improvement and retouching also are regarded as within protection scope of the present invention.
Claims (8)
1. adaptive method of liquid crystal module test signal; Through the adaptive device of liquid crystal module test signal, it comprises the FPGA module and the CPU module of electric connection, but said FPGA module comprises electronic switch I, electronic switch II, phase-locked loop module, phaselocked loop reprovision module, state machine module, coding/decoding module and module adaptation module; Said state machine module connects electronic switch I and electronic switch II respectively; Electronic switch I links to each other with phase-locked loop module, but phase-locked loop module connects phaselocked loop reprovision module, but phaselocked loop reprovision module links to each other with state machine module again; Said electronic switch II connects coding/decoding module; Coding/decoding module links to each other with the module adaptation module, it is characterized in that, comprises the steps:
(1) the CPU module is carried out system initialization, and the module parameter is set;
(2) acquiescence is selected the input of vision signal clock, gives phase-locked loop module with clock signal;
(3) whether phase-locked loop module real-time judge input clock signal is normal, if normally then forward step (4) to; If undesired, then electronic switch I carries out and switches, and after inserting normal one road signal clock, stops to switch;
(4) phase-locked loop module judges further whether said clock signal can lock, if can lock, then produces the required system clock of FPGA module, and forwards step (6) to; If can not lock, but the quality and the lock-out state of clock signal are issued phaselocked loop reprovision module, parameter is reset by the time;
(5) but phaselocked loop reprovision module the parameter of phase-locked loop module is reconfigured, guarantee that phaselocked loop is in the lock state all the time, the state with phase-locked loop module sends to state machine module simultaneously;
(6) state machine module is adjusted each parameter in real time according to the state of phase-locked loop module, but comprises configuration parameter, the control phaselocked loop reprovision modules configured of switching command, renewal phase-locked loop module;
(7) electronic switch II selects the input of vision signal or picture signal according to the switching command of state machine module generation, and selected signal is sent to coding/decoding module;
(8) coding/decoding module extract vision signal or each pixel of picture signal red, green, blue and row synchronously, the information of field synchronization and data enable, and above each signal sent to the module adaptation module.
2. the adaptive method of liquid crystal module test signal as claimed in claim 1; It is characterized in that: also comprise step (9) module adaptation module be responsible for adjusting red, green, blue and row synchronously, the speed of field synchronization and data enable; Itself and LCD module under test parameter are complementary; And convert the parallel data of the low speed after the rate adapted to high speed serialization LVDS (low-voltage differential) signal, export to LCD module under test at last.
3. the adaptive method of liquid crystal module test signal as claimed in claim 1; It is characterized in that: if clock is undesired, then orders electronic switch I to carry out 1 time and switch in said (3), select another road signal clock input to judge again; If clock is still undesired; Represent that then the two paths of signals clock is all undesired, wait for that the normal post command electronic switch of at least one road clock recovery I carries out 1 time and switches, up to choosing normal a certain road signal clock.
4. the adaptive method of liquid crystal module test signal as claimed in claim 1 is characterized in that: the job step of state machine module is in said (6):
(a1) power on the back for idle condition, if the input clock signal state does not change and phaselocked loop is in the lock state, then state machine resides in this idle condition always;
(a2) when the input clock signal state changes, get into input clock and correctly judge state, judge whether the clock input is desired consistent with system, judge state if correctly then get into the input clock performance, if the incorrect input clock switching state that then gets into.
5. the adaptive method of liquid crystal module test signal as claimed in claim 4; It is characterized in that: said (a2) input clock performance is judged state; Whether the input clock performance that system further confirms phaselocked loop in normal range, if normal, then gets into the phaselocked loop reset mode; If unusual, then get into and judge again after the 1ms waiting status waits for a period of time.
6. the adaptive method of liquid crystal module test signal as claimed in claim 5; It is characterized in that: said phaselocked loop reset mode, completion resets to phaselocked loop, gets into phaselocked loop reprovision state afterwards; Confirm the various parameters of phaselocked loop according to current liquid crystal module parameter; After reprovision was accomplished, state machine gets into waited for the configuration completion status, gets into phaselocked loop phase place reset mode afterwards again.
7. the adaptive method of liquid crystal module test signal as claimed in claim 6; It is characterized in that: said phase place reset mode, phaselocked loop is once resetted again, state machine gets into phaselocked loop state confirmation state again; After judging the phaselocked loop reprovision, whether clock can lock; If can lock, then reprovision success status machine is got back to idle condition; If can not lock, represent that this time phaselocked loop reprovision is unsuccessful, get into the 1ms waiting status and carry out reprovision again one time, according to this repeatedly, up to the success of phaselocked loop reprovision.
8. the adaptive method of liquid crystal module test signal as claimed in claim 4; It is characterized in that: said (a2) clock switching state; But order phaselocked loop reprovision module is accomplished the switching of video and picture signal clock; Get into wait 1ms state after switching completion, get into phaselocked loop state confirmation state afterwards again, judge after clock switches whether can come back to lock-out state again; If lock then that the clock handover success comes back to idle condition, if still losing lock is then got back to input clock again and correctly judged state.
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| CN105355191B (en) * | 2015-12-05 | 2019-05-03 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of multi-modality image display control method based on FPGA |
| CN109656857A (en) * | 2018-12-19 | 2019-04-19 | 南京威翔科技有限公司 | A kind of multifrequency point based on FPGA is switched fast output control method |
| CN114167829A (en) * | 2021-12-03 | 2022-03-11 | 浙江中控技术股份有限公司 | Clock synchronization test method and device |
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| JP2005043783A (en) * | 2003-07-25 | 2005-02-17 | Oht Inc | Device for inspecting liquid crystal display panel, and method for inspecting liquid crystal panel |
| CN101770088B (en) * | 2008-12-26 | 2011-12-28 | 京东方科技集团股份有限公司 | liquid crystal display module testing device and data transmission method thereof |
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