CN102072989A - Measurement device with function of measuring capacitance - Google Patents
Measurement device with function of measuring capacitance Download PDFInfo
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- CN102072989A CN102072989A CN 201010534901 CN201010534901A CN102072989A CN 102072989 A CN102072989 A CN 102072989A CN 201010534901 CN201010534901 CN 201010534901 CN 201010534901 A CN201010534901 A CN 201010534901A CN 102072989 A CN102072989 A CN 102072989A
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Abstract
The present invention provides a measurement device with a function of measuring capacitance, which comprises a capacitance measurement end (207), a charging module (216), a discharging module (217), an A/D (analog/digital) conversion module (209), a double-limit comparator (210), a control processing module (215), a first voltage division circuit (205) and a second voltage division circuit (206). The charging timer of the control processing module (215) has two charging ending conditions: the maximum charging time and the first threshold voltage VH. When the charging ending conditions are satisfied, the charging timer stops timing, and the A/D conversion module (209) is controlled to measure the voltage. By adopting the method, the charging time delta t and the voltage delta V in the formula C = Ic delta t/ delta V can be obtained, and the capacitance of a capacitor (208) to be measured can be calculated. The measurement device solves the problem of the prior art that the existing measurement device can not automatically adapt to measurement of small capacitance and large capacitance.
Description
Technical field
The present invention relates to the measurement mechanism field, particularly relate to the capacitance measuring device field.
Background technology
In the prior art, the speed for the precision that improves low capacitance measurement and big capacitance measurement has adopted many kinds of measuring methods.
In Chinese patent application " method of mirror-image constant flow source measuring capacitance " (publication number is 101082644A), introduced a kind of capacitance measurement method.As shown in Figure 1, measurement mechanism 1 comprises measured capacitance 101, mirror-image constant flow source charge-discharge modules 102, voltage detection module 107, control module 108 and the clock generator 109 that is connected in series successively, comprises constant current source 103, charge-discharge circuit 104, mirror image circuit 105 and charge and discharge switch control circuit 106 in the mirror-image constant flow source charge-discharge modules 102.Two kinds of embodiments are disclosed in this patent specification.Charge and discharge switch control circuit 106 is made of gate-controlled switch K1 in these two embodiment.
A kind of embodiment is the fixing measuring method in duration of charging, and control module 108 is by the difference of the later voltage of the voltage before the charging of measuring measured capacitance 101 and charging, thereby calculates capacitance.Whole measuring process comprises between charge period, interdischarge interval.The cycle of finishing charge and discharge just can be measured the capacitance of measured capacitance 101.Wherein voltage detection module 107 is made of A/D converter.
Step 1: between charge period, control module 108 control K1 open, and open charging circuit, close discharge circuit.Control module 108 picks up counting simultaneously.
Step 2: the timer meter is time the certain time interval T, and the timer zero clearing that resets restarts timing.Control module 108 control K1 closures, the charge closing circuit is opened discharge circuit.And, read the magnitude of voltage v1 on measured capacitance this moment simultaneously by A/D converter.
Step 3: the timer meter is time the certain time interval T, and the timer zero clearing that resets restarts timing.Control module 108 control K1 open, and open charging circuit, close discharge circuit.And, read the magnitude of voltage v2 on electric capacity this moment simultaneously by A/D converter.
Thus, we can calculate the capacitance Cx of measured capacitance 101:
ΔU＝|v2-v1|
C *=(charging current I1 * T)/Δ U
Repeat above-mentioned step 2, step 3, can periodically measure.
Because this method charge and discharge time is short, so be very suitable for measurement to big electric capacity.
Another kind of embodiment is the measuring method of fixed voltage difference, and control module 108 changes to the time Δ t of preset voltage value v2 by the voltage on the measured capacitance 101 from preset voltage value v1, thereby calculates measured capacitance values.Wherein voltage detection module 107 is made of voltage comparator CV1 and voltage comparator CV2.
Step 1: discharge step.Control module 108 control K1 open, and open discharge circuit, the charge closing circuit.Electric capacity begins discharge.When the voltage on the electric capacity time smaller or equal to comparative voltage v2, the upset of the output level of voltage comparator CV2;
Step 2: when the voltage on the electric capacity smaller or equal to comparative voltage v2 time the, the upset of the output level of voltage comparator CV2, control module 108 detects the variation of CV2 output level, and control module 108 control K1 closures are opened charging circuit, close discharge circuit.Electric capacity begins charging.Simultaneously, control module 108 picks up counting.
Step 3: when the voltage on the electric capacity time more than or equal to comparative voltage v1, the upset of the output level of voltage comparator CV1; Control module 108 detects the output level upset of voltage comparator CV1, stops timing, notes timing time Δ t; Control module control K1 opens, and opens discharge circuit, the charge closing circuit.Electric capacity begins discharge.
Step 4: repeating step two, three.
The output waveform of voltage comparator CV1 and voltage comparator CV2 is sent in the control module 108, the frequency f of the waveform signal of control module 108 measuring voltage comparator C V1 output, because charging current equals discharge current, thus the duration of charging equal discharge time, so: Δ t=1/f/2.
Thus, we can calculate the capacitance Cx of measured capacitance 101:
ΔU＝v1-v2
Δt＝1/f/2
C *=(charging current I1 * T)/Δ U
The measuring method of the measuring method of described set time of prior art and fixed voltage difference all can not adapt to the measurement of big capacitance measurement and little electric capacity automatically.
Such as, under the measuring method of described set time, when charging current one regularly, the long duration of charging is set, the accurate measurement of the big electric capacity that can realize, but the same duration of charging just can't satisfy the measurement needs of little electric capacity.Its reason is that under same charging current, the duration of charging that measured capacitance needs is very short.Duration of charging is long, tends to make that the voltage at measured capacitance two ends exceeds the A/D converter input voltage range, makes capacitance measurement inaccurate.
Again such as, under the measuring method of described fixed voltage difference, when measuring little electric capacity, in order to obtain higher measuring accuracy, often set a less charging current, but less charging current, can make the measuring period of big capacitance measurement elongated, even exceed the limit that the user waits for.Its reason is, under same charging current, needs the longer duration of charging, can make the voltage at big electric capacity two ends reach setting voltage value.
Summary of the invention
Fundamental purpose of the present invention is to solve problems of the prior art, and a kind of measurement mechanism with capacitance measurement function is provided, and this device can be applicable to the measurement of big electric capacity and little electric capacity automatically.
Measurement mechanism with capacitance measurement function of the present invention comprises a charging module, a discharge module, an A/D modular converter and a control treatment module, described charging module is used under the control of control treatment module, is the measured capacitance charging; Described discharge module is used under the control of control treatment module, is the measured capacitance discharge; Described A/D modular converter is used under the control of control treatment module, measures the voltage on the measured capacitance; Described control treatment module, the duration of charging that is used to measure measured capacitance, also comprise one first voltage comparator, described first voltage comparator is higher than a first threshold voltage-sensitive to the voltage of measured capacitance, produces one first measuring control signal; Described control treatment module is to the described first measuring control signal sensitivity, and it is the measured capacitance charging that described charging module is stopped, and makes the voltage on the described A/D modular converter measurement measured capacitance.
In measurement mechanism of the present invention, described first threshold voltage can be less than or equal to the maximum input rated voltage of described A/D modular converter.
In measurement mechanism of the present invention, can also comprise one second voltage comparator, described second voltage comparator is lower than one second threshold voltage sensitivity to the voltage on the measured capacitance, produces one second measuring control signal; Voltage on the measured capacitance is higher than the described second threshold voltage sensitivity, produces one the 3rd measuring control signal; Described control treatment module makes described discharge module stop to be the measured capacitance discharge to the described second measuring control signal sensitivity, and making described charging module is the measured capacitance charging; Described control treatment module is also to described the 3rd measuring control signal sensitivity, at first make described charging module stop to be the measured capacitance charging earlier, make the voltage on the described A/D modular converter measurement measured capacitance, and then to make described charging module be measured capacitance charging, and begin simultaneously to measure the duration of charging.
In measurement mechanism of the present invention, described second threshold voltage signal can be more than or equal to the minimum input rated voltage of described A/D modular converter.
In measurement mechanism of the present invention, can also have a maximum charge time, described control treatment module reaches described maximum charge time-sensitive to the described duration of charging, it is the measured capacitance charging that described charging module is stopped, and makes the voltage on the described A/D modular converter measurement measured capacitance.
In measurement mechanism of the present invention; between measured capacitance and described charging module, can be in series with one first bleeder circuit; be used to described charging module that overvoltage protection is provided; between measured capacitance and described discharge module, can be in series with one second bleeder circuit, be used to described discharge module that overvoltage protection is provided.
In measurement mechanism of the present invention, described first voltage comparator, second voltage comparator and described control treatment module all can be realized by the FPGA device.
Surveying instrument of the present invention not only can be applicable to the measurement of big electric capacity and little electric capacity simultaneously, and has following characteristics:
1, capacitance measurement control method of the present invention can satisfy simultaneously and measures big electric capacity and little electric capacity, needn't separate processes, and control method is simpler.
2, the present invention provides overvoltage crowbar for the charge and discharge constant current source, can prevent because the overvoltage in maloperation or the measuring process damages the charge and discharge constant current source.
Description of drawings
Fig. 1 is the structural representation that adopts the measurement mechanism 1 of prior art.
Fig. 2 is the structural representation of measurement mechanism 2 provided by the invention.
Fig. 3 is the structural representation of first bleeder circuit 205.
Fig. 4 is the structural representation of second bleeder circuit 206.
Fig. 5 is the structural representation of double-limit comparator 210.
Fig. 6 is the voltage measurement waveform that measured capacitance 208 is charged when reaching first threshold voltage VH.
Fig. 7 is that measured capacitance 208 chargings reach the voltage measurement waveform of maximum charge during the time.
Embodiment
Following mask body is introduced preferred forms of the present invention.
With reference to Fig. 2, measurement mechanism 2 comprises capacitance measurement end 207, charging module 216, discharge module 217, A/D modular converter 209, double-limit comparator 210, control treatment module 215, display module 213 and load module 214, the first bleeder circuits 205 and second bleeder circuit 206.Comprise charging constant current source 201 and charge switch 202 in the charging module 216, comprise discharge constant current source 203 and discharge switch 204 in the discharge module 217, control treatment module 215 comprises DLC (digital logic circuit) 211, processor system 212.
In the present embodiment, measurement mechanism 2 is digital multimeter.As other embodiment, measurement mechanism 2 can also be other devices with capacitance measurement function, for example, and capacitance meter, galvanometer or the like.
In the present embodiment, charging module 216 is made up of charging constant current source 201 and charge switch 202, and discharge module 217 is made up of discharge constant current source 203 and discharge switch 204.As other embodiment, also can adopt mirror-image constant flow source charge-discharge modules of the prior art to realize the charging module 216 among the present invention and the function of discharge module 217.
In the present embodiment, DLC (digital logic circuit) 211 in the control treatment module 215 and processor system 212 adopt the FPGA device to realize.As other embodiment, DLC (digital logic circuit) 211 and processor system 212 also can adopt devices such as CPLD, DSP to realize.
In the present embodiment,
Charging constant current source 201, charge switch 202, first bleeder circuit 205 and capacitance measurement end 207 are connected in series successively and constitute the charge circuit of measured capacitance 208.
In the present embodiment, charging constant current source 201 is program controlled constant current sources, the user's input information that processor system 212 receives according to load module 214, set the size of charging constant current source 201 output current Ic, and control charging constant current sources 201 output suitable current Ic by the 3rd control signal 220 of DLC (digital logic circuit) 211 outputs.The size of the electric capacity that the user can measure as required is provided with suitable charging current Ic.As other embodiment, processor system 212 also can realize selecting automatically the optimum measurement range by programming, for example can be by the method for measured value and the comparison of range bound is selected best range.
According to the control of first control signal 218 of DLC (digital logic circuit) 211 output, charge switch 202 is opened or is closed, is measured capacitance 208 chargings.
With reference to figure 2, discharge constant current source 203, discharge switch 204, second bleeder circuit 206 and capacitance measurement end 207 are connected in series successively and constitute the discharge loop of measured capacitance 208 again.
In the present embodiment, discharge constant current source 203 adopts constant current source, and the velocity of discharge is fast.
With reference to figure 2, A/D modular converter 209 is connected in series with capacitance measurement end 207 again, and A/D modular converter 209 is made of A/D converter ADS1256 in the present embodiment, and its maximum input rated voltage is 3V, and minimum input rated voltage is 0V.Measure the analog voltage signal of measured capacitance 208 with ADS1256, and after converting it into digital voltage signal, give DLC (digital logic circuit) 211.
With reference to figure 5 and Fig. 2, double-limit comparator 210 is made of first voltage comparator 501 and second voltage comparator 502, and the input end Input and the capacitance measurement end 207 of double-limit comparator 210 are connected in series.
The positive input terminal In1+ of first voltage comparator 501 is connected in series with input end Input by resistance R 12, be used for obtaining analog voltage signal from measured capacitance 208, its negative input end In1-is used to import first threshold voltage VH, first voltage comparator 501 compares positive input terminal In1+ voltage signal and first threshold voltage VH, when positive input terminal In1+ voltage voltage signal surpasses first threshold voltage VH, export first measuring control signal 505 by output terminal Output1, in the present embodiment, first measuring control signal 505 is a high level signal, and this signal is fed to DLC (digital logic circuit) 211.As other embodiment, first measuring control signal 505 also can be a low level signal.
The positive input terminal In2+ of second voltage comparator 502 is connected in series with input end Input by resistance R 12, be used for obtaining analog voltage signal from measured capacitance 208, its negative input end In2-is used to import the second threshold voltage VL, second voltage comparator 502 compares the positive input terminal In2+ voltage signal and the second threshold voltage VL, when positive input terminal In2+ voltage signal is lower than the second threshold voltage VL, export second measuring control signal 506 by output terminal Output2, in the present embodiment, second measuring control signal 506 is low level signals, and this signal is fed to DLC (digital logic circuit) 211; When positive input terminal In2+ voltage signal is higher than the second threshold voltage VL, export the 3rd measuring control signal 507 by output terminal Output2, in the present embodiment, the 3rd measuring control signal 507 is a high level signal, and this signal is fed to DLC (digital logic circuit) 211.As other embodiment, second measuring control signal 506 also can be a high level signal, and the 3rd measuring control signal 507 also can be a low level signal.
In the present embodiment, by resistance R 9, R10 and R11 reference voltage Vref is distributed to the first threshold voltage VH and the second threshold voltage VL.
In the present embodiment, resistance R 13 is connected between positive input terminal In1+ and the output terminal Output1, resistance R 14 is connected between positive input terminal In2+ and the output terminal Output2, resistance R 13 and resistance R 14 provide positive feedback for respectively first voltage comparator 501 and second voltage comparator 502, can be so that comparer work is more stable.In the present embodiment, the size of resistance R 13 and resistance R 14 is about 30 times of resistance R 12 sizes, therefore the analog voltage signal of the relative input end Input of amount of positive feedback is very little, can suppose and think that the voltage swing of the first comparer positive input terminal In1+ and the second comparer positive input terminal In2+ is with the aanalogvoltage equal and opposite in direction of input end Input.
And in order to realize correct charge and discharge process, first threshold voltage VH is greater than the second threshold voltage VL; Unsaturated for the input that makes A/D modular converter 209, first threshold voltage VH gets the maximum input rated voltage less than A/D modular converter 209, and second threshold voltage 504 is got the minimum input rated voltage greater than A/D modular converter 209; In order to make charging voltage follow the ratio of noise voltage big as far as possible, the absolute value of the difference of the first threshold voltage VH and the second threshold voltage VL will be tried one's best greatly.In the present embodiment, first threshold voltage VH is set to 2.1V, and the second threshold voltage VL is set to 0.7V.As other embodiment, the first threshold voltage VH and the second threshold voltage VL also can select other numerical value for use, such as, first threshold voltage VH is set to 2.5V, and the second threshold voltage VL is set to 0.5V.Or first threshold voltage VH is set to 2.8V, and the second threshold voltage VL is set to 0.2V.
With reference to figure 2, control treatment module 215 comprises DLC (digital logic circuit) 211, processor system 212, display module 213 and load module 214 again.In the present embodiment, DLC (digital logic circuit) 211 and processor system 212 are realized by the FPGA device.
DLC (digital logic circuit) 211 is used for the control capacitance measuring process, according to first measuring control signal 505, second measuring control signal 506 and the 3rd measuring control signal 507, the break-make of control charge switch 202 and discharge switch 204, for measured capacitance 208 discharges and recharges, and obtain the magnitude of voltage of measured capacitance 208 according to these measuring control signals control A/D modular converter 209, send to DLC (digital logic circuit) 211 after converting digital voltage signal to.Also have the charging timer in the DLC (digital logic circuit) 211, be used to measure the duration of charging Δ t of measured capacitance 208.
According to formula C=Ic Δ t/ Δ V,
Wherein, Ic is the current value of charging constant current source 201 outputs.
Δ t is the duration of charging that DLC (digital logic circuit) 211 measures.
Δ V is the magnitude of voltage that A/D modular converter 209 measures.
In the present invention, set two charging termination conditions in the charging timer of DLC (digital logic circuit) 211: maximum charge time and first threshold voltage VH.When reaching the charging termination condition, the charging timer finishes timing, and control A/D modular converter 209 is measured the voltage of this moment.Obtain duration of charging Δ t and magnitude of voltage Δ V in the formula by top method, thereby calculate the capacitance of measured capacitance 208.
Introduce the capacitance measurement process below in detail:
With reference to Fig. 6, after the user starts the capacitance measurement function,
1, at first enters discharge process D, DLC (digital logic circuit) 211 control charge switchs 202 disconnect, discharge switch 204 closures, discharge constant current source 203 is measured capacitance 208 discharges by second bleeder circuit 206 and discharge switch 204, the voltage at measured capacitance 208 two ends descends;
2, in discharge process D, when the voltage that detects measured capacitance 208 when second voltage comparator 502 in the double-limit comparator 210 is lower than the second threshold voltage VL, export second measuring control signal 506 by its output terminal 0utput2 and give DLC (digital logic circuit) 211,506 control capacitance measurements enter preliminary filling process PC to DLC (digital logic circuit) 211 according to second measuring control signal.Because there is time-delay in the action of detection action, charge switch 202 and the discharge switch 204 of double-limit comparator 210, and the voltage of measured capacitance 208 between time delay can descend a lot, so need to carry out preliminary filling.After entering preliminary filling process PC, DLC (digital logic circuit) 211 control charge switchs 202 closures, discharge switch 204 disconnects, and charging constant current source 201 is measured capacitance 208 chargings by the charge switch 202 and first bleeder circuit 205, and the voltage of measured capacitance 208 rises.
3, in preliminary filling process PC, when the voltage that detects measured capacitance 208 when second voltage comparator 502 in the double-limit comparator 210 is higher than second threshold voltage, export the 3rd measuring control signal 507 by its output terminal Output2 and give DLC (digital logic circuit) 211,507 control capacitance measurements enter maintenance process H to DLC (digital logic circuit) 211 according to the 3rd measuring control signal, data logical circuit 211 control charge switchs 202 and discharge switch 204 disconnect, the voltage of measured capacitance 208 remains unchanged, this moment, DLC (digital logic circuit) 211 control A/D modular converters 209 were measured the voltage of measured capacitance 208, obtained initial voltage V1.
4, after A/D modular converter 209 is measured and is finished, DLC (digital logic circuit) 211 control capacitance measurements enter charging process C, DLC (digital logic circuit) 211 control charge switchs 202 closures, discharge switch 204 disconnects, charging constant current source 201 is measured capacitance 208 chargings by the charge switch 202 and first bleeder circuit 205, the voltage of measured capacitance 208 rises, DLC (digital logic circuit) 211 control charging timer zero clearings wherein simultaneously, and during the beginning chargometer.
If the voltage of 5 measured capacitance 208 reached maximum charge before the time in the duration of charging of charging timer, the voltage that double-limit comparator 210 detects measured capacitance 208 surpasses first threshold voltage VH, then export first measuring control signal 505,505 control capacitance measurements enter hold mode to DLC (digital logic circuit) 211 according to first measuring control signal, control charge switch 202 and discharge switch 204 disconnect, and control charging timer stops timing, record duration of charging Δ t controls the final voltage V2 that A/D modular converter 209 is measured measured capacitance 208 simultaneously.
At this moment, finish a measuring period, processor system 212 reads charging starting potential V1, end of charge voltage V2 and duration of charging Δ t from DLC (digital logic circuit) 211, and calculate the capacitance size of measured capacitance 208 according to formula C=Ic Δ t/ Δ V, wherein Ic is the current value of charging constant current source 201 outputs, Δ V=V2-V1.
5 ', referring to Fig. 7, if the voltage of measured capacitance 208 reaches maximum charge during the time in the duration of charging of charging timer, do not rise to first threshold voltage VH, DLC (digital logic circuit) 211 control capacitance measurements enter hold mode H, control charge switch 202 and discharge switch 204 disconnect, and control charging timer stops timing, controls the final voltage V2 ' that A/D modular converter 209 is measured measured capacitance 208 simultaneously.
At this moment, finish a measuring period, processor system 212 reads charging starting potential V1, end of charge voltage V2 ' and duration of charging Δ t ' (maximum charge time) from DLC (digital logic circuit) 211, and calculate the capacitance size of measured capacitance 208 according to formula C=Ic Δ t '/Δ V, wherein Ic is the current value of charging constant current source 201 outputs, Δ V=V2 '-V1.
As further instruction, the double-limit comparator 210 in the present embodiment also can adopt window comparator to realize; If A/D converter speed is enough fast, also can passes through digital logic devices such as FPGA, CPLD and realize.
As further instruction, the circuit that first bleeder circuit 205 in the present embodiment and second bleeder circuit 206 also can adopt conventional, electric-resistance, PTC resistance etc. to have the branch compression functions is realized.
The described digital multimeter of present embodiment has following advantage:
1, under the situation of setting same charging current, the described multimeter of present embodiment has wideer capacitive measurement scales;
2, before carrying out charging process, earlier measured capacitance is carried out precharge, solved because the problem of electric capacity overdischarge is delayed time in the device reaction;
3, adopt constant current source to discharge, the velocity of discharge is faster, can further shorten measuring period.
Above embodiment only is used to illustrate the present invention, but not is used to limit the present invention, and any not creative creation that persons skilled in the art are done according to above-mentioned design philosophy all should be considered as within the protection domain of this patent.
Claims (8)
1. the measurement mechanism with capacitance measurement function comprises a charging module, a discharge module, and an A/D modular converter and a control treatment module,
Described charging module is used under the control of control treatment module, is the measured capacitance charging;
Described discharge module is used under the control of control treatment module, is the measured capacitance discharge;
Described A/D modular converter is used under the control of control treatment module, measures the voltage on the measured capacitance;
Described control treatment module, the duration of charging that is used to measure measured capacitance,
It is characterized in that:
Also comprise one first voltage comparator, described first voltage comparator is higher than a first threshold voltage-sensitive to the voltage of measured capacitance, produces one first measuring control signal;
Described control treatment module is to the described first measuring control signal sensitivity, and it is the measured capacitance charging that described charging module is stopped, and makes the voltage on the described A/D modular converter measurement measured capacitance.
2. measurement mechanism according to claim 1 is characterized in that:
Described first threshold voltage is less than or equal to the maximum input rated voltage of described A/D modular converter.
3. measurement mechanism according to claim 2 is characterized in that:
Also comprise one second voltage comparator,
Described second voltage comparator is lower than one second threshold voltage sensitivity to the voltage on the measured capacitance, produces one second measuring control signal; Voltage on the measured capacitance is higher than the described second threshold voltage sensitivity,
Produce one the 3rd measuring control signal;
Described control treatment module makes described discharge module stop to be the measured capacitance discharge to the described second measuring control signal sensitivity, and making described charging module is the measured capacitance charging;
Described control treatment module is also to described the 3rd measuring control signal sensitivity, at first make described charging module stop to be the measured capacitance charging earlier, make the voltage on the described A/D modular converter measurement measured capacitance, and then to make described charging module be measured capacitance charging, and begin simultaneously to measure the duration of charging.
4. measurement mechanism according to claim 3 is characterized in that: described second threshold voltage signal is more than or equal to the minimum input rated voltage of described A/D modular converter.
5. according to claim 1,2,3 or 4 described measurement mechanisms, it is characterized in that: also have a maximum charge time, described control treatment module reaches described maximum charge time-sensitive to the described duration of charging, it is the measured capacitance charging that described charging module is stopped, and makes the voltage on the described A/D modular converter measurement measured capacitance.
6. measurement mechanism according to claim 5; it is characterized in that: between measured capacitance and described charging module, be in series with one first bleeder circuit; be used to described charging module that overvoltage protection is provided; between measured capacitance and described discharge module, be in series with one second bleeder circuit, be used to described discharge module that overvoltage protection is provided.
7. according to claim 1,2,3 or 4 described measurement mechanisms; it is characterized in that: between measured capacitance and described charging module, be in series with one first bleeder circuit; be used to described charging module that overvoltage protection is provided; between measured capacitance and described discharge module, be in series with one second bleeder circuit, be used to described discharge module that overvoltage protection is provided.
8. measurement mechanism according to claim 6 is characterized in that: described first voltage comparator, second voltage comparator and described control treatment module realize by the FPGA device.
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