JP6212256B2 - AD conversion processor - Google Patents

Description

  The present invention relates to an AD conversion processing apparatus, and more particularly to a discretization process using an approximate function.

  In recent years, AD converters and similar devices have a function of reading electrical signals of hardware, and are positioned as essential element circuits for arithmetic devices or control devices. In addition, since the resolution determined by AD conversion affects the output results of various hardware, various efforts have been made to increase this resolution.

Japanese Utility Model Publication No. 03-101047

  However, when high resolution is required, the conventional AD converter increases the complexity and cost of the circuit configuration. For example, in the successive approximation AD converter circuit (Patent Document 1), since the high resolution and the conversion speed cannot avoid the trade-off relationship, it is necessary to select an allowable item such as a reduction in resolution or a reduction in conversion speed. Here, if high resolution is selected and conversion speed is to be increased, a device such as a DSP (Digital Signal Processor) is required, resulting in a complicated circuit configuration and high cost.

  Further, such a problem is not limited to the successive approximation AD converter circuit. For example, in a flash converter, a plurality of comparators must be provided, which leads to an increase in circuit scale.

  On the other hand, when the input voltage is detected by the output pulse of the hysteresis comparator, the reference voltage that changes according to the time constant is compared with the input voltage, and a discrete value of the input voltage is obtained based on the output pulse of the hysteresis comparator. However, when the reference voltage is generated by the integration circuit, the edge interval (time) of the output pulse and the input voltage are related by an exponential function, so the input voltage (or a discrete value corresponding to the input voltage) is calculated. Processing becomes very complicated.

Further, when the input voltage is Vin and the high value output period of the hysteresis comparator is tx,
Vin = (α · tx) + β,... (Α and β are constants determined by resistance values, etc.)
As described above, it is conceivable to calculate the input voltage Vin using an approximate expression obtained by linear regression. However, according to this method, depending on the setting of the time constant, a large approximation error is given and the detection accuracy is lowered.

  In addition, it is conceivable to reduce component costs by using a commercially available AD conversion IC. However, in a commercially available AD conversion IC, it is difficult to freely set the hysteresis characteristics and the frequency in the output value of the comparator because the built-in electrical element cannot be changed. For this reason, countermeasures such as preferable settings for noise removal and frequency settings for avoiding aliasing cannot be performed.

  In view of the above problems, an object of the present invention is to provide an AD conversion processing apparatus capable of realizing high-precision discrete processing using a simple circuit configuration.

In order to solve the above problems, the present invention has the following configuration of an AD conversion processing apparatus. That is, a hysteresis comparator that changes a detection pulse period of an output voltage corresponding to a period in which a detection value input voltage proportional to the input voltage is larger than an integration circuit type reference value input voltage according to the value of the input voltage, and a series function An information recording apparatus in which linear function information for specifying a relationship between an inverse value of the detection pulse period and a discrete value representing the input voltage is recorded based on a linear function that is an approximation result of a mathematical expression expanded to the linear function, and the linear function And an arithmetic unit that calculates the discrete value using information.

  Preferably, the reciprocal value of the detection pulse period is “1 / tc”, the input voltage is “Vin”, and a constant term is included in the approximate function obtained by Macrolin expansion regarding the input voltage “Vin”. Assuming that b is a coefficient of the primary term of the input voltage “Vin”, the electrical element configured in the AD conversion circuit unit satisfies the relationship “1 / tc = (a · Vin) + b”. Suppose that

  Preferably, the arithmetic device includes a detection pulse period calculation process for measuring the detection pulse period, an inverse value calculation process for calculating an inverse value of the detection pulse period, an inverse value of the detection pulse period, and the linear function information And a digital value setting process for calculating the discrete value using the function.

  Preferably, the linear function information includes a plurality of types of input voltages for inspection, and an inspection process for calculating an inverse value of the detection pulse period corresponding to the input voltage for inspection, and the input voltage for inspection. A linear function specifying process for specifying the linear function using a plurality of relationships with the inverse value of the detection pulse period corresponding thereto, and a function information generating process for generating the linear function information based on the linear function, It will be created.

  According to the AD conversion processing device according to the present invention, the AD converter circuit unit is configured by the hysteresis comparator, so that the configuration of the circuit unit is extremely simple. In addition, since the analog value is quantized based on the linear relationship between the input voltage and the reciprocal value of the detection pulse period, the detected input voltage is set to a discrete value by a function with little approximation error. Therefore, AD conversion is performed with high accuracy.

1 is a diagram illustrating a circuit configuration of an AD conversion processing apparatus according to an embodiment. The figure explaining a general hysteresis comparator. The time chart which shows the electric potential state of each terminal of a hysteresis comparator. The time chart which shows the operation | movement of a reference value input voltage. The figure which shows the linear relationship between an input voltage and the reciprocal value of a detection pulse period. The figure explaining a digital value calculation routine and a function creation routine. The figure which shows the modification of the AD conversion processing apparatus which concerns on this Embodiment (the 1). The figure which shows the modification of the AD conversion processing apparatus which concerns on this Embodiment (the 2).

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 illustrates the configuration of an AD conversion processing apparatus according to the present embodiment. As shown in the figure, the AD conversion processing device 1 includes an AD conversion circuit unit 10, an information recording device 30, and an arithmetic device 40, each of which is connected via a CPU bus 20 so as to be capable of data communication. The CPU bus 20 is a signal line in which a control bus, an address bus, and a data bus are bundled. Of these, the data bus transmits information Dp and the like (for example, count value information) indicating a detection pulse period.

  The AD conversion processing device 10 includes a voltage dividing resistor 11, a comparator 12, a resistor R3, a data generation circuit 13, and an integration circuit 14. The voltage dividing resistor 11 has a circuit configuration in which an input voltage Vin to be detected is applied to one end of the voltage dividing resistor 11 and an internal current is released to the ground GND. Therefore, the contact t1 of the voltage dividing resistor 11 (the contact between the resistor R1 and the resistor R2) outputs a voltage proportional to the input voltage Vin.

  The comparator 12 includes a non-inverting input terminal (+), an inverting input terminal (−), and an output terminal, and the non-inverting input terminal (+) is connected to the contact t1 through a signal line. For this reason, the voltage Vin + proportional to the input voltage Vin is applied to the non-inverting input terminal (+). Hereinafter, this voltage Vin + is referred to as a detected value input voltage Vin +.

  A resistor R3 is connected between the non-inverting input terminal (+) and the output terminal via contacts t1 and t3. A resistor R4 is connected between the inverting input terminal (−) and the output terminal via a contact t4 and a contact t3. The resistor R4 forms an integrating circuit 14 with a capacitor C1 connected in series. Hereinafter, the voltage input to the inverting input terminal (−) is referred to as a reference value input voltage Vin−.

  According to the AD conversion processing apparatus 1 according to the present embodiment, since the AD conversion circuit unit 10 is configured by a hysteresis comparator as described later, the configuration of the circuit unit is extremely simple. Further, in this embodiment, since the integration circuit 14 is used as the reference voltage generation circuit, there is a merit of absorbing a noise component superimposed on the input voltage Vin.

  Here, a general hysteresis comparator will be described with reference to FIG. The output voltage Vout of the comparator 12 becomes the voltage value of the power supply voltage Vcc when in the High state, and becomes zero (V) when in the Low state.

As shown in FIG. 2A, in the hysteresis comparator, the relationship between the current I1 flowing through the resistor R1, the current I2 flowing through the resistor R2, and the current I3 flowing through the resistor R3 satisfies the relationship “I1 = I2 + I3”. It becomes. Accordingly, when each of the current values I1 to I3 is calculated using the resistance value and the voltage value and is substituted into the relational expression “I1 = I2 + I3”, the detected value input voltage Vin + is expressed by the following expression. .

As described above, the output voltage Vout is switched between the high state and the low state. Here, when the detected value input voltage Vin + when “Vout = Vcc (High)” is Vtl and the detected value input voltage Vin + when “Vout = 0 (Low)” is Vth, these voltages Vtl and Vth are Is represented by the following equation.

  In FIG. 2B, the voltages Vtl and Vth are shown. That is, the detection value input voltages Vtl and Vth are set between the power supply voltage Vcc and zero (V), and form a relationship of “Vtl> Vth” as apparent from “Equation 2”.

  The reference voltage generation circuit X in FIG. 2A functions to periodically increase and decrease the applied voltage V (t). Here, as shown in FIG. 2A, the reference voltage generation circuit X starts to increase the applied voltage V (t) when the applied voltage V (t) drops to the voltage Vth (t = 0, t2). The applied voltage V (t) starts to decrease when the applied voltage V (t) rises to the voltage Vtl (t = t1, t3).

  Here, in the period (0 to t1, t2 to t3), the comparator 12 satisfies “Vin +> Vin−”, and thus sets the output voltage Vout to the High state. On the other hand, during the period (t1 to t2), since the comparator 12 becomes “Vin + <Vin−”, the output voltage Vout is set to the Low state (see FIG. 2C). Thus, the hysteresis comparator periodically switches the output voltage Vout in accordance with the changing operation of the reference value input voltage Vin−.

In the present embodiment, as shown in FIG. 1, the integration circuit 14 constitutes a reference voltage generation circuit. Here, assuming that the voltage across the capacitor C1 in the integration circuit 14 is Vc (t) and Vc (t) starts increasing when “t = 0”, Vc (t) is expressed by the following equation: It is represented by

  FIG. 4A shows a time chart of the charging operation in the capacitor C1. It can be seen from the expression of “Equation 3” that the voltage Vc (t) at the time of charging increases from Vc (0) = Vth as time elapses. However, at time ta when Vc (t) reaches Vtl, the output voltage Vout of the comparator 12 is switched from the high state (VoH) to the low state (VoL). In other words, the period (0 to ta) is a charging period of the both-end voltage Vc (t), and this is hereinafter referred to as a detection pulse period tc.

As described above, when t = 0, Vc (0) = Vth. When t = ta, Vc (ta) = Vtl. By using this and “Equation 3”, a relational expression of the period tc can be derived as follows.

即ち、検出パルス期間ｔｃは、入力電圧Ｖｉｎの増加に応じて増大し、入力電圧Ｖｉｎの減少に応じて低下することが解る。 Further, by substituting Vtl and Vth of “Equation 2” into “Equation 4”, the following equation is derived.

That is, it can be seen that the detection pulse period tc increases as the input voltage Vin increases, and decreases as the input voltage Vin decreases.

On the other hand, when the capacitor C1 is discharged, assuming that the discharge start time is zero, Vc (t) is expressed by the following equation.

Similarly to the above, when the period td is solved, the non-detection period td is expressed as follows.

  FIG. 4B shows a time chart of the discharging operation in the capacitor C1. It can be seen from the expression of “Equation 6” that the voltage Vc (t) at the time of discharge becomes Vc (0) = Vtl, and decreases with time. However, at time tb when Vc (t) reaches Vth, the output voltage Vout of the comparator 12 is switched from the low state (VoL) to the high state (VoH) contrary to the previous case. The period (0 to tb) here is referred to as a non-detection period td.

  As shown in FIG. 4C, the voltage Vc (t) across the capacitor C1 is repeatedly charged and discharged according to the switching operation of the output voltage Vout, and therefore repeats between the inverted input voltages Vtl to Vth. It fluctuates as follows. Further, the voltage Vc (t) at both ends repeats its operation according to a cycle T (T = tc + td). Here, it is assumed that the input voltage Vin fluctuates, and accordingly, the input voltage Vin fluctuates as shown in FIG. 3 (actually fluctuates slowly). In this case, since the increasing speed of the reference value input voltage Vin− fluctuates according to the input voltage Vin, the charge / discharge cycle T of the both-end voltage Vc (t) is increased if the input voltage Vin is large. If the voltage Vin decreases, the period is lowered.

  Here, it is clear that such a tendency appears only in the detection pulse period tc. That is, the hysteresis comparator described above changes the detection pulse period tc according to the value of the input voltage Vin. Therefore, in this embodiment, only the detection pulse period tc is observed, and the input voltage Vin is grasped as a digital value according to the length of the period tc.

  Returning to FIG. 1, the remaining configuration of the AD conversion circuit unit 10 will be described. The data generation circuit 13 includes a control logic 131, a gate circuit 132, and a counter 133. The control logic 131 defines the frequency of the pulse signal, the sample timing of the counter 133, and the like. The gate circuit 132 allows the pulse signal to pass only when the pulse signal and the output voltage Vout are respectively input and the output voltage Vout is in a high state. That is, the pulse signal PLS shown in FIG. 3 has a waveform indicating the output of the gate circuit 132. The counter 133 performs a reset operation at an appropriate timing so as to perform a count operation for the detection pulse period tc. When the pulse signal PLS is input to the counter 133, the counter 133 counts the number of pulses of the pulse signal PLS, and creates digital data of the count value (see COUNTER in FIG. 3) in the data register. Thereafter, the counter 133 outputs count information of the pulse signal PLS to the arithmetic processing 40 in accordance with a command from the arithmetic processing 40 described later. This count information is a count result of the number of pulses, and is information indicating the detection pulse period tc, which means information indicating the magnitude of the input voltage Vin.

  Since the AD conversion circuit unit 10 according to the present embodiment detects information related to time, the quantization error related to the voltage value of the input voltage can be minimized. Since the input voltage is quantized using a function with a small approximation error, which will be described later, a highly accurate AD conversion result value can be obtained.

  In this embodiment, the information recording device 30 includes a nonvolatile memory 31 (Read Only Memory), an EEPROM 32 (Electrically Erasable Programmable Read-Only Memory), and a volatile memory (Random Access Memory). Among these, various control programs are recorded in the non-volatile memory 31, and information being calculated is recorded as needed in the volatile memory. Further, for example, linear function information described later is recorded in the storage area of the EEPROM 32. Since this linear function information is information that can be rewritten as necessary, it is stored in an erasable memory circuit.

  The arithmetic unit 40 is a CPU (Central Processing Unit), and is provided with a data register 41, a control register 42, an address register 43, and a clock circuit. The data register 41 temporarily holds calculation results and the like and holds numerical information obtained from the information recording device 30. Further, the data register 41 executes simple arithmetic processing such as four arithmetic operations. The control register 42 fetches command information at a predetermined address from the control program, and executes processing according to the fetched command information. The address register 43 counts up the current address value of the control register and prepares for the next fetch operation. As described above, the arithmetic device 40 sequentially executes the processes according to the sequence order. In other words, the arithmetic device 40 constructs an appropriate processing device in cooperation with the control program and various parameters stored in the information recording device 30. Such processing operation will be described in detail later.

As pointed out in “Problems to be Solved by the Invention”, if the input voltage Vin and the pulse period tx are approximated as “Vin = (α · tx) + β”, the approximation error increases. Occurs. For this reason, in this embodiment, the detection pulse period tc is not used as a variable of a linear function as it is, but the reciprocal value “1 / tc” of the detection pulse period is used as a variable of an approximate function (primary function). Tried. More specifically, the logarithmic function is replaced with f (Vin) and the equation “Formula 5” is solved for “1 / tc”. Then, the reciprocal value “1 / tc” of the detection pulse period is expressed as follows.

Here, the logarithmic function f (Vin) in the above equation is assumed to have parameters p and q set so that “Vin = 0” is continuous and has a differential coefficient. In this case, when the macrolin expansion is performed on the logarithmic function f (Vin), “1 / tc” is expressed as follows.

これによれば、検出パルス期間ｔｃが冗長される場合であっても、検出パルス期間の逆数値「１／ｔｃ」が正しく測定されれば、入力電圧Ｖｉｎを精度よく求めることが可能となる。 Here, regarding the high-order polynomial of Vin in the above equation, it is understood that the coefficient of the second-order term is sufficiently small if the denominator and the numerator order are compared. For the same reason, the coefficient corresponding to the higher-order term coefficient is sufficiently small. Therefore, it can be understood that the right-hand side representing the reciprocal value “1 / tc” of the detection pulse period hardly causes an approximation error even if the second and higher terms are ignored. The following equation is obtained by eliminating the higher-order term on the right side after the macrolin expansion. For the above-described reason, the error due to this equation is sufficiently small regardless of the value of the input voltage Vin.

According to this, even when the detection pulse period tc is redundant, the input voltage Vin can be obtained with high accuracy if the reciprocal value “1 / tc” of the detection pulse period is correctly measured.

  In the present embodiment, an approximation function based on the reciprocal of the non-detection period td is not used as a model. This is because even if the macrolin expansion is performed on the right side Vin of “Equation 7”, the expansion equation obtained by this is a value in which the coefficient of the high-order term cannot be ignored. That is, according to the present embodiment, by using a variable “1 / tc” suitable for setting an approximate expression, the approximate function is made a simple function called a linear function, and the setting of the electrical elements of the AD converter circuit unit is made. Making it easier.

Here, when the parameters a and b are set for the slope and the constant term in the expression of “Equation 10”, they are expressed as follows.

  The parameters a and b are parameters that can be calculated from the resistors R1 to R4, the electric capacity C1, and the power supply voltage Vcc. Among these, since the power supply voltage Vcc is controlled to a constant value, it means that the parameters a and b are determined according to the element configuration of the AD conversion circuit unit 10.

  In FIG. 5A, the relationship between the reciprocal value “1 / tc” of the detection pulse period and the input voltage Vin is created based on the above approximate line. In the figure, parameters a and b are such that the reciprocal value F (0) is detected when the input voltage Vin is 0 (v), and the reciprocal value F (5) is detected when the input voltage Vin is 5 (v). Is set. That is, the electrical elements (resistance, capacitance) of the AD conversion circuit unit 10 are selected so that such characteristics appear.

  As shown in FIG. 5B, the linear function information recorded in the EEPROM 32 includes a discrete function BIT used in an arithmetic unit or the like and an inverse value “1 / tc” of the detection pulse period as a predetermined function. Based on the relationship. In FIG. 5B, the reciprocal value “1 / tc” of the detection pulse period is discretized into 8-bit data. That is, LSB = 0 and MSB = 255.

  As shown in FIG. 5B, the discrete value BIT is “BIT = BIT (0) = 0” when the reciprocal value is F (0), and “BIT = BIT (5) when the reciprocal value is F (5). = 255 ". The detected value between F (0) to F (5) is equally divided into 1/256 and associated with each value of the discrete value BIT. Thus, in the figure, the resolution of the detection value corresponding to 1 BIT is “Δ (1 / tc) / 256”.

（尚、右辺の［ ］はガウス記号を指す。） The following equation “Equation 12” represents a linear function representing the relationship between the discrete value BIT and the reciprocal value “1 / tc” of the detection pulse period.

(Note that [] on the right side indicates a Gaussian symbol.)

  In the present embodiment, linear function information specified based on the linear function of “Equation 12” is recorded in the storage area of the EEPROM 32. For example, the linear function information may be information including a constant term of the first item on the right side and a coefficient of the second item on the right side. The linear function information may be map information created in advance based on the linear function.

  As described above, the calculated discrete value BIT corresponds to the reciprocal value “1 / tc” of the detection pulse period (see FIG. 5 b), and this reciprocal value “1 / tc” corresponds to the input voltage Vin. Corresponding (see FIG. 5a). This means that a correspondence relationship between the input voltage Vin and the discrete value BIT is formed, and the input voltage Vin is specified by the calculation result of the discrete value BIT.

  Specifically, as described above, when the input voltage Vin is given, the AD conversion circuit unit 10 outputs information (count value) corresponding to the detection pulse period tc to the arithmetic unit 40. In response to this, the arithmetic unit 40 activates an arithmetic routine (see FIG. 6a), and first executes a detection pulse period calculation process S11. In this process S11, the detection pulse period tc is calculated and measured by multiplying the count value by the pulse period of the pulse signal PLS.

  Thereafter, in the reciprocal value calculation process S12, a reciprocal calculation process is constructed, and the result value “1 / tc” in the process S11 is substituted for it. Thereby, in process S12, the reciprocal value “1 / tc” of the detection pulse period is calculated.

  Thereafter, in the digital value setting process S13, the discrete value BIT is calculated using the reciprocal value “1 / tc” of the detection pulse period and the linear function information. For example, when the discrete value BIT is calculated by function calculation, the constant term and the coefficient of the linear function of “Equation 12” are read from the storage device to the data register 41, and this is used to construct the calculation processing function of the linear function. The discrete value BIT is calculated by substituting the detected value of “1 / tc” into. The calculation processing routine ends after the completion of the processing S13, and after the next count value is confirmed by the calculation device 40, the operation is restarted.

  According to the AD conversion processing apparatus 1 according to the present embodiment, the analog value is quantized based on the linear relationship between the input voltage Vin and the reciprocal value “1 / tc”. A function that is very close (or equivalent) to the approximate function that was used is used. For this reason, a discrete value is set for the detected input voltage by a function with a small approximation error, and AD conversion is performed with high accuracy.

  In order to realize AD conversion based on the above approximate function, an electrical element that satisfies the parameters a and b may be selected. That is, even if the circuit configuration is not complicated as in the prior art, highly accurate AD conversion can be configured by changing the resistance value and the like of the AD conversion circuit unit.

  Further, the reciprocal value “1 / tc” of the detection pulse period depends on the parameters a and b, and can be appropriately adjusted by changing the setting of the electric elements constituting the AD conversion circuit unit 10. Therefore, even in a system in which the reading speed of the arithmetic circuit 40 such as a CPU is inferior, the inverse value “1 / tc” is reduced by selecting the above-described electrical element, and AD conversion is performed without causing a decrease in accuracy. Can be done.

  On the other hand, according to the present embodiment, when there is a margin in the specifications on the arithmetic circuit side, an electrical element of the AD conversion circuit unit 10 is appropriately selected to increase the reciprocal value “1 / tc” of the detection pulse period. It is also possible to increase the speed of the conversion operation. This setting is also realized by simple means such as appropriate selection of electrical elements of the AD conversion circuit unit 10 as described above.

  In addition, according to the present embodiment, the detection pulse period tc can be freely defined by appropriately setting the elements of the AD conversion circuit unit 10, so that it is possible to easily take measures against circuit problems such as aliasing. Is possible.

（尚、右辺の［ ］はガウス記号を指す。） The following equation (Equation 13) is obtained by substituting “Equation 11” into the above “Equation 12”.

(Note that [] on the right side indicates a Gaussian symbol.)

  If the fluctuation range of the input voltage Vin is assumed, “η · a” can be adjusted to keep the measurement result within the range of the set number of bits, and the offset amount can be adjusted by “ξ”. It ’s fine. Since “η · a” and “ξ” are functions of the parameters a and b, appropriate setting of the parameters a and b is important in order to keep the input voltage Vin in a desired bit range. In the present embodiment, even when such a problem is solved, it is easily achieved by appropriate selection of electrical elements of the AD conversion circuit unit 10, which realizes effective use of the set number of bits, and AD This contributes to improvement of accuracy in conversion.

  In addition, in the present embodiment, the above-described linear function information can be created and corrected by the “linear function information creation routine” shown in FIG. This routine is activated by event information given in the manufacturing process or repair operation of the AD conversion processing apparatus.

  In the inspection process S21, a plurality of types of input voltages for inspection are given, and reciprocal values “1 / tc” corresponding to the input voltages for inspection are calculated. That is, the measurement result of a plurality of points related to the reciprocal value “1 / tc” is acquired by this process S21.

  Thereafter, in the linear function specifying process S22, the parameters a and b related to “Equation 11” are calculated by using a plurality of relationships between the input voltage for inspection and the inverse values corresponding thereto, and the linear function is specified. . As described above, in the “linear function information creation routine”, processing is performed to reversely calculate the parameters a and b using the inspection result.

  Thereafter, in the function information creation process S23, the linear function information is recorded in the storage device based on the linear function specified in the process S22. This linear function information may be information corresponding to “slope” and “constant term”, or may be map information obtained by specifically giving the input voltage Vin.

  Thus, even if the linear function information is not recorded in the information recording device 30, it is possible to create the linear function information by starting the “linear function information creation routine”. In addition, when a change appears in the electrical properties of the resistance element or the capacitor, the linear input information can be tuned using the “linear function information creation routine”.

  In addition, for the linear information specified by the “linear function information creation routine”, the analog value is quantized based on the linear relationship between the input voltage Vin and the inverse value “1 / tc”. A function that is very close (or equivalent) to the approximate function using the Macrolin expansion is used. For this reason, a discrete value is set for the detected input voltage by a function with a small approximation error, and AD conversion is performed with high accuracy.

  In the present embodiment, the AD conversion circuit unit is a custom product so that all the electrical elements (resistors, capacitors) of the AD conversion circuit unit 10 can be set as desired elements. However, some AD conversion ICs connect all or part of the electrical elements that determine the above-described characteristics from the outside, and the present invention is applied to such ICs within a range where such changes are allowed. It is possible.

  The hardware described above is merely one form of the technical idea in the claims, and the form can be variously changed as follows.

  For example, in the AD conversion circuit unit 10 in FIG. 7, a reference voltage generation circuit 24 that connects the time constant circuit 25 to the output side of the comparator 12 and performs D / A conversion of the counter value is provided. Even with such a configuration, if the software described in the above-described embodiment is provided, AD conversion can be performed with high accuracy.

  In the AD conversion processing device 3 of FIG. 8, an FPGA (Field-Programmable Gate array) is connected to the CPU bus 20. The FPGA 50 includes a configuration ROM 51 and a logical block area 52, and functions the logical block area 52 in an appropriate processing device based on information recorded in the configuration ROM 51. That is, in the figure, the configuration ROM 51 is an information recording device, and the logical block area 52 is an arithmetic device. Instead of using the FPGA 20, a rewritable logic device such as a PLD (Programmable Logic Device) may be used.

  In addition, a DMAC (Direct Memory Access Controller) is additionally configured to calculate the reciprocal value “1 / tc” or a discrete value BIT corresponding to the inverse value “1 / tc” using the DMAC, and then the result value is set to the CPU (or memory circuit). You may make it forward to.

  DESCRIPTION OF SYMBOLS 1 AD conversion processing device, 10 AD conversion circuit part, 12 Hysteresis comparator, 20 CPU bus, 30 Information recording device, 40 Central processing unit (arithmetic unit), Vin input voltage, Vin + detected value input voltage, Vin- reference value input Voltage, Vout output voltage, tc detection pulse period, 1 / tc inverse value of detection pulse period, S11 detection pulse period calculation process, S12 inverse value calculation process, S13 digital value setting process, S21 inspection process, S22 linear function specifying process, S23 Function information creation processing.

Claims (4)

The detection value proportional to the input voltage is expanded into a series function and a hysteresis comparator that changes the detection pulse period of the output voltage corresponding to the period when the input voltage is larger than the integration circuit type reference value input voltage according to the value of the input voltage. An information recording device in which linear function information for specifying a relationship between an inverse value of the detection pulse period and a discrete value representing the input voltage is recorded based on a linear function that is an approximation result of the mathematical expression, and the linear function information An AD conversion processing apparatus comprising: an arithmetic unit that calculates the discrete value using the arithmetic unit. The reciprocal value of the detection pulse period is “1 / tc”, the input voltage is “Vin”, and the constant term of the approximate function obtained by the Macrolin expansion for the input voltage “Vin” is b, When the coefficient of the primary term of the input voltage “Vin” is a,
2. The AD conversion processing apparatus according to claim 1, wherein the electrical elements configured in the AD conversion circuit section satisfy a relationship of “1 / tc = (a · Vin) + b”. The arithmetic device uses a detection pulse period calculation process for measuring the detection pulse period, an inverse value calculation process for calculating an inverse value of the detection pulse period, an inverse value of the detection pulse period, and the linear function information. The AD conversion processing apparatus according to claim 1 or 2, wherein a digital value setting process for calculating the discrete value is made to function. The linear function information includes a plurality of types of test input voltages, and each calculates a reciprocal value of the detection pulse period corresponding to the test input voltage, the test input voltage, and the corresponding And a function information creating process for creating the linear function information based on the linear function, and a function information creating process for creating the linear function information based on the linear function. The AD conversion processing apparatus according to any one of claims 1 to 3 , wherein the AD conversion processing apparatus according to any one of claims 1 to 3 is provided.

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