CN102072989B - Measurement device with function of measuring capacitance - Google Patents

Measurement device with function of measuring capacitance Download PDF

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Publication number
CN102072989B
CN102072989B CN201010534901.0A CN201010534901A CN102072989B CN 102072989 B CN102072989 B CN 102072989B CN 201010534901 A CN201010534901 A CN 201010534901A CN 102072989 B CN102072989 B CN 102072989B
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China
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voltage
charging
module
measured capacitance
measurement
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CN201010534901.0A
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Chinese (zh)
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CN102072989A (en
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王悦
王铁军
李维森
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北京普源精电科技有限公司
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Abstract

The present invention provides a measurement device with a function of measuring capacitance, which comprises a capacitance measurement end (207), a charging module (216), a discharging module (217), an A/D (analog/digital) conversion module (209), a double-limit comparator (210), a control processing module (215), a first voltage division circuit (205) and a second voltage division circuit (206). The charging timer of the control processing module (215) has two charging ending conditions: the maximum charging time and the first threshold voltage VH. When the charging ending conditions are satisfied, the charging timer stops timing, and the A/D conversion module (209) is controlled to measure the voltage. By adopting the method, the charging time delta t and the voltage delta V in the formula C = Ic delta t/ delta V can be obtained, and the capacitance of a capacitor (208) to be measured can be calculated. The measurement device solves the problem of the prior art that the existing measurement device can not automatically adapt to measurement of small capacitance and large capacitance.

Description

A kind of measurement mechanism with capacitance measurement function
Technical field
The present invention relates to measurement mechanism field, particularly relate to capacitance measuring device field.
Background technology
In prior art, in order to improve the precision of low capacitance measurement and the speed of large capacitance measurement, adopted many measuring methods perhaps.
In the method > > of Chinese patent application < < mirror-image constant flow source measuring capacitance (publication number is 101082644A), introduced a kind of capacitance measurement method.As shown in Figure 1, measurement mechanism 1 comprises measured capacitance 101, mirror-image constant flow source charge-discharge modules 102, voltage detection module 107, control module 108 and the clock generator 109 being connected in series successively, and mirror-image constant flow source charge-discharge modules 102 comprises constant current source 103, charge-discharge circuit 104, mirror image circuit 105 and charge and discharge switch control circuit 106.Two kinds of embodiments are disclosed in this patent specification.In these two embodiment, charge and discharge switch control circuit 106 consists of gate-controlled switch K1.
Embodiment is the fixing measuring method in duration of charging, and control module 108 is by measuring the difference of the later voltage of voltage before the charging of measured capacitance 101 and charging, thereby calculates capacitance.Whole measuring process comprises between charge period, interdischarge interval.The cycle that completes charge and discharge just can be measured the capacitance of measured capacitance 101.Wherein voltage detection module 107 consists of A/D converter.
Step 1: between charge period, control module 108 is controlled K1 and opened, and opens charging circuit, closes discharge circuit.Control module 108 starts timing simultaneously.
Step 2: timer meter is to time certain time interval T, and timer reset zero clearing, restarts timing.It is closed that control module 108 is controlled K1, and charge closing circuit, opens discharge circuit.And simultaneously by A/D converter, read the magnitude of voltage v1 in measured capacitance now.
Step 3: timer meter is to time certain time interval T, and timer reset zero clearing, restarts timing.Control module 108 is controlled K1 and is opened, and opens charging circuit, closes discharge circuit.And simultaneously by A/D converter, read the magnitude of voltage v2 on electric capacity now.
Thus, we can calculate the capacitance Cx of measured capacitance 101:
ΔU=|v2-v1|
C *=(charging current I1 * T)/Δ U
Repeat above-mentioned step 2, step 3, can periodically measure.
Because this method charge and discharge time is short, be very suitable for the measurement to large electric capacity.
Another kind of embodiment is the poor measuring method of fixed voltage, and control module 108 changes to the time Δ t of preset voltage value v2 from preset voltage value v1 by the voltage in measured capacitance 101, thereby calculate measured capacitance values.Wherein voltage detection module 107 consists of voltage comparator CV1 and voltage comparator CV2.
Step 1: discharge step.Control module 108 is controlled K1 and is opened, and opens discharge circuit, charge closing circuit.Electric capacity starts electric discharge.When the voltage on electric capacity is less than or equal to comparative voltage v2, the upset of the output level of voltage comparator CV2;
Step 2: when the voltage on electric capacity is less than or equal to comparative voltage v2, the upset of the output level of voltage comparator CV2, control module 108 detects the variation of CV2 output level, and it is closed that control module 108 is controlled K1, opens charging circuit, closes discharge circuit.Electric capacity starts charging.Meanwhile, control module 108 starts timing.
Step 3: when the voltage on electric capacity is more than or equal to comparative voltage v1, the upset of the output level of voltage comparator CV1; Control module 108 detects the output level upset of voltage comparator CV1, stops timing, records timing time Δ t; Control module is controlled K1 and is opened, and opens discharge circuit, charge closing circuit.Electric capacity starts electric discharge.
Step 4: repeating step two, three.
The output waveform of voltage comparator CV1 and voltage comparator CV2 is sent in control module 108, the frequency f of the waveform signal of control module 108 measuring voltage comparator C V1 outputs, because charging current equals discharge current, thus the duration of charging equal discharge time, so: Δ t=1/f/2.
Thus, we can calculate the capacitance Cx of measured capacitance 101:
ΔU=v1-v2
Δt=1/f/2
C *=(charging current I1 * T)/Δ U
The poor measuring method of the measuring method of set time described in prior art and fixed voltage all can not adapt to the measurement of large capacitance measurement and little electric capacity automatically.
Such as, under the measuring method of described set time, when charging current one regularly, the longer duration of charging is set, the Measurement accuracy of the larger electric capacity that can realize, but the same duration of charging just cannot meet the measurement needs of little electric capacity.Its reason is, under same charging current, the duration of charging that measured capacitance needs is very short.Duration of charging is long, tends to make the voltage at measured capacitance two ends to exceed A/D converter input voltage range, makes capacitance measurement inaccurate.
Again such as, under the poor measuring method of described fixed voltage, when measuring little electric capacity, in order to obtain higher measuring accuracy, often set a less charging current, but less charging current, can make the measuring period of large capacitance measurement elongated, even exceed the limit that user waits for.Its reason is, under same charging current, in duration of charging that need to be longer, can make the voltage at large electric capacity two ends reach setting voltage value.
Summary of the invention
Fundamental purpose of the present invention is to solve problems of the prior art, and a kind of measurement mechanism with capacitance measurement function is provided, and this device can be applicable to the measurement of large electric capacity and little electric capacity automatically.
The measurement mechanism with capacitance measurement function of the present invention, comprises a charging module, a discharge module, an A/D modular converter and a control processing module, described charging module, for controlling under the control of processing module, is measured capacitance charging; Described discharge module, for controlling under the control of processing module, is measured capacitance electric discharge; Described A/D modular converter, for controlling under the control of processing module, measures the voltage in measured capacitance; Described control processing module, for measuring the duration of charging of measured capacitance, also comprises first voltage comparator, and the first described voltage comparator higher than a first threshold voltage-sensitive, produces first measuring control signal to the voltage of measured capacitance; Described control processing module is responsive to the first described measuring control signal, makes described charging module stop, for measured capacitance charging, making described A/D modular converter measure the voltage in measured capacitance.
In measurement mechanism of the present invention, described first threshold voltage can be less than or equal to the maximum input rated voltage of described A/D modular converter.
In measurement mechanism of the present invention, can also comprise a second voltage comparer, described second voltage comparer lower than a Second Threshold voltage-sensitive, produces second measuring control signal to the voltage in measured capacitance; Voltage in measured capacitance, higher than described Second Threshold voltage-sensitive, is produced to the 3rd measuring control signal; Described control processing module is responsive to the second described measuring control signal, and described discharge module is stopped as measured capacitance electric discharge, and making described charging module is measured capacitance charging; Described control processing module is also responsive to the 3rd described measuring control signal, first make described charging module first stop as measured capacitance charging, make described A/D modular converter measure the voltage in measured capacitance, and then to make described charging module be measured capacitance charging, and start to measure the duration of charging simultaneously.
In measurement mechanism of the present invention, described Second Threshold voltage signal can be more than or equal to the minimum input rated voltage of described A/D modular converter.
In measurement mechanism of the present invention, can also there is a maximum charge time, described control processing module reaches described maximum charge time-sensitive to the described duration of charging, make described charging module stop, for measured capacitance charging, making described A/D modular converter measure the voltage in measured capacitance.
In measurement mechanism of the present invention; between measured capacitance and described charging module, can be in series with first bleeder circuit; be used to described charging module that overvoltage protection is provided; between measured capacitance and described discharge module, can be in series with second bleeder circuit, be used to described discharge module that overvoltage protection is provided.
In measurement mechanism of the present invention, the first described voltage comparator, second voltage comparer and described control processing module all can be realized by FPGA device.
Surveying instrument of the present invention, not only can be applicable to the measurement of large electric capacity and little electric capacity simultaneously, and have following characteristics:
1, capacitance measurement control method of the present invention can meet the large electric capacity of measurement and little electric capacity simultaneously, needn't separately process, and control method is simpler.
2, the present invention, for charge and discharge constant current source provides overvoltage crowbar, can prevent because the overvoltage in maloperation or measuring process damages charge and discharge constant current source.
Accompanying drawing explanation
Fig. 1 is the structural representation that adopts the measurement mechanism 1 of prior art.
Fig. 2 is the structural representation of measurement mechanism 2 provided by the invention.
Fig. 3 is the structural representation of the first bleeder circuit 205.
Fig. 4 is the structural representation of the second bleeder circuit 206.
Fig. 5 is the structural representation of double-limit comparator 210.
Fig. 6 is the voltage measurement waveform that measured capacitance 208 is charged while reaching first threshold voltage VH.
Fig. 7 is that measured capacitance 208 chargings reach the voltage measurement waveform of maximum charge during the time.
Embodiment
Lower mask body is introduced preferred forms of the present invention.
With reference to Fig. 2, measurement mechanism 2 comprises capacitance measurement end 207, charging module 216, discharge module 217, A/D modular converter 209, double-limit comparator 210, control processing module 215, display module 213 and load module 214, the first bleeder circuits 205 and the second bleeder circuit 206.Charging module 216 comprises charging constant current source 201 and charge switch 202, and discharge module 217 comprises electric discharge constant current source 203 and discharge switch 204, controls processing module 215 and comprises DLC (digital logic circuit) 211, processor system 212.
In the present embodiment, measurement mechanism 2 is digital multimeter.As other embodiment, measurement mechanism 2 can also be other devices with capacitance measurement function, for example, and capacitance meter, galvanometer etc.
In the present embodiment, charging module 216 is comprised of charging constant current source 201 and charge switch 202, and discharge module 217 is comprised of electric discharge constant current source 203 and discharge switch 204.As other embodiment, also can adopt mirror-image constant flow source charge-discharge modules of the prior art to realize charging module 216 in the present invention and the function of discharge module 217.
In the present embodiment, DLC (digital logic circuit) 211 and the processor system 212 controlled in processing module 215 adopt FPGA device to realize.As other embodiment, DLC (digital logic circuit) 211 and processor system 212 also can adopt the devices such as CPLD, DSP to realize.
In the present embodiment,
Capacitance measurement end 207 is for being connected with measured capacitance 208.
Charging constant current source 201, charge switch 202, the first bleeder circuit 205 and capacitance measurement end 207 are connected in series the charge circuit that forms measured capacitance 208 successively.
In the present embodiment, charging constant current source 201 is program controlled constant current sources, the user's input information that processor system 212 receives according to load module 214, set the size of charging constant current source 201 output current Ic, and the 3rd control signal 220 of exporting by DLC (digital logic circuit) 211 is controlled the suitable electric current I c of charging constant current source 201 output.The size of the electric capacity that user can measure as required arranges suitable charging current Ic.As other embodiment, processor system 212 also can be realized and automatically be selected optimum measurement range by programming, for example can be by the method for measured value and the comparison of range bound is selected to best range.
According to the control of the first control signal 218 of DLC (digital logic circuit) 211 outputs, charge switch 202 is opened or is closed, is measured capacitance 208 chargings.
The first bleeder circuit 205 mainly plays the effect of overvoltage protection; prevent because the too high voltage of capacitance measurement end 207 accesses damages charging constant current source 201; concrete structure refers to Fig. 3; input end Ii1 is connected in series with the output terminal of charging constant current source 201, and output terminal Io1 and capacitance measurement end 207 are connected in series.While charging normal, electric current flows into from input end Ii1, while flowing out from output terminal Io1, and triode Q1~Q8 and diode D1 forward bias, diode D4 reverse bias.When triode Q1~Q8 and diode D1 forward bias, can be equivalent to the resistance of a low resistance, can think open circuit during diode D4 reverse bias, electric current flows into from input end Ii1 like this, from output terminal Io1, exports.If output terminal Io1 adds forward high pressure, diode D1 reverse bias, has blocked high pressure, and protection charging constant current source 201 can not damage; If output terminal Io1 adds negative sense high pressure, diode D4 forward bias, the voltage on resistance R 1~R4 increases, and most of voltage-drop is upper to triode Q1~Q8 and resistance R 1~R4, and protection charging constant current source 201 can not damage.
Referring again to Fig. 2, electric discharge constant current source 203, discharge switch 204, the second bleeder circuit 206 and capacitance measurement end 207 are connected in series the discharge loop that forms measured capacitance 208 successively.
In the present embodiment, electric discharge constant current source 203 adopts constant current source, and the velocity of discharge is fast.
Discharge switch 204 is opened according to the control of the second control signal 219 of DLC (digital logic circuit) 211 outputs or is closed, is measured capacitance 208 electric discharges.
The second bleeder circuit 206 mainly plays the effect of overvoltage protection; prevent because the too high voltage of capacitance measurement end 207 accesses damages electric discharge constant current source 203; concrete structure is asked for an interview Fig. 4; input end Ii2 and capacitance measurement end 207 are connected in series, and output terminal Io2 is connected in series with the input end of electric discharge constant current source 203.During regular picture, electric current flows into from input end Ii2, while flowing out from output terminal Io2, and triode Q9~Q16 and diode D2 forward bias, diode D3 reverse bias.When triode Q9~Q16 and diode D2 forward bias, can be equivalent to the resistance of a low resistance, can think open circuit during diode D3 reverse bias, electric current flows into from input end Ii2 like this, only from output terminal Io1, exports.If input end Ii2 adds negative sense high pressure, diode D2 reverse bias, has blocked high pressure, and protection electric discharge constant current source 203 can not damage; If output terminal Io2 adds forward high pressure, diode D3 forward bias, the voltage on resistance R 5~R8 increases, and most of voltage-drop is upper to triode Q9~Q16 and resistance R 5~R8, and protection electric discharge constant current source 203 can not damage.
Referring again to Fig. 2, A/D modular converter 209 is connected in series with capacitance measurement end 207, and A/D modular converter 209 consists of A/D converter ADS1256 in the present embodiment, and its maximum input rated voltage is 3V, and minimum input rated voltage is 0V.With ADS1256, measure the analog voltage signal of measured capacitance 208, and convert it into after digital voltage signal, give DLC (digital logic circuit) 211.
With reference to figure 5 and Fig. 2, double-limit comparator 210 consists of the first voltage comparator 501 and second voltage comparer 502, and input end Input and the capacitance measurement end 207 of double-limit comparator 210 are connected in series.
The positive input terminal In1+ of the first voltage comparator 501 is connected in series with input end Input by resistance R 12, for obtaining analog voltage signal from measured capacitance 208, its negative input end In1-is used for inputting first threshold voltage VH, the first voltage comparator 501 is by positive input terminal In1+ voltage signal and first threshold voltage VH comparison, when positive input terminal In1+ voltage voltage signal surpasses first threshold voltage VH, by output terminal Output1, export the first measuring control signal 505, in the present embodiment, the first measuring control signal 505 is a high level signal, this signal is fed to DLC (digital logic circuit) 211.As other embodiment, the first measuring control signal 505 can be also a low level signal.
The positive input terminal In2+ of second voltage comparer 502 is connected in series with input end Input by resistance R 12, for obtaining analog voltage signal from measured capacitance 208, its negative input end In2-is used for inputting Second Threshold voltage VL, second voltage comparer 502 is by positive input terminal In2+ voltage signal and Second Threshold voltage VL comparison, when positive input terminal In2+ voltage signal is during lower than Second Threshold voltage VL, by output terminal Output2, export the second measuring control signal 506, in the present embodiment, the second measuring control signal 506 is low level signals, this signal is fed to DLC (digital logic circuit) 211, when positive input terminal In2+ voltage signal is during higher than Second Threshold voltage VL, by output terminal Output2 output the 3rd measuring control signal 507, in the present embodiment, the 3rd measuring control signal 507 is a high level signal, and this signal is fed to DLC (digital logic circuit) 211.As other embodiment, the second measuring control signal 506 can be also a high level signal, and the 3rd measuring control signal 507 can be also a low level signal.
In the present embodiment, by resistance R 9, R10 and R11, with reference to voltage Vref, distribute to first threshold voltage VH and Second Threshold voltage VL.
In the present embodiment, resistance R 13 is connected between positive input terminal In1+ and output terminal Output1, resistance R 14 is connected between positive input terminal In2+ and output terminal Output2, resistance R 13 and resistance R 14 provide positive feedback to respectively the first voltage comparator 501 and second voltage comparer 502, can be so that comparer work is more stable.In the present embodiment, the size of resistance R 13 and resistance R 14 is 30 times of left and right of resistance R 12 sizes, therefore the analog voltage signal of the relative input end Input of amount of positive feedback is very little, can suppose and think that the voltage swing of the first comparer positive input terminal In1+ and the second comparer positive input terminal In2+ is with the analog voltage equal and opposite in direction of input end Input.
And in order to realize correct charge and discharge process, first threshold voltage VH is greater than Second Threshold voltage VL; In order to make the input of A/D modular converter 209 unsaturated, first threshold voltage VH gets the maximum input rated voltage that is less than A/D modular converter 209, and Second Threshold voltage 504 is got the minimum input rated voltage that is greater than A/D modular converter 209; In order to make charging voltage follow the ratio of noise voltage as far as possible large, the absolute value of the difference of first threshold voltage VH and Second Threshold voltage VL will be tried one's best greatly.In the present embodiment, first threshold voltage VH is set to 2.1V, and Second Threshold voltage VL is set to 0.7V.As other embodiment, first threshold voltage VH and Second Threshold voltage VL also can select other numerical value, such as, first threshold voltage VH is set to 2.5V, and Second Threshold voltage VL is set to 0.5V.Or first threshold voltage VH is set to 2.8V, Second Threshold voltage VL is set to 0.2V.
Referring again to Fig. 2, control processing module 215 and comprise DLC (digital logic circuit) 211, processor system 212, display module 213 and load module 214.In the present embodiment, DLC (digital logic circuit) 211 and processor system 212 are realized by FPGA device.
DLC (digital logic circuit) 211 is for control capacitance measuring process, according to the first measuring control signal 505, the second measuring control signal 506 and the 3rd measuring control signal 507, control the break-make of charge switch 202 and discharge switch 204, for measured capacitance 208 discharges and recharges, and according to these measuring control signals, control the magnitude of voltage that A/D modular converter 209 obtains measured capacitance 208, send to DLC (digital logic circuit) 211 after converting digital voltage signal to.In DLC (digital logic circuit) 211, also there is charging timer, for measuring the duration of charging Δ t of measured capacitance 208.
The size of current that processor system 212 is inputted by load module 214 according to user, sets the size of the electric current I c of charging constant current source 201, and controls the suitable electric current I c of charging constant current source 201 output by DLC (digital logic circuit) 211.The size of the electric capacity that user can measure is as required selected suitable charging current Ic.As other embodiment, processor system 212 also can be realized and automatically be selected optimum measurement range by programming, for example can be by the method for measured value and the comparison of range bound is selected to best range.And processor system 212 obtains duration of charging and digital voltage value from DLC (digital logic circuit) 211, and according to the capacitance of these calculation of parameter measured capacitance 208.
According to formula C=Ic Δ t/ Δ V,
Wherein, Ic is the current value of charging constant current source 201 outputs.
Δ t is the duration of charging that DLC (digital logic circuit) 211 measures.
Δ V is the magnitude of voltage that A/D modular converter 209 measures.
In the present invention, in the charging timer of DLC (digital logic circuit) 211, set two charging termination conditions: maximum charge time and first threshold voltage VH.When reaching charging termination condition, charging timer finishes timing, and controls the voltage that A/D modular converter 209 is measured now.Method by above obtains duration of charging Δ t and the magnitude of voltage Δ V in formula, thereby calculates the capacitance of measured capacitance 208.
Introduce in detail capacitance measurement process below:
With reference to Fig. 6, after user's start-up capacitance measurement function,
1, first enter discharge process D, DLC (digital logic circuit) 211 is controlled charge switch 202 and is disconnected, discharge switch 204 closures, electric discharge constant current source 203 is measured capacitance 208 electric discharges by the second bleeder circuit 206 and discharge switch 204, the voltage drop at measured capacitance 208 two ends;
2, in discharge process D, the voltage that second voltage comparer 502 in double-limit comparator 210 detects measured capacitance 208 is during lower than Second Threshold voltage VL, by its output terminal 0utput2, export the second measuring control signal 506 to DLC (digital logic circuit) 211, DLC (digital logic circuit) 211 enters preliminary filling process PC according to the second measuring control signal 506 control capacitance measurements.Because the action of detection action, charge switch 202 and the discharge switch 204 of double-limit comparator 210 exists time delay, and the voltage of measured capacitance 208 between time delay can decline a lot, so need to carry out preliminary filling.Enter after preliminary filling process PC, DLC (digital logic circuit) 211 is controlled charge switch 202 closures, and discharge switch 204 disconnects, and charging constant current source 201 is measured capacitance 208 chargings by charge switch 202 and the first bleeder circuit 205, and the voltage of measured capacitance 208 rises.
3, in preliminary filling process PC, the voltage that second voltage comparer 502 in double-limit comparator 210 detects measured capacitance 208 is during higher than Second Threshold voltage, by its output terminal Output2 output the 3rd measuring control signal 507, give DLC (digital logic circuit) 211, DLC (digital logic circuit) 211 enters keep-process H according to the 3rd measuring control signal 507 control capacitance measurements, mathematical logic circuit 211 controls charge switch 202 and discharge switch 204 disconnects, the voltage of measured capacitance 208 remains unchanged, now DLC (digital logic circuit) 211 is controlled the voltage that A/D modular converter 209 is measured measured capacitance 208, obtain initial voltage V1.
4, after A/D modular converter 209 is measured, DLC (digital logic circuit) 211 control capacitance measurements enter charging process C, DLC (digital logic circuit) 211 is controlled charge switch 202 closures, discharge switch 204 disconnects, charging constant current source 201 is measured capacitance 208 chargings by charge switch 202 and the first bleeder circuit 205, the voltage of measured capacitance 208 rises, the charging timer zero clearings that DLC (digital logic circuit) 211 is controlled wherein simultaneously, and while starting chargometer.
If the voltage of 5 measured capacitance 208 reached maximum charge before the time in the duration of charging of charging timer, the voltage that double-limit comparator 210 detects measured capacitance 208 surpasses first threshold voltage VH, export the first measuring control signal 505, DLC (digital logic circuit) 211 enters hold mode according to the first measuring control signal 505 control capacitance measurements, control charge switch 202 and discharge switch 204 disconnections, and control charging timer stops timing, record duration of charging Δ t, control the final voltage V2 that A/D modular converter 209 is measured measured capacitance 208 simultaneously.
Now, complete a measuring period, processor system 212 reads charging starting potential V1, end of charge voltage V2 and duration of charging Δ t from DLC (digital logic circuit) 211, and according to the capacitance size of formula C=Ic Δ t/ Δ V calculating measured capacitance 208, wherein Ic is the current value of charging constant current source 201 outputs, Δ V=V2-V1.
5 ', referring to Fig. 7, if the voltage of measured capacitance 208 reaches maximum charge during the time in the duration of charging of charging timer, do not rise to first threshold voltage VH, DLC (digital logic circuit) 211 control capacitance measurements enter hold mode H, control charge switch 202 and discharge switch 204 disconnections, and control charging timer and stop timing, control the final voltage V2 ' that A/D modular converter 209 is measured measured capacitance 208 simultaneously.
Now, complete a measuring period, processor system 212 reads charging starting potential V1, end of charge voltage V2 ' and duration of charging Δ t ' (maximum charge time) from DLC (digital logic circuit) 211, and according to the capacitance size of formula C=Ic Δ t '/Δ V calculating measured capacitance 208, wherein Ic is the current value of charging constant current source 201 outputs, Δ V=V2 '-V1.
As further instruction, the double-limit comparator 210 in the present embodiment also can adopt window comparator to realize; If A/D converter speed is enough fast, also can realize by digital logic devices such as FPGA, CPLD.
As further instruction, the circuit that the first bleeder circuit 205 in the present embodiment and the second bleeder circuit 206 also can adopt conventional, electric-resistance, PTC resistance etc. to have minute compression functions is realized.
Digital multimeter tool described in the present embodiment has the following advantages:
1,, in the situation that setting same charging current, the multimeter described in the present embodiment has wider capacitive measurement scales;
2, before carrying out charging process, first measured capacitance is carried out to precharge, solved due to device reaction time delay, the problem of electric capacity overdischarge;
3, adopt constant current source to discharge, the velocity of discharge is faster, can further shorten measuring period.
Above embodiment is to illustrate the invention and not to limit the present invention, and any not creative creation that persons skilled in the art are done according to above-mentioned design philosophy, all should be considered as within the protection domain of this patent.

Claims (5)

1. a measurement mechanism with capacitance measurement function, comprises a charging module, a discharge module, and an A/D modular converter and a control processing module,
Described charging module, for controlling under the control of processing module, is measured capacitance charging;
Described discharge module, for controlling under the control of processing module, is measured capacitance electric discharge;
Described A/D modular converter, for controlling under the control of processing module, measures the voltage in measured capacitance;
Described control processing module, for measuring the duration of charging of measured capacitance,
It is characterized in that:
Also comprise first voltage comparator, the first described voltage comparator higher than a first threshold voltage-sensitive, produces first measuring control signal to the voltage of measured capacitance;
Described control processing module is responsive to the first described measuring control signal, makes described charging module stop, for measured capacitance charging, making described A/D modular converter measure the voltage in measured capacitance,
Described first threshold voltage is less than or equal to the maximum input rated voltage of described A/D modular converter, also comprises a second voltage comparer,
Described second voltage comparer lower than a Second Threshold voltage-sensitive, produces second measuring control signal to the voltage in measured capacitance; Voltage in measured capacitance, higher than described Second Threshold voltage-sensitive, is produced to the 3rd measuring control signal;
Described control processing module is responsive to the second described measuring control signal, and described discharge module is stopped as measured capacitance electric discharge, and making described charging module is measured capacitance charging;
Described control processing module is also responsive to the 3rd described measuring control signal, first make described charging module first stop as measured capacitance charging, make described A/D modular converter measure the voltage in measured capacitance, and then the charging module described in making is measured capacitance charging, and start to measure the duration of charging simultaneously
Described Second Threshold voltage is more than or equal to the minimum input rated voltage of described A/D modular converter.
2. measurement mechanism according to claim 1, it is characterized in that: also there is a maximum charge time, described control processing module reaches described maximum charge time-sensitive to the described duration of charging, make described charging module stop, for measured capacitance charging, making described A/D modular converter measure the voltage in measured capacitance.
3. measurement mechanism according to claim 2; it is characterized in that: between measured capacitance and described charging module, be in series with first bleeder circuit; be used to described charging module that overvoltage protection is provided; between measured capacitance and described discharge module, be in series with second bleeder circuit, be used to described discharge module that overvoltage protection is provided.
4. measurement mechanism according to claim 1; it is characterized in that: between measured capacitance and described charging module, be in series with first bleeder circuit; be used to described charging module that overvoltage protection is provided; between measured capacitance and described discharge module, be in series with second bleeder circuit, be used to described discharge module that overvoltage protection is provided.
5. measurement mechanism according to claim 3, is characterized in that: the first described voltage comparator, second voltage comparer and described control processing module realize by FPGA device.
CN201010534901.0A 2010-11-03 2010-11-03 Measurement device with function of measuring capacitance CN102072989B (en)

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