CN102044416B - Front-end manufacturing process of semiconductor device - Google Patents
Front-end manufacturing process of semiconductor device Download PDFInfo
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- CN102044416B CN102044416B CN2009101971308A CN200910197130A CN102044416B CN 102044416 B CN102044416 B CN 102044416B CN 2009101971308 A CN2009101971308 A CN 2009101971308A CN 200910197130 A CN200910197130 A CN 200910197130A CN 102044416 B CN102044416 B CN 102044416B
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- silicon chip
- protective layer
- back side
- wafer
- silicon
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Abstract
The invention provides a front-end manufacturing process of a semiconductor device, comprising the following steps: cleaning and dehydrating the surface of a silicon chip; forming a protective layer on the back side of the silicon chip; forming a device at the front side of the silicon chip; and annealing the silicon chip. Compared with the prior art, the invention has the following advantages: the protective layer is formed on the back side of the silicon chip, thereby preventing impurities from diffusing into the silicon chip because no protective layer is formed on the back side of the silicon chip, and preventing the problem that the quality of a wafer is affected due to current leakage and the like of the wafer resulted from loss of silicon atoms from the silicon chip during precleaning. The invention further ensures that the silicon chip is covered by the protective layer during precleaning, and unflatness of the silicon chip due to cleaning can not be caused and influence the focusing of the wafer by the photoetching equipment in the following process.
Description
Technical field
The present invention relates to integrated circuit and make the field.
Background technology
In recent years, because the microcircuit of chip is made towards the high integration development, therefore, the direction that lithographic equipment also must satisfy the requirement of crucial sub-micron or even the following resolution of 65 nanometers develops.Present stage lithographic equipment developed into the 6th generation the immersion type photolithography machine; The process that its characteristics of being different from over the dry lithography maximum are exactly whole photoetching is not to occur in the air; But be immersed in the bigger transparency liquid of a kind of light refractive index, thereby be allowed to condition at better imprinting transistor on the wafer.In the production process, whole wafer is to be immersed in the ultra-pure water (free from admixture, no charged ion), and this situation is equivalent to the resolution of photoetching has been improved 1.44 times, just in time satisfies the process modification amplitude of 65/45=1.44.The sram chip of producing with this technological design can obtain about 15% performance boost.But along with the more and more advanced person of photoetching machine technique, the expense of required purchase of equipment is also more and more expensive, so present integrated circuit fields can only adopt multiple tracks front-end and back-end operation on same equipment, to produce.If the mutual pollution that will cause multiple working procedure to bring thus is so before needing the wafer of photoetching to be put in the front end operation in the operation of rear end, need use hydrofluoric acid HF and nitric acid HNO with the silicon chip back side
3The mixing cleaning fluid clean.
But when same wafer technological design was need be by the photoetching number of times a lot, the silicon chip back side was cleaned many times equally, can cause the silicon chip back side uneven.Silicon chip back side unevenness causes when carrying out photoetching, and wafer can't the placement level and make to form when lithographic equipment is sought wafer frontside and defocus and can't photoetching.Further, repeatedly the cleaning silicon chip back side also can cause silicon chip silicon to run off, and causes leakage current generating etc. to influence the problem of chip quality.
Summary of the invention
The problem that the present invention solves is that the silicon chip back side is cleaned many times equally, can cause silicon chip back side unevenness when same wafer technological design is need be by the photoetching number of times a lot.Silicon chip back side unevenness causes when carrying out photoetching, and wafer can't the placement level and make to form when lithographic equipment is sought wafer frontside and defocus and can't photoetching.Further, repeatedly the cleaning silicon chip back side also can cause silicon chip silicon to run off, and causes leakage current generating etc. to influence the problem of chip quality.
For realizing above-mentioned purpose, the present invention adopts following technical scheme, and a kind of front end fabrication process of semiconductor device comprises: silicon chip surface cleans, dewaters; Form protective layer at the silicon chip back side; At the positive device that forms of silicon chip; Silicon chip is annealed.
The mode of on the silicon chip back side, injecting through ion forms protective layer.Optional, it is a kind of of nitrogen, oxygen or carbon that ion injects material.
Optional, the thickness that said protective layer forms at 500 dusts to 1500 dusts.
Optional, said annealing is meant adopts the rapid thermal annealing method, and the target temperature of said short annealing is 900～1100 degrees centigrade.
Compared with prior art; The present invention has the following advantages: through form protective layer at the silicon chip back side; Avoided because silicon chip back side unprotect layer causes diffusion of impurities to get into silicon chip, in the time of can preventing prerinse equally in the silicon chip silicon atom run off and the wafer leakage current that causes etc. influences the problem generation of wafer quality.The covering of silicon chip matcoveredn when further guaranteeing prerinse can not cause silicon chip uneven because of the silicon chip that cleaning causes, and influences the focusing for wafer of subsequent technique lithographic equipment.
Description of drawings
Figure 1A to 1C is a front end fabrication process structural representation of the present invention;
Fig. 2 is the flow chart of front end fabrication process of the present invention.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the present invention is remake further detailed explanation.
The front-end process method flow diagram that Fig. 2 provides for the embodiment of the invention, as shown in Figure 2, its concrete steps are following: the S201 silicon chip surface cleans, dewaters; S202 forms protective layer at the silicon chip back side; S203 is at the positive device that forms of silicon chip; Step 204: silicon chip is annealed.
S201, silicon chip surface clean, dewater;
Silicon chip is provided, and as shown in Figure 1 through the washed with de-ionized water silicon chip surface, silicon chip 1 lies on the plummer 2, and the positive nozzle flow of silicon chip goes out the deionized water cleaning silicon chip, simultaneously plummer rotation silicon chip and dehydration.
S202 forms protective layer at the silicon chip back side;
The silicon chip back level upwards is placed on the ion implantor, injects ion and form protective layer 3.It is a kind of of nitrogen, oxygen or carbon that ion injects material, will form silicon nitride, silica or carborundum in silicon chip back respectively according to injection material afterwards.Inject energy and can be 5～12 kilo electron volts, dosage is every square centimeter last 1 * 10
13～1 * 10
14Individual atom.The contrast table of the protective layer that nitrogen as shown in table 1, oxygen or carbon and polysilicon form thickness of removing when using polysilicon as bottom separately (unit of removal thickness as dust/minute):
| Nitric acid and hydrofluoric acid proportioning | Polysilicon is removed thickness | Silicon nitride is removed thickness | Silica is removed thickness | Carborundum is removed thickness |
| 50∶1 | 18000 | 19.1 | Do not react | Do not react |
| 80∶1 | 12000 | 12.9 | Do not react | Do not react |
| 170∶1 | 4263 | 6.5 | Do not react | Do not react |
Can find out because the alloy of above-mentioned 3 kinds of atoms and silicon atom formation for hydrofluoric acid HF and nitric acid HNO
3The chemical reaction minimum that risen of mixing cleaning fluid be cleaned promptly that to remove thickness more much smaller than the polysilicon of silicon chip.It is as protective layer material that the present invention is preferably nitrogen-atoms.
S203 is at the positive device that forms of silicon chip.
After protective layer formation finishes, can form device 4, comprise the steps: that shallow trench isolation leaves and trap formation, I/O and the formation of process nuclear grid, the injection of lightly doped drain ion and the injection of source leakage ion in the silicon chip front.
Step 204: silicon chip is annealed.
Ion injection meeting goes out atomic collision lattice structure and damages the silicon chip lattice.If the dosage that injects is very big, implanted layer will be become amorphous.In addition, be injected into ion and do not occupy the lattice-site of silicon basically, but rest on the interstitial void position.These interstitial impurities have only the process high-temperature annealing process just can be activated.Annealing can be heated and is injected into silicon chip, repairs lattice defect; Can also make foreign atom move to lattice-site, with its activation.Repairing lattice defect approximately needs 500 degrees centigrade, and the activator impurity atom needs about 950 degrees centigrade.The activation of impurity is relevant with time and temperature: the time is long more, and temperature is high more, and the activation of impurity approximately fully.The annealing of silicon chip has two kinds of basic skills: high temperature furnace annealing and rapid thermal annealing (RTA).The preferred rapid thermal annealing of the present invention after the annealing, after the nitrogen-atoms that the present invention adopts is activated, forms silicon nitride with polysilicon in the silicon chip, form thickness at 500 dusts to 1500 dusts.The target temperature of short annealing is 900～1100 degrees centigrade.
Owing to formed layer protective layer, make that directly cleaning silicon chip is not surperficial when cleaning, and can stop effectively that impurity gets into silicon chip at the silicon chip back side.Further, can avoid to produce in the problem that gets into that mask aligner is aimed at and occur defocusing during exposure because clean uneven the making of the silicon chip surface cause.
Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art are not breaking away from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.
Claims (4)
1. the front end fabrication process of a semiconductor device is characterized in that, comprising: silicon chip is provided;
Silicon chip surface cleans, dewaters;
Mode at the silicon chip back side through ion injection and subsequent heat treatment forms protective layer, and it is a kind of of nitrogen, oxygen or carbon that said ion injects material;
At the positive device that forms of silicon chip;
Silicon chip is annealed.
2. technology according to claim 1 is characterized in that, the thickness of said protective layer at 500 dusts to 1500 dusts.
3. technology according to claim 1 is characterized in that, said subsequent heat treatment is meant the rapid thermal annealing method that adopts.
4. technology according to claim 3 is characterized in that, the target temperature of said short annealing is 900～1100 degrees centigrade.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101971308A CN102044416B (en) | 2009-10-13 | 2009-10-13 | Front-end manufacturing process of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101971308A CN102044416B (en) | 2009-10-13 | 2009-10-13 | Front-end manufacturing process of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102044416A CN102044416A (en) | 2011-05-04 |
| CN102044416B true CN102044416B (en) | 2012-06-20 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009101971308A Expired - Fee Related CN102044416B (en) | 2009-10-13 | 2009-10-13 | Front-end manufacturing process of semiconductor device |
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| CN (1) | CN102044416B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108615669A (en) * | 2016-12-12 | 2018-10-02 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
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2009
- 2009-10-13 CN CN2009101971308A patent/CN102044416B/en not_active Expired - Fee Related
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