CN102043274B - 主动式液晶面板 - Google Patents
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- 239000010409 thin film Substances 0.000 claims description 16
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
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- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
- G09G2320/0214—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display with crosstalk due to leakage current of pixel switch in active matrix panels
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Abstract
本发明公开一种主动式液晶面板包含一像素矩阵、一栅极驱动电路、一数据驱动电路及一模拟缓冲器。该栅极驱动电路用以驱动M条第一栅极线,其中M为正整数。该模拟缓冲器耦接于该栅极驱动电路,包含M个缓冲电路及一稳压电路,其中每一缓冲电路根据该M条第一栅极线中相对应的一第一栅极线的输出信号,驱动相对应的一第二栅极线,且该稳压电路用以维持供应至该M个缓冲电路的至少一参考电压。
Description
技术领域
本发明涉及一种主动式液晶面板,尤指一种保持栅极驱动电路输出端的节点电位的主动式液晶面板。
背景技术
请参照图1,图1为现有技术说明主动式液晶面板100的示意图。一般以低温多晶硅(low temperature poly-silicon,LTPS)工艺制造的主动式液晶面板100,包含M条栅极线(scan line)G1-Gm、N条数据线(data line)D1-Dn、像素矩阵102、栅极驱动电路104与数据驱动电路106,其中栅极驱动电路104的输出端配置模拟缓冲器(analog buffer)b1-bm,以提升驱动能力,并由系统提供模拟缓冲器b1-bm所需的最高电位VGH与最低电位VGL。但将主动式液晶面板100断电并静置一段时间之后,主动式液晶面板100内的残存电荷会逐渐被释放,因此在模拟缓冲器b1-bm和栅极驱动电路104的输出端之间会因为漏电流而形成许多电位不明确的节点P。由于这些电位不明确的节点的电位未被定义,因此当主动式液晶面板100再次被启动(power-on)时,模拟缓冲器b1-bm内的最高电位VGH与最低电位VGL之间的电位差不足,造成主动式液晶面板100显示的画面异常。
发明内容
本发明的一实施例提供一种主动式液晶面板。该主动式液晶面板包含一像素矩阵、一栅极驱动电路、一数据驱动电路及一模拟缓冲器。该像素矩阵具有多个像素;该栅极驱动电路用以驱动M条第一栅极线(scan line),其中M为正整数;该数据驱动电路用以将一显示数据转换成多个数据电压及驱动N条数据线(data line),其中每一数据线的输出信号用以根据该多个数据电压中的一数据电压,将对应于该数据线的像素充放电到一特定电压;及该模拟缓冲器,耦接于该栅极驱动电路,包含M个缓冲电路及一稳压电路,其中每一缓冲电路根据相对应的该第一栅极线的输出信号,驱动相对应的该第二栅极线,且该第二栅极线的输出信号用以控制耦接于一像素的开关的开启与关闭,其中该稳压电路用以维持供应至该M个缓冲电路的至少一参考电压。
本发明提供的一种主动式液晶面板,通过一稳压电路将一第一电压、一第二电压和一第一参考电压、一第二参考电压耦接。因此,当该第一电压与该第二电压之间发生漏电流而使得该第一电压与该第二电压之间的电位差缩小时,可以将该第一电压、该第二电压维持在该第一参考电压、该第二参考电压。所以,本发明可避免因该第一电压和该第二电压之间的电位差未达准位,所造成的主动式液晶面板异常显示画面。
附图说明
图1为现有技术说明主动式液晶面板的示意图;
图2为本发明的一实施例说明主动式液晶面板的示意图;
图3为缓冲电路的示意图;
图4A、图4B、图4C和图4D为说明第一二极管的实施方式的示意图;
图5A、图5B、图5C和图5D为说明第二二极管的实施方式的示意图。
其中,附图标记
100、200主动式液晶面板 102、202像素矩阵
104、204栅极驱动电路 106、206数据驱动电路
208模拟缓冲器 2082稳压电路
20822第一二极管 20824第二二极管
2022像素 G1-Gm栅极线
b1-bm、bi缓冲电路 F1-Fm、Fi第一栅极线
S1-Sm、Si第二栅极线 biP P型薄膜晶体管
biN N型薄膜晶体管 D1-Dn数据线
VGH第一电压 VGL第二电压
Vref第一参考电压 -Vref第二参考电压
Vcom液晶面板共同电压
具体实施方式
请参照图2,图2为本发明的一实施例说明主动式液晶面板200的示意图。主动式液晶面板200包含像素矩阵202、栅极驱动电路204、数据驱动电路206及模拟缓冲器208。像素矩阵202包含多个像素2022;栅极驱动电路204用以驱动M条第一栅极线(scan line)F1-Fm,其中M为正整数;数据驱动电路206用以将一显示数据转换成多个数据电压及驱动N条数据线(data line)D1-Dn,其中每一数据线的输出信号用以根据多个数据电压中的一数据电压,将对应于数据线的像素充放电到特定电压;模拟缓冲器208耦接于栅极驱动电路204,包含M个缓冲电路b1-bm及稳压电路2082。缓冲电路bi根据相对应的第一栅极线Fi的输出信号,驱动相对应的第二栅极线Si,且第二栅极线Si的输出信号用以控制耦接于像素2022的开关的开启与关闭,其中1≤i≤M,且i为正整数。另外,稳压电路2082用以维持供应至M个缓冲电路b1-bm的第一电压VGH和第二电压VGL。
请参照图3,图3为缓冲电路bi的示意图。缓冲电路bi具有第一端耦接于相对应的第一栅极线Fi,第二端耦接于相对应的第二栅极线Si,第三端用以接收第一电压VGH,及第四端用以接收第二电压VGL。缓冲电路bi包含P型薄膜晶体管biP和N型薄膜晶体管biN。P型薄膜晶体管biP具有第一端,耦接于缓冲电路bi的第三端,第二端耦接于缓冲电路bi的第一端,及第三端耦接于缓冲电路bi的第二端;N型薄膜晶体管biN具有第一端,耦接于缓冲电路bi的第二端,第二端耦接于缓冲电路bi的第一端,及第三端耦接于缓冲电路bi的第四端。
稳压电路2082包含第一二极管20822及第二二极管20824。第一二极管20822具有阳极端,用以接收第一参考电压Vref,阴极端耦接于缓冲电路bi的第三端;第二二极管20824具有阴极端,用以接收第二参考电压-Vref,阳极端耦接于缓冲电路bi的第四端。稳压电路2082整合于主动式液晶面板200的低温多晶硅工艺(LTPS)中,稳压电路2082的稳压过程如下:
当主动式液晶面板200正常操作时,第一电压VGH大于第一参考电压Vref以及第二电压VGL小于第二参考电压-Vref,且第一二极管20822和第二二极管20824为断路。
当第一电压VGH低于第一参考电压Vref时,第一二极管20822导通并将第一电压VGH维持在第一参考电压Vref附近。当第二电压VGL高于第二参考电压-Vref时,第二二极体二极管20824导通并将第二电压VGL维持在第二参考电压-Vref附近。
另外,第一参考电压Vref和第二参考电压-Vref的范围由式(1)、式(2)决定:
地端电压≤第一参考电压Vref≤第一电压VGH(1)
第二电压VGL≤第二参考电压-Vref≤地端电压 (2)
请参照图4A、图4B、图4C和图4D,图4A、图4B、图4C和图4D为说明第一二极管20822的实施方式的示意图。如图4A所示,第一二极管20822为N型薄膜晶体管的栅极和漏极耦接的二极管;如图4B所示,第一二极管20822为P型薄膜晶体管的栅极和漏极耦接的二极管;如图4C所示,栅漏极耦接的N型薄膜晶体管耦接于栅漏极耦接的P型薄膜晶体管以实现第一二极管20822;如图4D所示,第一二极管20822为PN结(PN junction)。
请参照图5A、图5B、图5C和、图5D,图5A、图5B、图5C和图5D为说明第二二极管20824的实施方式的示意图。如图5A所示,第二二极管20824为N型薄膜晶体管的栅极和漏极耦接的二极管;如图5B所示,第二二极管20824为P型薄膜晶体管的栅极和漏极耦接的二极管;如图5C所示,栅漏极耦接的N型薄膜晶体管耦接于栅漏极耦接的P型薄膜晶体管以实现第二二极管20824;如图5D所示,第二二极管20824为PN结(PNjunction)。
综上所述,本发明提供的主动式液晶面板,通过稳压电路将第一电压、第二电压和第一参考电压、第二参考电压耦接。因此,当第一电压与第二电压之间发生漏电流而使得第一电压和第二电压之间的电位差缩小时,可以将第一电压、第二电压维持在第一参考电压、第二参考电压。所以,本发明可避免因第一电压和第二电压之间的电位差未达准位,所造成的主动式液晶面板显示的画面异常。
当然,本发明还可有其它多种实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员当可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。
Claims (3)
1.一种主动式液晶面板,其特征在于,包含:
一像素矩阵,包含多个像素;
一栅极驱动电路,用以驱动M条第一栅极线,其中M为正整数;
一数据驱动电路,用以将一显示数据转换成多个数据电压及驱动N条数据线,其中每一数据线的输出信号用以根据该多个数据电压中的一数据电压,将对应于该数据线的像素充放电到一特定电压;及
一模拟缓冲器,耦接于该栅极驱动电路,包含M个缓冲电路及一稳压电路,其中每一缓冲电路根据相对应的一第一栅极线的输出信号,驱动相对应的一第二栅极线,且该第二栅极线的输出信号用以控制耦接于一像素的开关的开启与关闭;该每一缓冲电路具有一第一端,耦接于相对应的该第一栅极线,一第二端,耦接于相对应的该第二栅极线,一第三端,用以接收一第一电压,及一第四端,用以接收一第二电压;
其中该稳压电路用以维持供应至该M个缓冲电路的至少一参考电压;该稳压电路包含:一第一二极管,具有一阳极端,用以接收一第一参考电压,一阴极端,耦接于该每一缓冲电路的第三端;及一第二二极管,具有一阴极端,用以接收一第二参考电压,一阳极端,耦接于该每一缓冲电路的第四端;
该第一电压小于该第一参考电压时,该第一二极管导通。该第二电压大于该第二参考电压时,该第二二极管导通;从而当第一电压与第二电压之间发生漏电流而使得第一电压和第二电压之间的电位差缩小时,将第一电压,第二电压维持在第一参考电压和第二参考电压。
2.根据权利要求1所述的主动式液晶面板,其特征在于,该每一缓冲电路包含:
一P型薄膜晶体管,具有一第一端,耦接于该缓冲电路的第三端,一第二端,耦接于该缓冲电路的第一端,及一第三端,耦接于该缓冲电路的第二端;及
一N型薄膜晶体管,具有一第一端,耦接于该缓冲电路的第二端,一第二端,耦接于该缓冲电路的第一端,及一第三端,耦接于该缓冲电路的第四端。
3.根据权利要求1所述的主动式液晶面板,其特征在于,该稳压电路整合于一低温多晶硅工艺。
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US8766899B2 (en) | 2014-07-01 |
TW201224582A (en) | 2012-06-16 |
CN102043274A (zh) | 2011-05-04 |
TWI418880B (zh) | 2013-12-11 |
US20120146962A1 (en) | 2012-06-14 |
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