CN102037548B - MOSFET with integrated field effect rectifier - Google Patents
MOSFET with integrated field effect rectifier Download PDFInfo
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- CN102037548B CN102037548B CN200980115255.XA CN200980115255A CN102037548B CN 102037548 B CN102037548 B CN 102037548B CN 200980115255 A CN200980115255 A CN 200980115255A CN 102037548 B CN102037548 B CN 102037548B
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- 230000005669 field effect Effects 0.000 title claims abstract description 16
- 238000005516 engineering process Methods 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 7
- 238000012546 transfer Methods 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 2
- 238000000407 epitaxy Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 239000000969 carrier Substances 0.000 abstract 1
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 239000002800 charge carrier Substances 0.000 description 7
- 238000002347 injection Methods 0.000 description 6
- 239000007924 injection Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 230000001939 inductive effect Effects 0.000 description 4
- 230000002441 reversible effect Effects 0.000 description 4
- 210000003127 knee Anatomy 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 241000478345 Afer Species 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000001172 regenerating effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7804—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
- H01L29/7805—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode in antiparallel, e.g. freewheel diode
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
A modified MOSFET structure comprises an integrated field effect rectifier connected between the source and drain of the MOSFET to shunt current during switching of the MOSFET. The integrated FER provides faster switching of the MOSFET due to the absence of injected carriers during switching while also decreasing the level of EMI relative to discrete solutions. The integrated structure of the MOSFET and FER can be fabricated using N-, multi-epitaxial and supertrench technologies, including 0.25[mu]m technology. Self-aligned processing can be used.
Description
related application
The present invention relates to and ask the priority of following patent application: the title of submitting on September 25th, 2008 is " Adjustable Field Effect Rectifier " (attached is annex A), sequence number is 12/238, 308 U.S. Patent application, and the sequence number of submitting on September 26th, 2007 by it is 60/975, 467 U.S. Provisional Patent Application, and the title that on January 23rd, 2009 submits to is " Regenerative Building Block and Diode BridgeRectifier ", sequence number is 12/359, 094 U.S. Patent application, and the sequence number of submitting on January 23rd, 2008 by it is 61/022, 968 U.S. Provisional Patent Application, and the title that on April 28th, 2008 submits to is " MOSFET with Integrated Field EffectRectifier ", sequence number is 61/048, 336 U.S. Provisional Patent Application, the inventor of all these patent applications is identical with present inventor, and for all objects are incorporated to herein by reference with its integral body.
Technical field
The present invention relates generally to semiconductor transistor, relates more specifically to field effect rectifier to be integrated in MOSFET structure to improve the performance of MOSFET, and for this method.
Background technology
MOSFET is generally used for the quick switching in electronic circuit.Yet, load be in inductive situation switch speed because the problem of body diode itself is restricted.When being used for MOSFET to be switched to OFF state from ON, (oppositely recovers) grid voltage, the necessary conduction current of pn junction diode of itself, and injected carrier is arrived in the body of device.Before the charge carrier injecting dissipates, MOSFET will stay at ON state.This causes the slow switching of MOSFET from ON to OFF state, and the frequency of restriction MOSFET work.
In order to overcome the slow switching of body diode, conventionally between the source electrode of MOSFET and drain electrode, add outside fly-wheel diode, to prevent the injection of charge carrier between reverse recovery.Yet, add external diode and may cause the EMI increasing, because flow through before the electric current of MOSFET, must flow through the lead-in wire of external diode and connection now.Extra EMI transmitting also can limit the switch speed of the MOSFET with fly-wheel diode.Although conventionally fly-wheel diode is placed as and approaches as far as possible MOSFET, the problem of extra EMI still exists.
Although PN junction diode technologies is integrated into and seems at first view good in MOSFET, this technology only has limited potentiality for improving body diode problem, because body diode is the PN junction diode with MOSFET structure one.Similarly, Schottky diode technology is in fact also incompatible with MOSFET technology, because it needs not to be applicable to well special metallization that MOSFET manufactures.
Summary of the invention
In order to overcome the restriction of prior art, the present invention is integrated into field effect rectifier (FER) in MOSFET, to improve the switching characteristic of MOSFET when being coupled to inductive load, thereby improves switch speed and there is no the remarkable adverse effect on EMI.
In this new design, FER does not substitute body diode, and is to provide shunt or the bypass that electric current is walked around body diode.FER technology and MOSFET technical compatibility, allow traditional handicraft substantially.Depend on enforcement, by for example regulating size and the resistivity of epitaxial loayer (epi), grid size etc., device of the present invention is both configurable for example, for high voltage operation (discrete high-power component), also configurable for low voltage operating (for example, at integrated circuit).In addition, be different from PN junction diode, low-voltage FER is majority carrier device, and prevents that body diode from injecting the minority carrier of the MOSFET work of slowing down.Due to special one-sided carrier injection mechanism (Rodov, Ankoudinov, Ghosh, Sol.St.Electronics 51 (2007) 714-718), high voltage FER will inject less charge carrier.
Accompanying drawing explanation
Figure 1A to Figure 1B illustrates the MOSFET that has integrated field effect rectifier according to of the present invention, and wherein Figure 1A illustrates DMOS structure and Figure 1B illustrates UMOS structure.Electric current between source electrode and drain electrode is controlled by gate electrode.Once grid voltage does not allow electric current to flow through MOSFET between transfer period, electric current will flow through FER.(optionally) control band provides the control to leakage current.
Fig. 2 illustrates conventional MOSFET (redness) and falls the graphic form with respect to electric current according to the forward voltage of the body diode of MOSFETR of the present invention (green).The in the situation that of VG=+5V, every MOSFET occupies the RDS in region, and ON is roughly the same.Navy blue curve is MOSFETR's and light blue curve is MOSFET.
Fig. 3 illustrates for conventional MOS FET (redness), and with (green) and without (blueness) according to the leakage current of the MOSFETR of control band of the present invention with respect to reverse voltage.Scale (1A=2.5e-7)
Fig. 4 illustrates according to the transition of 10A 20V MOSFETR of the present invention.
Embodiment
The present invention includes the Novel MOS FET structure (being below sometimes referred to as " MOSFETR ") of field effect rectifier integrated therein.Field effect rectifier when grid voltage turn-offs the electric current by MOSFET for electric current provides alternative path.Charge carrier can be reduced or eliminate completely from the injection of PN junction, produces faster MOSFET and switches and there is no a serious EMI.
First with reference to Figure 1A, in the 100 DMOS MOSFETR structures that totally illustrate, be included in the MOSFET 100A in left side and at the FER on right side 100B.In some embodiments, FER device can be adjustable, as what describe in the sequence number of submitting on September 26th, 2007 U.S. Provisional Patent Application that is 60/975,467, yet also can use the FER that there is no adjustable region in other embodiments.Shown in Fig. 1, MOSFTR 100 has three electrodes: source electrode 105, grid 110 and drain electrode 115.Main electric current flows between source electrode and drain electrode by extension N-layer 125.Provide P-trap 130 to produce depletion layer when applying reverse bias.N++ region 135 provides the ohmic contact of electric current.Control band comprises that window 140 and the P++ in FER grid injects 145.Control band allows to control electric current, therefore may expect in some embodiments, and this depends on enforcement.Gate oxide thickness and doping grade are controlled the height of the potential barrier 165 under FER grid, and therefore in some embodiments, the gate oxide 150 under FER grid can have the thickness different from gate oxide 155 under MOSFET grid.Grid voltage is controlled the conductivity of the narrow raceway groove 160 under the mos gate utmost point 110, and MOSFET is switched between OFF and ON state.Transformation from ON to OFF state occurs under threshold voltage, and threshold voltage can be by being used the dopant profiles under grid or regulating by changing the thickness of gate oxide 155.Gate oxide 155 thickness of MOSFET side and gate oxide 150 thickness of FER gate electrode side can change independently of each other, to guarantee that two elements all normally work.
For example, when MOSFETR 100 is when ON state (VGS=+5V), electric current flows through MOSFET raceway groove 160.Shown in Fig. 2, according to the forward characteristic of the execution mode of MOSFETR of the present invention, wherein this device can be worked when 20V under 10A.It will be appreciated by those skilled in the art that this MOSFETR has the RDS that equals 3.6 milliohms, ON.If the right side part of device is also MOSFET, the RDS simulating so, ON is 2.0 milliohms.Note, for the characteristic shown in Fig. 2, the area of MOSFET be approximately MOSFTR the gross area 50%.So the RDS of MOSFETR per unit area, ON is little by about 10%.This be because the part of epitaxial loayer under diode for conducting electricity at MOSFET duration of work.To understand, for some execution modes, this effect will increase for high voltage device more.RDS, the increase of ON is conventionally less for high voltage device, because epitaxial loayer becomes thicker in to bear higher reverse voltage.For some execution modes, can increase the region of MOSFET covering to reduce RDS, ON, and the FER area reducing is still effective for reducing stored charge.
Figure 1B illustrates with the UMOSMOSFTR structure with the essentially identical mode work shown in Figure 1A, and similar feature represents with similar Reference numeral, but highest significant position increases by 1.
When MOSFET is turned off (VGS=-5V), electric current will flow through the body diode of MOSFET under VF=0.76V, or under VF=0.58, flows through the FER of MOSFTR.In at least some execution modes, VF, by under the knee voltage (～0.7V) being preferably maintained at lower than body diode, starts injected carrier at this knee voltage PN junction.Therefore, conventional MOS FET by injected carrier, and has substantially eliminated this less desirable characteristic according to MOSFETR of the present invention between transfer period.
At OFF state, little leakage current will flow through AFER raceway groove 165.In at least some execution modes, the speed that this leakage is occurred by barrier height and pinchoff effect is controlled.The leakage that Fig. 3 has shown MOSFTR is about 500 μ A under 20V, and the leakage of this and MOSFET is similar.The control band of MOSFETR works leakage is kept in control, and the leakage without the MOSFETR of control band is approximately that twice is so much, or 1 μ A.Under higher voltage, the effect of control band may decline.
Fig. 3 is illustrated in the charge carrier that does not have injection between the transfer period with inductive load.For the example of Fig. 3, VGS is set to 5V, and this turn-offs the electric current by MOSFET raceway groove.For the forward current of 10A, the electron density distribution in the MOSFETR substantially electron density distribution when there is no electric current is identical, has therefore confirmed not have carrier density modulation to occur.Can see that the electron concentration of centre of extension N-layer is greatly in the magnitude of 2.9e6.On the contrary, the work of conventional MOS FET demonstrates the remarkable injection under 10A electric current: electron concentration becomes 5.1e16, almost double in other words.Significantly the slowed down work of the conventional MOS FET with inductive load of the charge carrier of these injections.
Fig. 4 illustrates the transient response of the simulation of the MOSFET that has the MOSFET of integrated diode and there is no integrated diode.Much smaller for MOSFETR transition time and stored charge.The low stored charge of MOSFETR and little dI/dt have shown that device of the present invention is very suitable for quick switch application.
Generally speaking, the static characteristic of MOSFETR is very similar to the static characteristic of conventional MOSFET, and because the charge carrier that does not have between transfer period to inject shows faster, switches simultaneously.Integrated FER diode structure is more preferred with respect to discrete solution, because it will reduce the degree of EMI and allow switching more fast under low EMI.
Although described embodiments of the present invention based on N-epitaxial loayer, it will be appreciated by those skilled in the art that and can use multilayer epitaxial or super groove (supertrench) method to form equivalent structure, and be intended that especially and the present invention includes such substituting.Similarly, by understanding this structure, be conventionally integrated in larger circuit, and can use the standard method of the 0.25 μ m technology that for example comprises the mask alignment precision with about 20nm to manufacture, also can use additive method.
Describe the present invention in detail, comprised various substituting and equivalent.Therefore by understanding the present invention, should not be limited to specifically described execution mode in literary composition, and only be defined by the following claims.
Claims (9)
1. a mos field effect transistor MOSFET structure, has grid, source electrode and drain electrode, and wherein between described source electrode and described drain electrode, mobile electric current is by the voltage control that is applied to described grid, and this MOSFET structure comprises:
Field effect rectifier, it is connected between described source electrode and described drain electrode, and for pass through its shunt current between the transfer period of MOSFET, described field effect rectifier comprises second grid and second grid oxide,
The described second grid oxide of the first grid oxide of wherein said MOSFET and described field effect rectifier has different-thickness.
2. according to the MOSFET structure of claim 1, wherein MOSFET is DMOS structure.
3. according to the MOSFET structure of claim 1, wherein MOSFET is UMOS structure.
4. according to the MOSFET structure of claim 1, wherein said MOSFET structure is to use self-registered technology to form.
5. according to the MOSFET structure of claim 1, wherein said MOSFET structure is to use the technique that is not more than 0.25 μ m to form.
6. according to the MOSFET structure of claim 1, wherein said MOSFET structure is to use N-epitaxy technique to form.
7. according to the MOSFET structure of claim 1, wherein said MOSFET structure is to use multilayer epitaxial technique to form.
8. according to the MOSFET structure of claim 1, wherein said MOSFET structure is to use super trench process to form.
9. an integrated semiconductor structure, comprising: MOSFET, and it has grid, source electrode and drain electrode; And field effect rectifier, it is formed in the substrate identical with described MOSFET, and is connected between the source electrode and drain electrode of described MOSFET, for conduction current between the transfer period of described MOSFET, described field effect rectifier comprises second grid and second grid oxide
The described second grid oxide of the first grid oxide of wherein said MOSFET and described field effect rectifier has different-thickness.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US4833608P | 2008-04-28 | 2008-04-28 | |
| US61/048,336 | 2008-04-28 | ||
| PCT/US2009/041996 WO2009134812A1 (en) | 2008-04-28 | 2009-04-28 | Mosfet with integrated field effect rectifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102037548A CN102037548A (en) | 2011-04-27 |
| CN102037548B true CN102037548B (en) | 2014-04-23 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN200980115255.XA Expired - Fee Related CN102037548B (en) | 2008-04-28 | 2009-04-28 | MOSFET with integrated field effect rectifier |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP2274770A4 (en) |
| CN (1) | CN102037548B (en) |
| WO (1) | WO2009134812A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9018048B2 (en) * | 2012-09-27 | 2015-04-28 | Stmicroelectronics S.R.L. | Process for manufactuirng super-barrier rectifiers |
| FR3012699A1 (en) * | 2013-10-31 | 2015-05-01 | St Microelectronics Tours Sas | CONTROL CIRCUIT FOR DIODES IN HALF-BRIDGE |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3156300B2 (en) * | 1991-10-07 | 2001-04-16 | 株式会社デンソー | Vertical semiconductor device |
| US5559355A (en) * | 1994-03-04 | 1996-09-24 | Fuji Electric Co., Ltd. | Vertical MOS semiconductor device |
| US5818084A (en) | 1996-05-15 | 1998-10-06 | Siliconix Incorporated | Pseudo-Schottky diode |
| US5744994A (en) * | 1996-05-15 | 1998-04-28 | Siliconix Incorporated | Three-terminal power mosfet switch for use as synchronous rectifier or voltage clamp |
| US6281547B1 (en) * | 1997-05-08 | 2001-08-28 | Megamos Corporation | Power transistor cells provided with reliable trenched source contacts connected to narrower source manufactured without a source mask |
| DE19743342C2 (en) * | 1997-09-30 | 2002-02-28 | Infineon Technologies Ag | Field packing transistor with high packing density and method for its production |
| US6100145A (en) * | 1998-11-05 | 2000-08-08 | Advanced Micro Devices, Inc. | Silicidation with silicon buffer layer and silicon spacers |
| US6593620B1 (en) * | 2000-10-06 | 2003-07-15 | General Semiconductor, Inc. | Trench DMOS transistor with embedded trench schottky rectifier |
| US6537921B2 (en) * | 2001-05-23 | 2003-03-25 | Vram Technologies, Llc | Vertical metal oxide silicon field effect semiconductor diodes |
| US6621107B2 (en) * | 2001-08-23 | 2003-09-16 | General Semiconductor, Inc. | Trench DMOS transistor with embedded trench schottky rectifier |
| US7719054B2 (en) * | 2006-05-31 | 2010-05-18 | Advanced Analogic Technologies, Inc. | High-voltage lateral DMOS device |
| JP2005079339A (en) * | 2003-08-29 | 2005-03-24 | National Institute Of Advanced Industrial & Technology | Semiconductor device, power converter using semiconductor device, driving inverter, general-purpose inverter, and high power high frequency communication equipment |
| CN100364093C (en) * | 2004-04-06 | 2008-01-23 | 世界先进积体电路股份有限公司 | High-voltage electrostatic discharging protector with gap structure |
| JP4832731B2 (en) * | 2004-07-07 | 2011-12-07 | 株式会社東芝 | Power semiconductor device |
| US7135740B2 (en) * | 2004-09-27 | 2006-11-14 | Teledyne Licensing, Llc | High voltage FET switch with conductivity modulation |
| CN101536164B (en) * | 2006-09-27 | 2012-06-20 | 巨能半导体股份有限公司 | Power mosfet with recessed field plate |
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2009
- 2009-04-28 WO PCT/US2009/041996 patent/WO2009134812A1/en active Application Filing
- 2009-04-28 CN CN200980115255.XA patent/CN102037548B/en not_active Expired - Fee Related
- 2009-04-28 EP EP09739614A patent/EP2274770A4/en not_active Withdrawn
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| Publication number | Publication date |
|---|---|
| CN102037548A (en) | 2011-04-27 |
| WO2009134812A1 (en) | 2009-11-05 |
| EP2274770A4 (en) | 2012-12-26 |
| EP2274770A1 (en) | 2011-01-19 |
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