CN102033032A - Digital correlator for photon correlated nanometer zetasizer - Google Patents
Digital correlator for photon correlated nanometer zetasizer Download PDFInfo
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Abstract
The invention provides a digital correlator for a photon correlated nanometer zetasizer, which is a digital correlator for acquiring an autocorrelation function and a cross correlation function of a scattering signal in the technology for testing granularity of nanometer and sub-micron particles on the basis of a dynamic light scattering principle. The digital correlator comprises a sampling time set module, a photon counting module, a correlation operation module, a universal serial bus (USB) communication module and a synchronous reset module which are solidified in a field programmable gate array (FPGA), wherein the photon counting module is connected with the sampling time set module, and is connected with the signal input end of the correlation operation module; and the signal output end of the correlation operation module is connected with the USB communication module. The digital correlator realizes the functions of photon pulse counting, self-correlation operation, cross correlation operation and computer communication, has the characteristics of high sampling speed, wide delay time range and more correlation channels, and completely meets the requirement of high difficulty on acquiring the autocorrelation function and the cross correlation function of the high-speed changing dynamic scattering signal in the nanometer particle granularity test.
Description
(1) technical field
The present invention relates to obtain the autocorrelation function of scattered light signal and the device of cross correlation function with hardware mode, specifically a kind of digital correlator in a kind of dynamic light scattering principle (photon correlation spectroscopy method PCS and photon crosscorrelation spectroscopic methodology PCCS) measurement nano particles measuring technology based on field programmable gate array (FPGA) technology.
(2) technical background
Gordian technique based on the nano particle size instrument of dynamic light scattering principle (photon correlation spectroscopy method PCS and photon crosscorrelation spectroscopic methodology PCCS) is to extract the autocorrelation function or the cross correlation function of the scattered light that is suspended in the nano particle in the solution, calculate the coefficient of diffusion of nano particle, thus the analysing particulates granularity.Digital correlator just is based on the autocorrelation function that extracts scattered light signal in the testing graininess technology of dynamic light scattering principle (photon correlation spectroscopy method PCS and photon crosscorrelation spectroscopic methodology PCCS) and the device of cross correlation function.At present, more this type of device of domestic application mainly is the BI-9000AT of import U.S. Brookhaven company, BI-9010AT and Turbocorr digital correlator, these devices all can only be finished auto-correlation computation and can't carry out computing cross-correlation, therefore only be applicable to PCS method test nano particles, and can't be applicable to PCCS method test nano particles, thereby aspects such as test environment, institute's test sample product concentration and stable testing had bigger limitation, have only the PCCS method principle of employing and computing cross-correlation, the defective that the PCS method is existed is remedied.In addition, these devices all are based on the specialized large scale integrated circuit (ASIC) of customization, or based on the DSP technology, or multi-plate chip and joint group one-tenth, significant limitation is not only arranged very much, and cost an arm and a leg.In addition, the domestic people of having attempts adopting the mode of software to realize digital correlator, promptly earlier with photon counter with the scattered light photon counting and be stored in the storer, according to computer software its data are read from storer then and then carry out related operation, can calculate the related function of scattered light intensity although it is so, but owing to the processing time that the required processing time of software is more required than hardware is long a lot, cause photon survey in the so long processing time to be suspended (be in the processing time photon lose), cause the related function deviation of calculating bigger, therefore, adopt the digital correlator real-time of software very poor, can not satisfy the requirement that grain graininess is analyzed.
(3) summary of the invention
Technical assignment of the present invention is at the deficiencies in the prior art, a kind of digital correlator of realizing being used for photon correlation nano particle size instrument with hardware mode is provided, finish auto-correlation computation and computing cross-correlation, be used for autocorrelation function and cross correlation function that photon correlation spectroscopy and photon crosscorrelation spectral technique calculate scattered light intensity in real time, specifically be based on field programmable gate array (FPGA) technology, main setting and the selection that realizes the sampling time, photon counting, auto-correlation computation, computing cross-correlation, synchronous reset and with function such as computing machine communication, its sampling time, linear auto-correlation passage and satisfy the demand of nanometer and submicron particles testing graininess time delay fully.
Field programmable gate array (FPGA) is a kind of high arithmetic speed that has, big storage space, the chip of a large amount of digital signal processors (DSP) is contained in inside, form with design software realizes hardware design, can carry out modular design, total system is divided into several modules by the realization function, write block code one by one, and can on corresponding software, realize real-time simulation, thereby verify that each functions of modules realizes accurately whether, at last with the form of schematic diagram with each module integrated one-tenth total system, be solidificated in FPGA inside, finish the design of whole digital processing unit, form special-purpose data processor.This is just meeting the big requirement of digital correlator high-speed computation, memory data output that is used for photon correlation nano particle size instrument, satisfies nanometer and submicron particles testing graininess fully based on the digital correlator of this technology.
The technical solution adopted for the present invention to solve the technical problems is:
Be used for the digital correlator of photon correlation nano particle size instrument, comprise:
A sampling time that is solidificated in the fpga chip is provided with module;
At least two photon counting modules that are solidificated in the fpga chip;
A related operation module that is solidificated in the fpga chip;
A USB communication module that is solidificated in the fpga chip;
Above-mentioned photon counting module all is provided with module with the sampling time and is connected, and the photon counting module is connected with the signal input part of related operation module again, and the signal output part of related operation module is connected with the USB communication module.
Also be solidified with the synchronous reset module in the above-mentioned fpga chip, the synchronous reset module is connected with photon counting module, related operation module and USB communication module.
The above-mentioned sampling time is provided with module and comprises a plurality of sampling time generation modules and a selector switch, the output terminal that each sampling time is provided with module all is connected with the input end of selector switch, the control end of selector switch is connected with the output terminal of USB communication module, realizes the selection in sampling time according to control end.
Module SampleTime takes place and is made of the frequency divider that VHDL language is write the different cycles of generation in above-mentioned each in sampling time, and selector switch Selcetor is write and the module that generates by VHDL language.After outside 50MHz clock is imported from system clock input end SYS_CLK_50M, be connected to the input end of clock CLK of each sampling time generation module simultaneously, frequency divider basis divide ratio separately in the module takes place in each sampling time then, the clock that input clock is divided into different cycles, export from the Sample_Time port, and the data input pin that is connected to selector switch Selector is selected to use for it, selector switch Selector selects control end SELCET_CONTROL[7..0 according to the sampling time] be input to selector switch control CONTROL[7..0] control signal, select corresponding sampling time from sampling time output port SAMPLE_CLK output, finish the generation and the setting in sampling time.Reset terminal RESET is connected to each in sampling time the reset terminal RESET of module takes place, and when reset signal was effective, each sampling time, module zero clearing that resets took place.
Above-mentioned photon counting module comprises frequency divider, two counters and data outputting module, output at frequency divider is connected with data outputting module with two counters simultaneously, the count results output terminal of two counters is connected with the input end of data outputting module, two counter alternate runs under the driving of frequency-dividing clock are realized exporting to the seamless counting of photon pulse and with count results.
Above-mentioned frequency divider Frequency_Divider, counter Counter1 and Counter2 and data output interface module all are to be write and the module that generates by VHDL language, after inputing to frequency divider, sampling clock SAMPLE_CLK will remove clock division, the cycle of obtaining is 2 times the frequency-dividing clock in sampling clock SAMPLE_CLK cycle, its clock is connected to the counting Enable Pin COUNT_EN of counter Counter1 and is connected to the counting Enable Pin COUNT_EN of counter Counter2 by not gate, make the counting of counter Counter1 and Counter2 enable to be entered as the signal of inverse relationship, the photon pulse signal is connected to the photon pulse input end PULSE_INPUT of counter Counter1 and Counter2 simultaneously from photon pulse input end PULSE_INOUT, when the DIV_FREQUENCY_CLK frequency-dividing clock is high level (being " 1 "), counter Counter1 counts the photon pulse signal, and counter Counter2 is in waiting status after with the count results output and the zero clearing that resets; When the DIV_FREQUENCY_CLK frequency-dividing clock is low level (being " 0 "), counter Counter2 counts the photon pulse signal, counter Counter1 is in waiting status after with the count results output and the zero clearing that resets, operation so repeatedly, counter Counter1 and Counter2 alternately count the photon pulse signal of input, and count results is passed through data output interface module Data_Output export, finish gapless counting, stop the situation of photon pulse dropout input photon pulse signal.
Above-mentioned related operation module comprises a plurality of DFF triggers, multiplier, totalizer and operational pattern are selected module, each DFF trigger cascade constitutes two shift registers that carry out synchronously, when carrying out data shift, corresponding multiplier multiplicand input end is exported and be connected to respectively to current data, be that the output terminal of previous DFF trigger is connected with the multiplicand input end of each multiplier when being connected with the input end of a back DFF trigger, and the data that shift register is displaced to last output select the input end of module to be connected with operational pattern, choose the output result of one of them shift register according to the preference pattern control signal, be connected with the multiplier input end of each multiplier simultaneously and carry out multiplying, the output terminal of multiplier is connected with the totalizer input end, multiplier is exported the result carry out accumulating operation, finally finish corresponding related operation.
The related operation module is finished auto-correlation computation and two kinds of related operation patterns of computing cross-correlation, in this module, DFF trigger cascade with FPGA inside constitutes shift register with serving as the displacement storage of importing data, make each related operation passage form different delays, multiplier utilizes the inner Unsignedmultiplication of FPGA not have the sign multiplication device, write generation totalizer Accumulate_Adder with VHDL language, by shift register, multiplier and totalizer constitute the related operation module, are the embodiment that example illustrates auto-correlation and computing cross-correlation with 4 passage correlators.
The auto-correlation computation principle:
First passage: G (1)=X
1* X
2+ X
2* X
3+ ... + X
N-1* X
N
First passage: G (1)=X
1* X
3+ X
2* X
4+ ... + X
N-2* X
N
First passage: G (1)=X
1* X
4+ X
2* X
5+ ... + X
N-3* X
N
First passage: G (1)=X
1* X
5+ X
2* X
6+ ... + X
N-4* X
N
As shown in Figure 8, photon count value X is transferred to each unit of shift register successively under the driving of shift clock, every displacement once, multiplier and totalizer work once, so repeatedly the displacement, just can carry out auto-correlation computation.
The computing cross-correlation principle:
First passage: G (1)=X
1* Y
2+ X
2* Y
3+ ... + X
N-1* Y
N
First passage: G (1)=X
1* Y
3+ X
2* Y
4+ ... + X
N-2* Y
N
First passage: G (1)=X
1* Y
4+ X
2* Y
5+ ... + X
N-3* Y
N
First passage: G (1)=X
1* Y
5+ X
2* X
6+ ... + X
N-4* Y
N
Two-way photon count value X and Y are under the driving of shift clock, be transferred to each unit of two shift registers successively, and X and Y are respectively as the multiplicand and the multiplier of multiplier, the shift register revolution moves once, multiplier and totalizer work are once, displacement just can be carried out computing cross-correlation so repeatedly.
No matter carrying out auto-correlation computation or computing cross-correlation, all is to use identical multiplier and totalizer simultaneously, and promptly the multiplier of equal number and totalizer can be finished auto-correlation computation and can finish auto-correlation computation again, have effectively saved hardware resource.
Above-mentioned USB communication module comprises the baud rate clock generator, the USB receiver module, send enable module and USB sending module, baud rate clock generation module output terminal is connected with the receiving end of USB receiver module with the USB sending module simultaneously, the output terminal of USB receiver module is connected with the input end that sends enable module, the output terminal that sends enable module is connected with the input end of USB sending module, in the communication that realizes under the driving of baud rate clock between digital correlator and the computing machine USB interface, can be by the computer control digital correlator, again can be with the related operation result transmission to computing machine.
It all is the module of being write generation by VHDL language that above-mentioned baud rate clock generator BaudRate_Generator, USB receiver USB_Receiver, USB transmitter USB_Transmiter and transmission make energy control module Transmit_Enable.After the 50MHz external clock inputs to the system clock input end of baud rate clock generator BaudRate_Generator from system clock input end SYS_CLK_50M, 50M system clock frequency division is become the baud rate clock of corresponding frequencies, be connected to the baud rate input end of clock BAUD_CLK of USB receiver USB_Receiver and USB_Transmiter then, the data that USB receiver USB_Receiver transmits by USB receiving end USB_RXD serial received computing machine under the driving of baud rate clock BAUD_CLK, go here and there again and transform after the serial data that receives is processed into the parallel data of two-way different length, respectively by receiving data output end RECEIVE_DATA[7..0] and enable control end output terminal ENABLE_CON[3..0] output concurrently, by receiving data output end RECEIVE_DATA[7..0] data of output are directly connected to time control end TIME_CONTROL[7..0] with its output, and by enabling control output end ENABLE_CON[3..0] data of output are connected to send and make that energy control module Transmit_Enable's enable control input end ENABLE_CON[3..0], transmission makes energy control module Transmit_Enable start the transmission enable signal accordingly according to this control data, and export from enable signal output terminal TRANSMIT_EN, the data that then its enable signal are connected to the USB transmitter send Enable Pin TRANSMIT_ENABLE, when the transmission enable signal is effective, the USB transmitter will be from data input pin CORR_DATA[6911..0] be connected to send data input pin TRANSMIT_DATA[6911..0] and the external data of input under the driving of baud rate clock BAUD_CLK, these input data are carried out transferring to computing machine serially by USB transmitting terminal USB_TXD after the relevant treatment, simultaneously in the process that sends, by sending display end USB_TXD_SHOW display data transmissions state in time; Reset terminal RESET is connected directly to the reset terminal RESET of USB transmitter USB_Transmiter, controls the zero clearing that resets of this module.
Above-mentioned USB communication module also is provided with the transmission state pilot lamp, and external light emitting diode is the display data transmissions state in real time.
Above-mentioned synchronous reset module comprises the baud rate clock generator, the controller that automatically resets, serial ports receiver module and reset controller, the output terminal of baud rate clock generator is connected with the input end of module with the serial ports receiver module that automatically reset simultaneously, the output terminal of serial ports receiver module is connected with the input end of reset controller, under the driving of baud rate clock, realize by the computer serial communication interface the zero clearing control that resets of each module in the digital correlator.
Above-mentioned baud rate clock generator BaudRate_Generator, serial ports receive automatic reseting module COM_AutoReset, serial ports receiver COM_Receiver and synchronous reset control module ResetControl is the module of being write generation by VHDL language.Input to SYS_CLK behind the system clock input end of baud rate clock generator BaudRate_Generator from system clock input end SYS_CLK_50M when the 50MHz external clock, 50MHz system clock frequency division is become the baud rate clock of corresponding frequencies, then its baud rate clock BAUD_CLK is connected to the baud rate input end of clock BAUD_CLK that serial ports receiver COM_Receiver and serial ports receive automatic reseting module COM_AutoReset, the data that serial ports receiver COM_Receiver transmits from serial ports of computers serial received computing machine by serial ports receiving end COM_RXD under the driving of baud rate clock BAUD_CLK, go here and there again and transform after with this data parallel ground from data output end DATA_OUTPUT[7..0] output, and be connected to the control input end RESET_CON[7..0 that resets of synchronous reset control module ResetControl], synchronous reset control module ResetControl will start the synchronous reset enable signal according to this control data, and it is passed through synchronous reset signal output terminal RESET_ENABLE export, be used for the synchronous reset zero clearing of other modules of control figure correlator; Serial ports receives the control module COM_AutoReset that automatically resets will carry out timer counter from the baud rate clock of baud rate input end of clock BAUD_CLK input, generation has the reset signal of some cycles, it is exported from the signal output part REAET_AUTO that automatically resets, and connect this reset terminal RESET of signal that automatically reset to serial ports receiver COM_Receiver, serial ports receiver COM_Receiver is periodically carried out reset operation, make serial ports receiver COM_Receiver accept to be in waiting status after the data, be ready at all times receiving computer is sent to digital correlator by serial ports synchronous reset control signal.
The digital correlator that is used for photon correlation nano particle size instrument of the present invention compared with prior art, the beneficial effect that is produced is:
1) the present invention can realize auto-correlation computation and computing cross-correlation simultaneously, and a key is changeable related operation pattern;
2) the present invention is based on field programmable gate array (FPGA) technology, realize hardware design, under the fixing situation of hardware and peripheral circuit, can change inner structure, realize the expansion of relevant way by the change software programming in the mode of software;
3) the present invention adopts hypervelocity, vast capacity fpga chip, computer interfaces such as module, photon counting module, synchronous reset module, related operation module and USB communication module, COM communication module will be set in the sampling time be solidificated in the FPGA, thus the stability of raising digital correlator circuit;
4) functional module that digital correlator is all is solidificated in 1 fpga chip among the present invention, thereby has reduced the volume of digital correlator, has reduced the power consumption of digital correlator;
5) multiplier adopts the FPGA internal multiplier among the present invention, and auto-correlation computation device and multiplexing all multipliers of computing cross-correlation device and totalizer have effectively been saved hardware resource simultaneously, make system have very big extending space.
(4) description of drawings
Accompanying drawing 1 is a fundamental diagram of the present invention;
Accompanying drawing 2 be solidificated in the fpga chip each module of composition digital correlator and between connection layout;
Accompanying drawing 4 is the photon counting modular structure figure that are solidificated in the fpga chip;
Accompanying drawing 7 is the synchronous reset modular structure figure that are solidificated in the fpga chip;
Accompanying drawing 8 is auto-correlation computation synoptic diagram;
Accompanying drawing 9 is computing cross-correlation synoptic diagram.
Among the figure, 1, the sampling time is provided with module, 2, the photon counting module I, 3, the photon counting module ii, 4, the related operation module, 5, the USB communication module, 6, the synchronous reset module, 7, computing machine.
(5) embodiment
Explain below below in conjunction with accompanying drawing 1-9 the digital correlator that is used for photon correlation nano particle size instrument of the present invention being done.
As shown in Figure 1, the present invention is provided with related operation pattern (being auto-correlation computation or computing cross-correlation) by the related operation mode selection terminal, if select the auto-correlation computation pattern, the photon counting module I among 1 of the photon pulse input FPGA then, the photon counting module I is counted photon pulse in the sampling time interval that sets in advance, and count results transferred to related operation module 4, related operation module 4 is carried out multiplication successively according to the delay passage of setting then, accumulating operation, finish auto-correlation computation, at last the auto-correlation computation result is transferred to computing machine 7 by USB communication module 5, finish the whole computation process of auto-correlation computation.If will change the sampling time, then send the corresponding commands to synchronous reset module 6 by serial ports of computers communication module 8 earlier, with each module that participates in auto-correlation computation zero clearing that resets, select the different sampling times to restart auto-correlation computation again; If select the computing cross-correlation pattern, then photon pulse 1 and photon pulse 2 are inputed to photon counting module I and photon counting module ii respectively, two counting modules are counted pulse signal separately in the sampling time interval that sets in advance, and the two-way count results transferred to related operation module 4, related operation module 4 is carried out multiplication successively according to the delay passage of setting then, accumulating operation, finish computing cross-correlation, at last the computing cross-correlation result is transferred to computing machine 7 by usb interface module 5, finish the whole computation process of computing cross-correlation, if will change the sampling time, then send the corresponding command to synchronous reset module 6 by serial ports of computers communication module 8 earlier, with each module that participates in computing cross-correlation zero clearing that resets, select the different sampling times to restart computing cross-correlation again.
As shown in Figure 2, the digital correlator that is used for photon correlation nano particle size instrument of the present invention, module (Set_SampleTime) 1 is set by the sampling time that is solidificated among the FPGA, photon counting module I (PulseCounterI) 2, photon counting module ii (PulseCounterII) 3, related operation module (Correlator) 4, several modules such as USB communication module (USB_Transmiter) 5 and synchronous reset module (SynchronReset) 6 are formed, and comprise associative mode selecting side (CorrMode_Select), X-ray subpulse input end (PulseInput_X), Y photon pulse input end (PulseInput_Y), system clock input end (SystemClk_50M), USB receiving end (RXD_USB), 6 input ends such as serial ports receiving end (RXD_COM) and related operation pattern display end (CorrMode_Show), USB transmitting terminal (TXD_USB), send indication end 3 output terminals such as (TransmitShow).The 50MHz external clock connects the input end SystemClk_50M that module (Set_SampleTime) is set to the sampling time respectively from system clock input end (SystemClk_50M), the input end SystemClk_50M of the input end SystemClk_50M of synchronous reset module (SynchronReset) and USB communication module (USB_Communicator), work clock as these three modules, sampling time is provided with module input clock is carried out the frequency division generation and the corresponding sampling time is set, be connected to the sampling time input end (SAMPLE_CLK) of photon counting module I (PulseCounterI) 2 and photon counting module ii (PulseCounterII) 3 by the SAMPLE_TIME output terminal, as the sampling time of photon counting module; Photon pulse 1 and photon pulse 2 input to photon counting module I (PulseCounterI) 2 and photon counting module ii (PulseCounterII) 3 accordingly from X-ray subpulse input end PulseInput_X and Y photon pulse input end PulseInput_Y respectively, photon counting module I (PulseCounterI) 2 and photon counting module ii (PulseCounterII) 3 are counted photon pulse 1 and photon pulse 2 respectively in the sampling time, with count results from COUNT_RESULT[7..0] end output and be connected to the CORR_INPUT_X[7..0 of related operation module Correlator] input end and CORR_INPUT_Y[7..0] input end, its data are carried out auto-correlation or computing cross-correlation, pass through CORR_OUTPUT[6911..0] hold output operation result to be exported and is connected to the input end CORR_DATA[6911..0 of USB communication module USB_Communicator], by the USB_TXD output terminal operation result is transferred to computing machine after treatment; USB receives the input end USB_RXD that input end RXD_USB is connected to USB communication module USB_Communicator, the data transmission that to send from computing machine is to the USB communication module, generate corresponding order according to communications protocol, then from TIME_CONTROL[7..0] hold output and be connected to the input end SELECT_CONTROL[7..0 that the sampling time is provided with module Set_SampleTime by SampleTime_Control], be used to control the selection setting in sampling time; The control command that serial ports receiving end RXD_COM is connected to the input end RXD_COM of synchronous reset module SynchronReset, send computing machine transfers to that the synchronous reset module starts reset signal and from the output of RESET_ENABLE end, be connected to 4 modules such as photon counting module I (PulseCounterI) and photon counting module ii (PulseCounterII), related operation module Correlator and USB communication module USB_Communicator the RESET input RESET, realize the zero clearing that resets of these 4 modules.
As shown in Figure 3, be provided with that module 1 by a plurality of sampling times module SampleTime takes place and selector switch Seletor module is formed the sampling time, comprise system clock input end SYS_CLK_50M, reset terminal RESET and sampling time selection control end SELECT_COUNTER[7..0] etc. 3 input ends and sampling time output terminal SAMPLE_TIME.Wherein, the sampling clock that module is used to produce different cycles takes place in the sampling time, and the sampling time is selected control end SELECT_COUNTER[7..0] control under be provided with and export the corresponding sampling time.
As shown in Figure 4, the function that photon counting module I 2,3 realizations of photon counting module ii are counted in the sampling time that is provided with the photon pulse signal of input, this module is made up of frequency divider Frequency_Divider, counter Counter1 and Counter2 and data output interface module Data_Output, comprises sampling time input end SAMPLE_CLK, photon pulse input end PULSE_INPUT, reset terminal RESET and count results output terminal (COUNT_RESULT).After the photon pulse input, two counters alternate run in the sampling time is counted and is exported photon pulse, realizes the no gap counting of photon pulse.
As shown in Figure 5, related operation module 4 realizes auto-correlation computation and computing cross-correlation, this module is by associative mode selector switch Corr_Mode_Selector, DFF trigger DFF_8, multiplier Multiplication and totalizer Accumulate_Adder form, and comprise related operation model selection control end CORR_SELECT, raw data X passage input end CORR_INPUT_X[7..0], raw data X passage input end CORR_INPUT_Y[7..0], 5 input ends such as input end of clock CORR_CLOCK and reset terminal RESET and related operation pattern display end CORR_MODE_SHOW and several related data output terminals CORRn_OUTPUT[47..0].As two-way raw data CORR_INPUT_X[7..0] and CORR_INPUT_Y[7..0] after the input, carry out corresponding related operation according to selected related operation pattern, and operation result is exported.
As shown in Figure 6, USB communication module 5 is realized the both-way communication between digital correlators and the computing machine, both can with the related operation result transmission to computing machine by can be by the sampling time of computer installation digital correlator.This module is made 4 modules such as energy control module Transmit_Enable form by baud rate clock generator BaudRate_Generator, USB receiver USB_Receiver, USB transmitter USB_Transmiter and transmission, comprise USB receiving end USB_RXD, system clock input end SYS_CLOCK_50M, reset terminal RESET and data input pin CORR_DATA[6911..0] etc. 4 input ends and time control end TIME_CONTROL[7..0], USB transmitting terminal USB_TXD and send 3 output terminals such as display end USB_TXD_SHOW.When receive the data that computing machine sends from USB receiving end USB_RXD after, generate corresponding sampling time control command and log-on data and send enable signal, to import data CORR_DATA[6911..0] be sent to computing machine, realize the communication between digital correlator and the computing machine.
As shown in Figure 7, synchronous reset module 6 realizes by computer C 0 M the reset control of zero clearing of digital correlator.This module by baud rate clock generator BaudRate_Generator, serial ports receiver module COM_Receiver, serial ports receive automatically reset control module COM_AutoReset and and 4 modules such as synchronous reset control module ResetControl form, comprise system clock input end SYS_CLK_50M and two input ends of serial ports receiving end RXD_COM and reset enable signal output part RESET_ENABLE.When serial ports receiving end RXD_COM receives the order that computing machine sends by serial ports after, start the reset enable signal and, be used for the zero clearing that resets of each module of control figure correlator from the output of RESET_ENABLE port.
As shown in Figure 8, photon count value X is transferred to each unit of shift register successively under the driving of shift clock, every displacement once, multiplier and totalizer work once, so repeatedly the displacement, just can carry out auto-correlation computation.
The computing cross-correlation principle:
First passage: G (1)=X
1* Y
2+ X
2* Y
3+ ... + X
N-1* Y
N
First passage: G (1)=X
1* Y
3+ X
2* Y
4+ ... + X
N-2* Y
N
First passage: G (1)=X
1* Y
4+ X
2* Y
5+ ... + X
N-3* Y
N
First passage: G (1)=X
1* Y
5+ X
2* X
6+ ... + X
N-4* Y
N
As shown in Figure 9, two-way photon count value X and Y are under the driving of shift clock, be transferred to each unit of two shift registers successively, and X and Y are respectively as the multiplicand and the multiplier of multiplier, the shift register revolution moves once, multiplier and totalizer work once are shifted so repeatedly, just can carry out computing cross-correlation.
Claims (8)
1. be used for the digital correlator of photon correlation nano particle size instrument, it is characterized in that, comprising:
A sampling time that is solidificated in the fpga chip is provided with module;
At least two photon counting modules that are solidificated in the fpga chip;
A related operation module that is solidificated in the fpga chip;
A USB communication module that is solidificated in the fpga chip;
Above-mentioned photon counting module all is provided with module with the sampling time and is connected, and the photon counting module is connected with the signal input part of related operation module again, and the signal output part of related operation module is connected with the USB communication module.
2. the digital correlator that is used for photon correlation nano particle size instrument according to claim 1, it is characterized in that, also be solidified with the synchronous reset module in the above-mentioned fpga chip, the synchronous reset module is connected with photon counting module, related operation module and USB communication module.
3. the digital correlator that is used for photon correlation nano particle size instrument according to claim 1 and 2, it is characterized in that, sampling time is provided with module and comprises a plurality of sampling time generation modules and a selector switch, the output terminal that each sampling time is provided with module all is connected with the input end of selector switch, the control end of selector switch is connected with the output terminal of USB communication module, realizes the selection in sampling time according to control end.
4. the digital correlator that is used for photon correlation nano particle size instrument according to claim 1 and 2, it is characterized in that, the photon counting module comprises frequency divider, two counters and data outputting module, output at frequency divider is connected with data outputting module with two counters simultaneously, the count results output terminal of two counters is connected with the input end of data outputting module, two counter alternate runs under the driving of frequency-dividing clock are realized exporting to the seamless counting of photon pulse and with count results.
5. the digital correlator that is used for photon correlation nano particle size instrument according to claim 1 and 2, it is characterized in that, the related operation module comprises a plurality of DFF triggers, multiplier, totalizer and operational pattern are selected module, each DFF trigger cascade constitutes two shift registers that carry out synchronously, when carrying out data shift, corresponding multiplier multiplicand input end is exported and be connected to respectively to current data, be that the output terminal of previous DFF trigger is connected with the multiplicand input end of each multiplier when being connected with the input end of a back DFF trigger, and the data that shift register is displaced to last output select the input end of module to be connected with operational pattern, choose the output result of one of them shift register according to the preference pattern control signal, be connected with the multiplier input end of each multiplier simultaneously and carry out multiplying, the output terminal of multiplier is connected with the totalizer input end, multiplier is exported the result carry out accumulating operation, finally finish corresponding related operation.
6. the digital correlator that is used for photon correlation nano particle size instrument according to claim 1 and 2, it is characterized in that, the USB communication module comprises the baud rate clock generator, the USB receiver module, send enable module and USB sending module, baud rate clock generation module output terminal is connected with the receiving end of USB receiver module with the USB sending module simultaneously, the output terminal of USB receiver module is connected with the input end that sends enable module, the output terminal that sends enable module is connected with the input end of USB sending module, in the communication that realizes under the driving of baud rate clock between digital correlator and the computing machine USB interface, can be by the computer control digital correlator, again can be with the related operation result transmission to computing machine.
7. the digital correlator that is used for photon correlation nano particle size instrument according to claim 6 is characterized in that the USB communication module also is provided with the transmission state pilot lamp, and external light emitting diode is the display data transmissions state in real time.
8. the digital correlator that is used for photon correlation nano particle size instrument according to claim 1 and 2, it is characterized in that, the synchronous reset module comprises the baud rate clock generator, controller automatically resets, serial ports receiver module and reset controller, the output terminal of baud rate clock generator is connected with the input end of module with the serial ports receiver module that automatically reset simultaneously, the output terminal of serial ports receiver module is connected with the input end of reset controller, under the driving of baud rate clock, realize by the computer serial communication interface the zero clearing control that resets of each module in the digital correlator.
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