CN102023257A - Semiconductor apparatus and method for detecting working condition of plasma flood gun (PFG) - Google Patents
Semiconductor apparatus and method for detecting working condition of plasma flood gun (PFG) Download PDFInfo
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- CN102023257A CN102023257A CN 200910195809 CN200910195809A CN102023257A CN 102023257 A CN102023257 A CN 102023257A CN 200910195809 CN200910195809 CN 200910195809 CN 200910195809 A CN200910195809 A CN 200910195809A CN 102023257 A CN102023257 A CN 102023257A
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Abstract
The invention discloses a semiconductor apparatus for detecting the working condition of a plasma flood gun (PFG). The semiconductor apparatus comprises a wafer, an oxide layer and a polysilicon layer, wherein the oxide layer is deposited on the wafer; and the polysilicon layer into which impurities are injected is deposited on the oxide layer. The invention also provides a method for detecting the working condition of the PFG. The method comprises the following steps of: depositing the oxide layer on the wafer; depositing the polysilicon layer on the oxide layer; injecting the impurities into the polysilicon layer; annealing the wafer so as to activate the injected impurities; and emitting electron beams to the wafer through the PFG, and detecting the resistance values of squares at a plurality of positions of the wafer. According to a detection wafer prepared by the invention, the working condition of the PFG can be directly reflected by detecting the resistance value of the squares of the wafer. The detection method is convenient, quick and quite effective.
Description
Technical field
The present invention relates to the semiconductor detection technique, particularly a kind of semiconductor devices and method that is used to detect submerged plasma gun working condition.
Background technology
Along with the semiconductor integrated level is more and more higher, size of devices is more and more littler, and particularly for the cmos device of 65nm process node and smaller szie, the technological requirement of injecting for source/drain region is more and more higher.In source/drain region injection process, require to inject ion beam and have ultralow energy and be electric neutrality.This is because the electric charge that ion beam brings can form accumulation, promptly so-called " electric charging effect " on gate oxide layers.Sputter secondary electron on the wafer and more can increase the weight of this electric charge accumulation effect.Electric charge accumulation directly influence is to produce electric charge to destroy, thereby influences structure, the manufacturing defect of device, reduces yield rate, the especially serviceable life that can destroy thin dielectric layer and have influence on cmos device.Secondly, the electric charge that accumulates on the wafer influences the bundle spot size of ion beam conversely, thereby has a strong impact on the homogeneity and the repeatability of injection.Along with the Highgrade integration of device, the gate oxidation films thin layerization, the downsizing of grid area and the heavy caliberization of wafer, the problem that makes the electric charge accumulation cause is more and more serious.Therefore, the electric charge accumulation of managing to control wafer in ion implantation technology has become a very crucial technology.
The classic method that solves the accumulation of wafer electric charge is in coming with submerged plasma gun (PFG) and the electric charge on the ground.Shown in Figure 1A, PFG 100 emitting electrons are to the surface of wafer 101.Yet when PFG self breaks down, for example filament is thin out when causing the ejected electron rheology weak because ejected electron quantity is not enough, therefore can't be fully in wafer on unnecessary positive charge, can cause the accumulation of electric charge on the wafer in the ion implantation process like this.In routine techniques, adopt the working condition of naked brilliant off-line test PFG usually.But, owing to be that bare silicon wafer is placed directly on the worktable during naked brilliant offline inspection, so wafer is by worktable ground connection.Shown in Figure 1B, if PFG is because thereby faults itself causes flame current to reduce to make when ejected electron quantity is not enough, and the wafer of ground connection can be introduced the electronics and remaining positive charge on the polysilicon from ground connection one end automatically.So just can't detect whether ejected electron deficiency of PFG, also just can't in time adjust PFG to eliminate the electric charge accumulation of wafer.Monitor the PFG duty by detecting the ion beam electromotive force in the prior art, but this means have significant limitation, have only the wafer of particular design can sense potential, this will improve cost of manufacture greatly, and expend time in, and prolong the production cycle.
Therefore, need a kind of easy enforcement and fast method detect PFG and whether be in normal duty, with guarantee PFG can launch enough electronics come in and electric charge on the ground, eliminate the electric charging effect of wafer.
Summary of the invention
Introduced the notion of a series of reduced forms in the summary of the invention part, this will further describe in the embodiment part.Summary of the invention part of the present invention does not also mean that key feature and the essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection domain of attempting to determine technical scheme required for protection.
For can be fast and detect PFG easily and whether be in normal duty, to guarantee that PFG can launch in enough electronics and the electric charge on the ground, eliminate the electric charging effect of wafer, the invention provides a kind of semiconductor devices that is used to detect submerged plasma gun working condition, described semiconductor devices comprises: wafer; The monoxide layer that on described wafer, deposits; An and polysilicon layer that on described oxide skin(coating), deposit and implanted dopant.
According to a further aspect in the invention, provide a kind of method that is used to detect submerged plasma gun working condition, described method comprises the following steps: deposition monoxide layer on wafer; Deposition one polysilicon layer on described oxide skin(coating); To described polysilicon layer implanted dopant; Described wafer is carried out annealing in process, to activate the impurity that injects; To described wafer divergent bundle, detect the square resistance of a plurality of positions on the wafer by described submerged plasma gun.
Detection wafer prepared in accordance with the present invention can directly react the working condition of PFG by the square resistance that detects wafer, and this detection method is convenient and swift, and very effective.The wafer that is used to detect can be reused, so the method according to this invention has cost benefit.
Description of drawings
Following accompanying drawing of the present invention is used to understand the present invention at this as a part of the present invention.Embodiments of the invention and description thereof have been shown in the accompanying drawing, have been used for explaining principle of the present invention.In the accompanying drawings,
Figure 1A is PFG in the wafer emission and the synoptic diagram of electronics;
Figure 1B is that existing wafer receives in the PFG emission and the synoptic diagram of electronics;
Fig. 2 is that improved wafer receives in the PFG emission and the synoptic diagram of electronics according to the present invention;
Fig. 3 is the method flow diagram according to detection PFG working condition of the present invention;
Fig. 4 A and Fig. 4 B are the size of different PFG arc current and the graph of a relation between the wafer square resistance variations.
Embodiment
In the following description, a large amount of concrete details have been provided so that more thorough understanding of the invention is provided.Yet, it will be apparent to one skilled in the art that the present invention can need not one or more these details and implemented.In other example,, be not described for technical characterictics more well known in the art for fear of obscuring with the present invention.
In order thoroughly to understand the present invention, will in following description, detailed steps be proposed, so that how explanation the present invention utilizes extra oxide skin(coating) and detect the problem that square resistance R s value solves monitoring PFG duty.Obviously, execution of the present invention is not limited to the specific details that the technician had the knack of of semiconductor applications.Preferred embodiment of the present invention is described in detail as follows, yet except these were described in detail, the present invention can also have other embodiments.
With reference to Fig. 2, comprise test with wafer 201 according to the semiconductor devices of test according to the present invention PFG working condition, be deposited on the monoxide layer 202 on the wafer 201 and be deposited on polysilicon layer 203 on this oxide skin(coating) 202.The composition of described oxide skin(coating) is silicon dioxide preferably, and the thickness of oxide skin(coating) is approximately 100～1500 dusts, and polysilicon thickness is approximately 1500～3500 dusts.By introducing oxide skin(coating) 202, polysilicon layer 203 and wafer 201 can be isolated, thereby stop electronics from ground connection one end of wafer 201 be directed to polysilicon layer 203 with and the positive charge that accumulates of polysilicon.Like this, when PFG works when undesired, thereby for example owing to filament failure cause flame current reduce to make the ejected electron lazy weight with neutralization because during the unnecessary positive charge that injection technology produces, the ion that injects can produce the effect of dispersion, causes the square resistance Rs of wafer to produce uneven distribution.By measuring the square resistance and the variation tendency of uneven distribution in the wafer, can directly obtain PFG information whether working properly.
Fig. 3 shows the process chart according to measurement PFG working condition of the present invention.In step 301, on wafer, deposit the monoxide layer with the chemical vapor deposition (CVD) method, technological temperature is 900～1100 degrees centigrade, and the composition of described oxide skin(coating) is silicon dioxide preferably, and the thickness of oxide skin(coating) is approximately 100～1500 dusts.In step 302, at oxide layer surface deposition one deck polysilicon, technological temperature is about 845～1045 degrees centigrade, and polysilicon thickness is approximately 1500～3500 dusts.Then, in step 303, inject boron (B) to polysilicon, it is 1～10keV that boron injects energy, and dosage is 5 * 10
14～5 * 10
15Cm
-2, technological temperature is 950～1150 degrees centigrade, injection length is 10～30 seconds.In step 304, carry out annealing in process, activate the boron ion that injects.Annealing temperature is about 1100 ℃, and the time is 20 seconds.In step 305, by PFG to the wafer divergent bundle, the unnecessary electric charge that produces owing to the injection of in step 303, carrying out with neutralization.Then in step 306, the square resistance at wafer diverse location place is detected, can adopt four probe method to detect.In step 307, alternatively, after whole characterization processes is finished, can peel off the oxide skin(coating) and the polysilicon layer that are deposited.And the wafer of peeling off after oxide skin(coating) and the polysilicon layer can recycle once more, has saved the cost that detects greatly.
Fig. 4 A to 4C shows the size of PFG emission flame current and the relation between the wafer square resistance variations, and horizontal ordinate is the therefrom detection position of mind-set both sides extension of wafer sample, and 0 represents the position of crystal circle center, and 150 represent the position of crystal round fringes; Ordinate is the size of square resistance.On orthogonal both direction along crystal column surface, promptly 0 ° with 90 ° of directions on respectively the test wafer sample in the distribution situation of the situation lower block resistance of different PFG emission flame currents.The polysilicon thickness that deposits on the wafer sample is 2500 dusts, and it is 5keV that boron injects energy, and dosage is 1 * 10
15Cm
-2At 1100 degrees centigrade, contained under the atmosphere of oxygen 10% annealing 20 seconds.Here by the arc current size of adjusting PFG and the square resistance that detects wafer, simulate the detection method of PFG.Promptly the variation tendency of the square resistance by detecting wafer directly reflects the arc current emission situation of PFG.Shown in Fig. 4 A, the PFG arc current is the enough situations of PFG ejected electron quantity during for 3A, chooses multiple spot and detect on two mutually perpendicular directions (0 ° and 90 °), and the mean value that obtains the square resistance of wafer is 248.57 ohm/.The square resistance maximal value of measured wafer and the difference of minimum value are 12.62 ohm of every sides.As can be seen, the square resistance size of each position of wafer is basic identical from statistics, change not remarkable, in this explanation PFG emission and the number of electronics be enough, therefore the injection of whole wafer is uniformly, thus it is working properly to have reacted PFG.Shown in Fig. 4 B, when the PFG arc current is reduced to 0.3A, be the situation of PFG ejected electron lazy weight, on two mutually perpendicular directions (0 °, 90 °), to choose multiple spot and detect, the mean value that obtains the square resistance of wafer is 251.92 ohm/.The square resistance maximal value of measured wafer and the difference of minimum value are 31.46 ohm of every sides.From statistics as can be seen, the square resistance of crystal round fringes position differs greatly on the both direction of being surveyed, it is very inhomogeneous that the crystal round fringes place compares the concentration of impurity with the center as can be known, thus reacted the PFG emission in and the electron amount deficiency, it is undesired therefore to work.
Like this, by detection wafer prepared in accordance with the present invention, can directly react the working condition of PFG by the square resistance that detects wafer, this detection method is convenient and swift, and very effective.The wafer that is used to detect can be reused, so the method according to this invention has cost benefit.
The present invention is illustrated by the foregoing description, but should be understood that, the foregoing description just is used for for example and illustrative purposes, but not is intended to the present invention is limited in the described scope of embodiments.It will be appreciated by persons skilled in the art that in addition the present invention is not limited to the foregoing description, can also make more kinds of variants and modifications according to instruction of the present invention, these variants and modifications all drop in the present invention's scope required for protection.Protection scope of the present invention is defined by the appended claims and equivalent scope thereof.
Claims (15)
1. semiconductor devices that is used to detect submerged plasma gun working condition, described semiconductor devices comprises:
Wafer;
The monoxide layer that on described wafer, deposits;
An and polysilicon layer that on described oxide skin(coating), deposit and implanted dopant;
Wherein, judge the working condition of submerged plasma gun by detecting the square resistance of a plurality of positions on the described wafer.
2. semiconductor devices as claimed in claim 1 is characterized in that described oxide skin(coating) is a silicon dioxide.
3. semiconductor devices as claimed in claim 1, the thickness that it is characterized in that described oxide skin(coating) is 100～1500 dusts.
4. semiconductor devices as claimed in claim 1, the thickness that it is characterized in that described polysilicon layer is 1500～3500 dusts.
5. semiconductor devices as claimed in claim 1 is characterized in that described oxide skin(coating) forms by chemical vapour deposition technique, and technological temperature is 900～1100 degrees centigrade.
6. semiconductor devices as claimed in claim 1 is characterized in that described polysilicon layer forms by chemical vapour deposition technique, and technological temperature is 845～1045 degrees centigrade.
7. method that is used to detect submerged plasma gun working condition, described method comprises the following steps:
Deposition monoxide layer on wafer;
Deposition one polysilicon layer on described oxide skin(coating);
To described polysilicon layer implanted dopant;
Described wafer is carried out annealing in process, to activate the impurity that injects;
To described wafer divergent bundle, detect the square resistance of a plurality of positions on the wafer by described submerged plasma gun.
8. detection method as claimed in claim 7 is characterized in that described oxide skin(coating) is a silicon dioxide.
9. detection method as claimed in claim 7, the thickness that it is characterized in that described oxide skin(coating) is 100～1500 dusts.
10. detection method as claimed in claim 7, the thickness that it is characterized in that described polysilicon layer is 1500～3500 dusts.
11. detection method as claimed in claim 7 is characterized in that described oxide skin(coating) forms by chemical vapour deposition technique, technological temperature is 900～1100 degrees centigrade.
12. detection method as claimed in claim 7 is characterized in that described polysilicon layer forms by chemical vapour deposition technique, technological temperature is 845～1045 degrees centigrade.
13. detection method as claimed in claim 7, the impurity that it is characterized in that described injection is boron, and the injection energy is 1～10keV, and dosage is 5 * 10
14～5 * 10
15Cm
-2, technological temperature is 950～1150 degrees centigrade, injection length is 10～30 seconds.
14. the method that is used to detect submerged plasma gun working condition as claimed in claim 7, the temperature that it is characterized in that described annealing in process is 1100 ℃, and the time is 20 seconds.
15. the method that is used to detect submerged plasma gun working condition as claimed in claim 7 comprises that also oxide skin(coating) and the polysilicon layer that will deposit on the described wafer peel off, so that recycle described wafer.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105977181A (en) * | 2016-07-27 | 2016-09-28 | 上海华虹宏力半导体制造有限公司 | Method for monitoring quality of ion implantation equipment and ion implantation method |
| CN108231614A (en) * | 2016-12-14 | 2018-06-29 | 中芯国际集成电路制造(上海)有限公司 | A kind of method of crystal column surface residual charge amount after detection ion implanting |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6743662B2 (en) * | 2002-07-01 | 2004-06-01 | Honeywell International, Inc. | Silicon-on-insulator wafer for RF integrated circuit |
| US20080023699A1 (en) * | 2006-07-26 | 2008-01-31 | Macronix International Co., Ltd. | A test structure and method for detecting charge effects during semiconductor processing |
| KR100800647B1 (en) * | 2006-08-29 | 2008-02-01 | 동부일렉트로닉스 주식회사 | Fabrication method of gate electrode in semiconductor device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105977181A (en) * | 2016-07-27 | 2016-09-28 | 上海华虹宏力半导体制造有限公司 | Method for monitoring quality of ion implantation equipment and ion implantation method |
| CN108231614A (en) * | 2016-12-14 | 2018-06-29 | 中芯国际集成电路制造(上海)有限公司 | A kind of method of crystal column surface residual charge amount after detection ion implanting |
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