CN102013452B - LED lamp and LED chip and manufacture method - Google Patents
LED lamp and LED chip and manufacture method Download PDFInfo
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- CN102013452B CN102013452B CN201010159262.4A CN201010159262A CN102013452B CN 102013452 B CN102013452 B CN 102013452B CN 201010159262 A CN201010159262 A CN 201010159262A CN 102013452 B CN102013452 B CN 102013452B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The present invention proposes a kind of LED lamp and three kinds of LED chips. Adopting the heat conduction core (6) of circular cone post, threaded post or taper bolt structure, processing is simple, easy for installation, solves the heat conduction problem in reality wick standardization; Thermal diffusion sheet (2) adopts copper and aluminum, and area and thickness are sufficiently large, and reach thermal diffusion effect; Wafer (1) is that welding is attached on thermal diffusion sheet (2), to cut down the heat conduction temperature difference between the two, and between insulation take second place, high-voltage insulation layer (4) needed for safety is located between thermal diffusion sheet (2) and heat conduction core (6), and heat flow density around here is reduced by thermal diffusion sheet diffusion. Adopt wafer orientation plate technique, solve wafer (1) and thermal diffusion sheet (2) wielding neck, apparatus expensive, the problem that production efficiency is low.
Description
Technical field
The invention belongs to LED technology field, be related specifically to the conduction of heat technology in LED lamp and LED chip.
Technical background
LED heat dissipation problem is a big key technical problem of current LED illumination penetration and promotion. Owing to LED chip needs heat radiation so that LED illumination lamp is the same with daylight lamp etc. as existing electric filament lamp, and wick (bulb) is standardized parts, and convenient installation, add one layer of difficulty. Existing LED illumination lamp, light fixture and wick, but without realizing standardized component that is relatively independent and that be easy to assembling, so that it is more costly.
Analyze from simple thermal conduction study, a LED heat radiation simply room temperature diabatic process, and uncomplicated. But due to thermal conduction study and ripe heat transfer technology knowledge, and other rudimentary knowledge associated with heat transfer is not cognitive by personnel in LED industry fully, thus current LED heat dissipation technology and product are complicated, and are in the junior stage.
Diabatic process from LED junction point to cross-ventilation heat-transfer surface (namely fin) is conduction process, and owing to LED wafer area is little, heat flow density is very high, and this conduction process is extremely important in whole LED dispels the heat. Reducing the thermal resistance of conduction process, most effective simple way again adopts highly heat-conductive material exactly, and such as copper and aluminum, heat conductivity is high, and the cost of material is low, easy machine-shaping. But copper and aluminum are metallic conductor, LED illumination utensil as electrical equipment, must being fulfilled for Electrical Safety requirement, must reach necessarily high insulating requirements between LED junction point and fin (exposed metal parts), general proof voltage to reach the insulating requirements of kilovolt. Insulation and heat conduction are conflicting, and LED wafer is usually arranged on a ceramic insulation liner by existing product, utilize pottery proof voltage high, and heat conductivity is not low yet, solves this problem. Although ceramic, such as Al2O3Ceramic coefficient is up to 20W/m K, but little ten times of aluminum of ratio, less nearly 20 times than copper, the heat flow density in LED wafer is up to 106W/m2; Adopt Al thick for 0.2mm2O3Insulation lining, only will reach 10 DEG C in the heat conduction temperature difference of this insulating liner, additionally thick for 0.2mm Al2O3The processing cost of potsherd is not low yet. Now generally all adopting the crystal-bonding adhesive (being generally elargol) that heat conductivity is not high, fixed wafer, this causes again the heat conduction temperature difference very high between wafer and insulation lining two interfaces.
Summary of the invention
The purpose of the present invention is aiming at the conduction process in LED radiation processes. One, the heat conduction problem in reality wick standardization is solved; Two, the heat conduction in LED chip and the contradiction between insulation, it is proposed to the technical scheme that simple in construction, cost are low.
Technical scheme: LED lamp mainly includes wafer, thermal diffusion sheet and heat conduction core and constitutes, and the heat that wafer produces passes to heat conduction core by thermal diffusion sheet, then is passed to fin by hot core. The invention is characterized in that heat conduction core has been adopted with aluminum or copper; (namely heat conduction core is outwards conducted heat) transmission of heat by contact face of heat conduction core and fin have employed circular cone rod structure or threaded stud structure or taper bolt structure; Wafer is that welding is attached on thermal diffusion sheet; The area of the thermal diffusion sheet chip area more than five times, thickness is not less than 0.5mm, and adopts copper or aluminum or copper aluminum composite material; Being provided with high-voltage insulation layer between thermal diffusion sheet and heat conduction core, the thickness of high-voltage insulation layer is more than 0.1mm.
Heat conduction core adopts circular cone rod structure, fin also has the conical bore matched, if only small pushing force, just can obtain the contact pressure being exaggerated between heat conduction core circular cone cylinder and the conical bore face of fin of several times, thus thermal contact resistance reduces, conical bore and circular cone post are easily worked molding, and quality of fit is easily guaranteed that, cost is low, and installation is also convenient for. Owing to the surface area of screw thread cylinder is exaggerated, transmission of heat by contact area is just exaggerated, thermal contact resistance between heat conduction core and fin is reduced by, such as adopt common 60 �� trigonodont screw thread, its surface area is the twice on the face of cylinder, rotation mode is adopted LED lamp to be loaded in fin (light fixture), it may not be necessary to instrument, easy to operate. The advantage that taper bolt structure then combines circular cone rod structure and threaded stud structure: contact pressure is big, contact area is big, it is simple to install. Adopt the heat conduction core of the present invention, solve the heat conduction problem between LED lamp and fin, and be easy to the assembling of LED lamp, also just solve reality LED lamp standardization matter of utmost importance.
Thermal diffusion sheet in the present invention, although heat sink effect and diabatic process with existing product are similar, but the present invention its important function thermal diffusion effect clear and definite first, and it is referred to as thermal diffusion sheet. Because LED wafer area is little, such as the wafer of 1 �� 1mm size, even if power consumption 1.2W, its heat density just reaches 106W/m2, very high, thus the thermal contact resistance problem solved between wafer and thermal diffusion sheet has become matter of utmost importance, and electric insulation problem between the two is taken second place. Welding procedure, even if adopting the soldering that cost is minimum, the heat conductivity of metallic tin is also more than 60W/m K, than senior heat-conducting cream also more than high ten times, thus wafer adopts welding procedure, welding is attached on thermal diffusion sheet, the heat conduction temperature difference that will effectively reduce between wafer and thermal diffusion sheet. Thermal diffusion sheet as thermal diffusion effect not only to adopt the material that heat conductivity is high, its area and thickness are also sufficiently large, thus thermal diffusion sheet adopts copper and aluminum, and require that thermal diffusion sheet area wants the chip area of more than 5 times, thickness is not less than 0.5mm, the chip area being not less than 10 times is preferably selected during design, if wafer is 1 �� 1mm, 1W, thermal diffusion sheet thickness should reach more than 1.0mm, its purpose and effect make heat effectively spread in thermal diffusion sheet exactly, reduce the heat flow density between thermal diffusion sheet and heat conduction core. For meeting the Insulation Problems of Electrical Safety code requirement, it is possible to solved by the high-voltage insulation layer between thermal diffusion sheet and heat conduction core.
In the present invention, high-voltage insulation layer is defined as resistance to DC voltage and reaches the insulating barrier of more than 500V.
The thickness of the high-voltage insulation layer between thermal diffusion sheet set forth above and heat conduction core is more than 0.1mm, as adopted Al2O3Ceramic insulating layer, the thick resistance to DC voltage of 0.1mm is up to 1 kilovolt, this is to allow the insulating barrier between thermal diffusion sheet and heat conduction core undertake the insulating requirements that certainly largely or entirely safety is fixed, reduce the insulating requirements between wafer and thermal diffusion sheet, or not consider insulation between the two, to reduce heat transfer temperature difference between the two.
If adopting soldering between wafer and thermal diffusion sheet, stannum material thickness between the two is 20 ��m, 106W/m2In heat flow density situation, between both interfaces, heat transfer temperature difference can be calculated �� t=0.32 DEG C, through thermal diffusion sheet, if it is 1.25 �� 10 that heat flow density reduces by 8 times5W/m2, the high-voltage insulation layer between thermal diffusion sheet and heat conduction core adopts Al thick for 0.2mm2O3Pottery, heat conductivity is 20W/m K, then can be calculated heat transfer temperature difference �� t=1.25 DEG C at high-voltage insulation layer place, say, that the conduction of heat temperature difference sum at two interfaces, place in LED lamp is in 2 DEG C are spent. If the Al thick by 0.2mm2O3Ceramic insulation sheet is located between wafer and thermal diffusion sheet (heat sink) (a kind of existing product structure), only potsherd both sides heat transfer temperature difference can be calculated �� t=10 DEG C, it it is above-mentioned 5 times more than, it is seen that adopt the present invention can significantly reduce the conduction of heat temperature difference in LED lamp. In detailed description of the invention afterwards, the LED lamp of the present invention be will be further described and be easy to waterproof sealing, produce in enormous quantities, the advantage such as standardization realization.
For the LED chip parts being made up of wafer and thermal diffusion sheet, the present invention also from reducing thermal conduction resistance, reduces cost, facilitates manufacture view to set out, it is proposed that concrete structure and manufacture method.
One, thermal diffusion sheet adopts aluminum or copper or copper aluminum composite material; The weldering contact area of wafer and the thermal diffusion sheet chip area more than 1/3rd; Thermal diffusion sheet is provided with high-voltage insulation layer or low-voltage insulation layer; High-voltage insulation layer adopts by anode oxidation method, the pellumina directly grown from the metallic aluminum surface thermal diffusion sheet, and the thickness of this film is more than 50 ��m; Low-voltage insulation layer have employed the ceramic insulating film generated by vapour deposition or the pellumina directly grown by anodic oxidation from the metallic aluminum surface thermal diffusion sheet, and this thickness is less than 50 ��m.
Two, the pn-junction electrode of wafer is V-type electrode, adopts inverted structure; Thermal diffusion sheet adopts copper or aluminum or copper aluminum composite material; Wafer is provided with thermal land; The weldering knot contact area chip area more than 1/3rd of wafer and thermal diffusion sheet; The ceramic insulating film generated by vapour deposition by one layer outside n junction electrode on wafer and p junction electrode or part p junction electrode is covered, and thermal land is located at the outside of this ceramic insulating film.
Three, have employed the insulation wafer orientation sheet made of sheet material in LED chip, wafer orientation sheet welding or bonding be attached on thermal diffusion sheet, in the embedding mouth of wafer orientation that wafer is embedded in spacer, wafer welding is attached on thermal diffusion sheet.
Four, a kind of LED chip encapsulation making method, it is characterised in that: have employed wafer orientation plate, wafer orientation plate has several multi-wafer and positions embedding mouth, and position hole no less than two; Thermal diffusion sheet has corresponding pad and hole, location; Wafer is first fixing to be embedded in the embedding mouth of wafer orientation, then is attached in thermal diffusion sheet together, and another rising heats the welding sequence carrying out wafer with thermal diffusion sheet; Or wafer orientation plate is first attached in thermal diffusion sheet, then being embedded by wafer in the embedding mouth of wafer orientation, another rising heats the welding sequence carrying out wafer with thermal diffusion sheet.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the invention will be further described.
Fig. 1 is a kind of feature profile schematic diagram assembling gelled LED lamp of the present invention, and heat conduction core is circular cone rod structure, it is shown that the matching relationship of wick and fin.
Fig. 2 is the feature profile schematic diagram of the LED lamp of a kind of present invention, and heat conduction core is threaded stud structure.
Fig. 3 is the feature profile schematic diagram of the LED lamp of a kind of present invention, and heat conduction core is taper bolt structure, and is furnished with lampshade, it is shown that draws conductor structure and seals waterproof measure feature.
Fig. 4 is a kind of feature profile schematic diagram assembling gelled LED lamp of the present invention, it is shown that the electricity between wick and light fixture (fin) be connected by spring contact and contact structure.
Fig. 5 and Fig. 6 is the wafer distribution schematic diagram in LED lamp, represents that wafer or wafer set are radially scattered layout, dispersed as far as possible.
Fig. 7 is the feature profile schematic diagram of the great power LED wick of a kind of present invention, and middle part is through, and is provided with radiated rib.
Fig. 8 and Fig. 9 is the LED chip feature profile schematic diagram of two kinds of present invention respectively, and pn-junction electrode is L-type electrode, is particularly suitable for the wafer of silicon carbide substrates.
Figure 10 is the LED chip feature profile schematic diagram of a kind of present invention, and pn-junction electrode is V-type electrode, and is inverted structure, and thermal land and p pole pad are integrated, and are particularly well-suited to the wafer of Sapphire Substrate.
Figure 11 is the wafer feature schematic diagram of chip shown in a kind of Figure 10, it is shown that p, n junction electrode and pad, ceramic insulating film, thermal land, it is shown that n pole pad is on four angles.
Figure 12 is the schematic diagram of the ceramic insulating film in Figure 11 and thermal land.
Figure 13 is the LED chip feature profile schematic diagram of a kind of present invention.
Figure 14 is the feature schematic diagram of the wafer in chip shown in a kind of Figure 13, it is shown that p, n junction electrode and pad, ceramic insulating film, thermal land.
Figure 15 is the schematic diagram of the ceramic insulating film in Figure 14 and thermal land.
Figure 16 and Figure 17 indicates that the employing wafer orientation plate of a kind of present invention, it is ensured that the feature schematic diagram of wafer and thermal diffusion sheet wielding neck, Figure 17 is the feature profile schematic diagram of Figure 16.
Figure 18 indicates that the employing wafer orientation plate of a kind of present invention, it is ensured that the feature schematic diagram of wafer and thermal diffusion sheet wielding neck.
Figure 19,20 it is the LED chip feature profile schematic diagram that have employed wafer orientation sheet of two kinds of present invention respectively, L-type pn-junction electrode, it is adaptable to the wafer of silicon carbide substrates.
Figure 21,22,23 are the LED chip feature profile schematic diagram that have employed wafer orientation sheet of three kinds of present invention respectively, V-type pn-junction electrodes, inverted structure.
Figure 24 is the wafer feature schematic diagram in chip shown in a kind of Figure 23.
In figure: 1, wafer, 2, thermal diffusion sheet, 3, fin, 4, high-voltage insulation layer, 5, screw, 6, heat conduction core, 7, radiated rib, 8, low-voltage insulation layer, 9, draw wire, 10, sealing, 11, pcb board, 12, lampshade, 13, contact, 14, spring contact, 15, substrate, 16, thermal land, 17, n pole pad, 18, n pole goes between, 19, contact conductor insulating barrier, 20, p junction electrode, 21, ceramic insulating film, 22, n junction electrode, 23, p pole pad, 24, p pole goes between, 25, wafer orientation plate, 26, hole, location, 27, thermal diffusion sheet, 28, wafer orientation sheet, 29, wire, 30, solder.
Detailed description of the invention
Fig. 1 illustrates: heat conduction core 6 adopts circular cone rod structure, cone cylinder (heat-transfer area that namely heat conduction core is outside) and the tapered centre hole of fin 3 are in close contact, heat is through this contact surface and passes to fin 3 from heat conduction core 6, thus the gap between contact surface is little as far as possible, namely quality of fit wants high, contact pressure is big. Circular cone post and conical bore processing are simple, and precision is easily guaranteed that, as long as only small pushing force just can be amplified the contact pressure of decades of times, adopt screw 5 tightening force, heat conduction core 6 be enclosed in tightly in the tapered centre hole of fin 3 in figure. For reducing the thermal contact resistance between heat conduction core and fin further, heat-conducting cream should be coated in cylinder or hole, such as silicone grease.
Although the heat conductivity of aluminum is not so good as copper, but the price of aluminum is low, it is easier to shape, and such as adopts hot pressing note technique, produces aluminum heat conduction core, and efficiency high cost is low; Again owing to the heat flow density in heat conduction core is lowered, thus considering from cost, heat conduction core is preferably with aluminum.
Shown in Fig. 1, only a piece of thermal diffusion sheet 2, there is several wafer 1 that (welding) is set on thermal diffusion sheet 2, thermal diffusion sheet 2 is attached to the end face of heat conduction core 6 by high-voltage insulation layer 4, this end face will be referred to as heat-absorbent surface, the relative other end, that end being namely provided with screw 5 is called heat conduction core rear end. That face being close to the thermal diffusion sheet of heat conduction core heat-absorbent surface is called the B face of thermal diffusion sheet, and that face arranging wafer is called the A face of thermal diffusion sheet.
Adopt potsherd as high-voltage insulation layer, have problems with: one, potsherd processing cost is not low, frangible; Two, there is the interface contact heat resistance problem between potsherd and thermal diffusion sheet and heat conduction core, if adopting welding procedure, efficiency is low, and cost is high. If employing adhesion process, then thermal contact resistance is high. Adopt anode oxidation process, directly grow pellumina from the metallic aluminium heat conduction core or thermal diffusion sheet surface, as high-voltage insulation layer, then eliminate the thermal contact resistance problem at interface between high-voltage insulation layer and thermal diffusion sheet or heat conduction core. Anode oxidation process cost is low, and efficiency is high, is suitable for mass production. By the pellumina that anodic oxidation generates, having hole, hole is all unfavorable to heat conduction and insulation, should carry out sealing pores, such as with insullac or paraffin, it is preferred to adopt the materials such as the silicone grease that heat conductivity is high. Hard Anodic Oxidation Process and differential arc oxidation (also known as micro-plasma oxidation or anodic spark deposition) technique, the pellumina of generation more thickeies, and is more applicable for manufacture high-voltage insulation layer.
LED lamp shown in Fig. 2, heat conduction core 6 adopts threaded stud structure, is also adopted by monolithic thermal diffusion sheet structure equally, but wafer 1 concentrated setting (welding) is in the center of thermal diffusion sheet 2, and the A face of thermal diffusion sheet 2 is provided with low-voltage insulation layer 8. There is this insulating barrier; circuit and the pad corresponding with wafer and contact conductor just can be set on the A face of thermal diffusion sheet; and those auxiliary elements (such as antistatic protection element) just can be arranged on thermal diffusion sheet together with wafer; encapsulate together; such structure assembly degree is high, it is simple to downstream produces. Owing to the heat flow density of wafer is high, thus the thermal conduction resistance that reduces this insulating barrier is particularly important, dielectric strength is unimportant, without necessarily achieving Electrical Safety code requirement, as long as reaching the peak of applied voltage, 220V civil power crest voltage can reach 380V, that is, it is just passable that this insulating barrier dielectric strength is up to 450V, and this is low-voltage insulation, then this insulating barrier is called low-voltage insulation layer.
Adopt the ceramic membrane that gas-phase deposition generates, such as diamond, SiC, AlN, BN, BeO, Al2O3Deng ceramic membrane, densification, good insulating, heat conductivity height, particularly diamond, SiC, AlN, BN, BeO are high thermal conduc tivity ceramics, cannot be only used for the low-voltage insulation layer on the thermal diffusion sheet A face in the present invention, by the ceramic insulating film on the wafer of elaboration after being more applicable for. Gas-phase deposition includes physical vapour deposition (PVD) (PVD) and chemical vapour deposition (CVD) (VCD), and both technique can be used in manufacturing the low-voltage insulation layer in the present invention.
Although the ceramic membrane that gas-phase deposition generates, fine and close, heat conductivity height, high thermal conduc tivity ceramics film can also be generated, but the thickness of ceramic membrane thin (several microns), cost is high, particularly obtaining the ceramic membrane (film thickness to reach more than 10 ��m) of pressure upper hectovolt, cost is just higher. The manufacture of the low-voltage insulation layer that alumilite process technique is equally applicable in the present invention thermal diffusion sheet A face, although the height that the heat conductivity of the pellumina generated manufactures not as gas-phase deposition, but cost is low, it is easy to obtaining thicker film, dielectric strength reaches more than 100V. During design, the aluminum oxide film thickness of low-voltage insulation layer should be less than 50 ��m, controls the thermal conduction resistance at this place.
Although copper is more expensive than aluminum, more difficult machine-shaping, but owing to thermal diffusion sheet material usage is considerably less, profile simple (lamellar), easy to manufacture, it is often more important that the heat flow density of wafer is high, then high conductivity material is more important, thus first thermal diffusion sheet should select copper. Want, at the copper anodised alumina insulating layer of thermal diffusion sheet Surface Creation, just to adopt copper aluminum composite material, be covered with one layer of aluminum on copper coin surface. Aluminum layer thickness on thermal diffusion sheet A face is thin, as long as its thickness is enough in the aluminum thickness needed for anodic oxidation.
LED lamp a kind of of the present invention shown in Fig. 3, heat conduction core 6 adopts taper bolt structure, and also it is furnished with lampshade 12, draw wire 9 traverse heat conduction core 6, draw from the rear end of heat conduction core, the attachment structure of such electricity, not only compact conformation, it is easy to assembling, and the waterproof insulation easily realizing wick high request seals. As shown in FIG., in heat conduction core rear end, drawing wire 9 extraction place, be provided with sealing 10, realize easily drawing wire 9 extraction place, reliable waterproof insulation seals. The waterproof insulation of the front end of wick is sealed then to be processed by lampshade 12 and embedding fluid sealant and realizes. Waterproof insulation is for outdoor electric appliance, such as street lamp, extremely important. Lampshade 12 not only plays wick waterproof insulation effect, also acts as the effects such as optic reflection, optically focused.
In Fig. 3, every wafer is furnished with a thermal diffusion sheet, is namely many LED chip structure, and high-voltage insulation layer 4 is not only provided with on heat conduction core heat-absorbent surface, and also has on the B face of thermal diffusion sheet, thus single LEDs chip has High-Voltage Insulation characteristic. Such structure, is particularly suitable for adopting anode oxidation process to generate alumina insulating layer, such as, realize dielectric strength and reach proof voltage 2 kilovolts, the thickness of pellumina will reach 200 ��m, adopt one side growth, and difficulty is big, if being divided into two sides, growing respectively, each 100 �� m-thick, difficulty is reduced by, and consistency is higher, heat conductivity is also better. Having pcb board 11 shown in figure, LED chip is inlaid in pcb board 11, just can be arranged on pcb board 11 by the auxiliary circuit of LED chip, draws wire 9 and is also welded to connect with the circuit on pcb board 11.
Wick in Fig. 3 and outer power supply source are connected by lead type, may be used without terminals minor or contact or tactile disk formula, binding post or contact (tactile disk) are arranged on heat conduction core rear end, connect electric wire (drawing wire 9) through heat conduction core, ensconce in heat conduction core in namely. LED lamp shown in Fig. 4 just have employed contact structure, and the contact 13 on wick contacts with the spring contact 14 being fixed on fin 3, the same as existing bulb.
By adopting special Calculation of Heat Transfer software, nine 1 �� 1mm of calculating simulation, the wafer of heating 1W, the conduction heat transfer process in a fin, draw: junction temperature when nine wafers concentrate in together, than dispersed placement (when mutual spacing reaches 5mm), will exceed nearly 5 DEG C more than. Also can analyze draw from heat transfer ABC, for reducing thermal conduction resistance, LED wafer on thermal diffusion sheet or the LED chip that forms of wafer and thermal diffusion sheet in heat conduction core, should dispersed placement as far as possible, the power of single wafer is little as far as possible, and quantity is many as far as possible. Fig. 5 is 6 wafers dispersed placement figure on a thermal diffusion sheet. Fig. 6 illustrates, four LEDs chips dispersed placement in heat conduction core 6, has the wafer set that three wafers are constituted in every chips. In actual design is applied, there are many wafers must in groups together, inseparable situation, has three wafers to separate in such as three color base White-light LED chips. When designing LED lamp, the quantity of wafer or wafer set is many as far as possible, minimum can not less than three or three groups, but quantity can cause that production cost increases too much; The power of single wafer is little as far as possible, and peak power not should be greater than 4W, but single too little chip power, just meaning number of wafers increases, it would be possible to cause that cost increases. Fig. 5, wafer in 6 or wafer set (chip) are all radially scattered, and dispersed placement, it is the most reasonable that such radial dispersion is arranged.
LED lamp shown in Fig. 7, through in the middle part of heat conduction core 6, and it is provided with radiated rib 7, such structure designs for great power LED wick, because wick power is big, wafer or number of chips are many, dispersed placement of radially scattering again, thus heat conduction core external diameter is big especially, core is vacant, is just utilized to arrange radiated rib 7, increases area of dissipation, not only reduce whole fin volume, also help minimizing heat transmission aluminum.
LED chip in Fig. 3,4,7, is provided with high-voltage insulation layer 4 in the B face of thermal diffusion sheet 2, if to generate this high-voltage insulation layer by alumilite process, thermal diffusion sheet 2 just should adopt aluminum or copper aluminum composite material, it is desirable to select copper aluminum composite material. Wafer welding is attached on thermal diffusion sheet, can effectively solve the problem that the heat conduction temperature difference that high heat flux causes is high, but must assure that enough welding contacts area. It is considered herein that the chip area that contact area should be not less than 1/3rd that welds between wafer with thermal diffusion sheet, the area of same thermal diffusion sheet should be greater than the chip area of 5 times (preferably choosing is not less than 10 times), and thickness is not less than 0.5mm.
LED chip shown in Fig. 8, pn-junction electrode is L contact (Laterial-Contact, flat contact), and referred to as L-type electrode, the LED wafer of silicon carbide substrates is suitable for adopting such electrode type. Because SiC can pass through to be doped to conductor, silicon carbide substrates just can as n junction electrode, and substrate 15 outer surface is provided with thermal land 16, namely n pole pad, now welds contact area between area i.e. wafer 1 with the thermal diffusion sheet 2 of thermal land. The A face of the thermal diffusion sheet 2 in Fig. 8 is provided with low-voltage insulation layer 8, can pass through vapour deposition or alumilite process prepares, and should have corresponding thermal land (namely n pole lead pad) and n pole lead-in wire on low-voltage insulation layer 8 surface. LED chip shown in Fig. 9 is similar with shown in Fig. 8, main difference: in Fig. 9, the metal solder directly and on thermal diffusion sheet 2 of the thermal land 16 on substrate 15, the B face of thermal diffusion sheet 2 is provided with high-voltage insulation layer 4, can pass through alumilite process and prepare.
LED chip shown in Figure 10, pn-junction electrode is V contact (Vertical-Contact, perpendicular contact), is called for short V-type electrode, and adopts inverted structure, and also referred to as flip chip structure, the LED wafer of Sapphire Substrate is suitable for adopting such electrode type. Shown in figure, thermal land 16 directly welds with the metal surface of thermal diffusion sheet 2, and thermal land 16 connects with p junction electrode 20, and thermal land 16 is p pole pad namely, has the ceramic insulating film 21 generated by vapour deposition between thermal land 16 and p junction electrode 20. Thermal diffusion sheet 2 namely p pole goes between, and the p pole pin of chip can adopt directly and thermal diffusion sheet 2 weldering connects. The B face of thermal diffusion sheet 2 is provided with high-voltage insulation layer 4, it is possible to generated by alumilite process. The A face of thermal diffusion sheet 2 be provided with n pole lead-in wire 18, and be separated with contact conductor insulating barrier 19, n pole lead-in wire 18 on have pad, directly weld with the n pole pad 17 on wafer 1. Contact area of welding between wafer 1 with thermal diffusion sheet 2 includes the area of thermal land 16 and the area of n pole pad, if the area of thermal land 16 is sufficiently large, the thermal conduction resistance problem of contact conductor insulating barrier 19 is just inessential. From Figure 11,12 can be seen that, n junction electrode 22 and part p junction electrode 20 are covered by ceramic insulating film 21, thermal land 16 is in the outside of this ceramic insulating film 21, the purpose adopting such ceramic insulation membrane structure is to increase the area of thermal land as far as possible, namely welds contact area between wafer with thermal diffusion sheet.
LED chip shown in Figure 13 is similar with shown in Figure 10, V-type electrode, inverted structure, difference has: n junction electrode 22 and p junction electrode 20 (except pad) are all covered by ceramic insulating film 21, thermal land 16 and p pole pad 23 separate, separate with two electrode insulations, referring to Figure 14 and Figure 15. The A face of thermal diffusion sheet 2 is additionally provided with p pole lead-in wire 24, and is separated with contact conductor insulating barrier 19.
LED wafer big for 1 �� 1mm just belongs to large-sized wafer, so little area arranges electrode pad and thermal land, such as Figure 11, shown in 14, the size of electrode pad generally little to diameter be 0.1mm, must not must assure that again and short circuit welding occurs, thus wafer requires height with thermal diffusion sheet aligning accuracy. Generally all adopting eutectic to weld, heat time heating time just needs several seconds, if adopting one one ground para-position, reheating welding, equipment needed thereby does not require nothing more than height, costliness, and production efficiency is also non-normally low. High-power LED chip package, inefficiency, cost is high, is also a big problem in current LED industry.
The present invention proposes a kind of method adopting wafer orientation plate, solve problem above, such as Figure 16, shown in 17, a wafer orientation plate 25 has the embedding mouth of wafer orientation that number is many, wafer 1 is embedded in the embedding mouth of wafer orientation, wafer orientation plate 25 also have location hole 26, it is illustrated that have 6 location hole 26, during design location hole is minimum must not less than two. Adopting clicking technique locating and machining hole 26 and the embedding mouth of wafer orientation, not only precision is high, and equipment is simple, and efficiency is also high. Thermal diffusion sheet 27 has and positions hole accordingly, and with this hole, location, benchmark is provided with the pad corresponding with on wafer. The position of wafer is determined by the embedding mouth of the wafer orientation on wafer orientation plate 25, wafer orientation plate 25 and thermal diffusion sheet 27 para-position are determined by positioning hole 26, thus ensure that the pad para-position that the pad on each wafer is corresponding with in thermal diffusion sheet is accurate, entirety adds thermal weld together again, once complete several many wafers welding (having 55 in figure), this method not only efficiency is high, and equipment is simple again. When adding thermal weld, it is necessary to pressurization, wafer stress is made to be attached on thermal diffusion sheet, it is ensured that welding quality. Owing to wafer is to be embedded in the embedding mouth of wafer orientation, it is easy to do not shift when ensureing pressurization. This operation has two kinds: one, wafer 1 is first inlayed and is fixed in wafer orientation plate 25, positions by positioning hole 26, then is attached in thermal diffusion sheet 27 together, and another rising is heated, and carries out the welding sequence of wafer and thermal diffusion sheet; Two, wafer orientation plate 25, positions by positioning hole 26, and first patch is fixed in thermal diffusion sheet 27, then is mounted to by wafer 1 in the embedding mouth of wafer orientation, and another rising is heated, and carries out the welding sequence of wafer and thermal diffusion sheet. After having welded, wafer orientation plate can be removed, it is also possible to retains, such as Figure 19, shown in 20, the wafer orientation plate that slitting is stayed in LED chip is known as wafer orientation sheet 28, now, wafer orientation sheet should adopt insulant, can adopt resistant to elevated temperatures polyester diaphragm.
Adopt above method, not only make wafer and thermal diffusion sheet para-position is accurate, welding efficiency is high, equipment is simple, and improves highly beneficial to later process efficiency, such as: after completing the welding of wafer and thermal diffusion sheet, a big plate first cuts into a rule, i.e. wafer and thermal diffusion sheet arrayed in columns, the terminal pins of chip is also machined to corresponding arrangement, so can a wielding neck, a para-position can irrigate sealing again, cut into the LED chip of many afterwards again.
Figure 18 illustrates, adopts present invention process presented above, the method producing the LED chip of the single thermal diffusion sheet multi-wafer structure shown in Fig. 5. The wafer orientation plate of big and thermal diffusion plate, adopt clicking technique, processes the wafer orientation sheet and thermal diffusion sheet that are in a row connected, after the operations such as wielding neck and perfusion sealing complete, then cuts off connected component, becomes the LED chip of many.
Figure 19 illustrates the LED chip of a kind of carry wafer spacer, is provided with contact conductor and pad (or circuit) on wafer orientation sheet 28. Wafer in figure adopts L-type electrode, thermal land 16 is n pole pad namely, n pole lead-in wire 18 is drawn through wafer orientation sheet 28 from above, and wafer orientation sheet 28 is provided above with p pole lead-in wire 24, and the p pole pad 23 on wafer welds connection with the pad on p pole lead-in wire 24 by wire 29. LED chip shown in Figure 20, electrode pad (p pole pad 23) on wafer is against the edge (being preferably disposed on angle) of wafer, the pad on contact conductor (p pole lead-in wire 24) on wafer orientation sheet 28 nestles up pad (p pole pad 23) corresponding on wafer, directly with solder 30 (such as stannum) by two electrode pad welding connections.
The LED chip of the carry wafer spacer shown in Figure 21, adopt V-type electrode, inverted structure, the A face of thermal diffusion sheet 2 is provided with low-voltage insulation layer 8, B face is provided with high-voltage insulation layer 4, low-voltage insulation layer 8 is provided with contact conductor (lead-in wire 18, p pole, n pole lead-in wire is not shown) and thermal land (being also p pole lead pad). Shown in Figure 22, LED chip is similar with Figure 21, V-type electrode and inverted structure, visibly different: n pole pad 17 is arranged on the sidewall of wafer, two pad solder are directly connected by the pad of the n pole lead-in wire 18 on wafer orientation sheet 28 pad (n pole pad 17) on wafer sidewall by solder 30.
LED chip shown in Figure 23 and Figure 24, wafer corner is cut, and lacks in quadrant, and n pole pad 17 and p pole pad 23 on wafer are just arranged in the sidewall of four unfilled corners, and to angular distribution; Ceramic insulating film 21 is by the one of wafer whole covering, and thermal land 16 and two electrode insulations separate, and thermal diffusion sheet 2 is simple metal plate, and thermal land on wafer 16 is directly and the metal solder of thermal diffusion sheet 2. Such structure is conducive to increasing thermal land area (welding contact area), reduces aligning accuracy requirement.
Figure 11,14,24 illustrate, electrode pad is all disposed within angle, certainly may also be arranged on the edge near wafer, but are more beneficial for making full use of chip area on angle, it is thus achieved that more luminous zone. N pole shown in Figure 14 and Figure 24 and p pole pad are all on angle, and are diagonally distributed, and wafer is rectangle, and such structure desirably prevents two kinds of electrode pad para-positions and makes mistakes.
For improving light emission rate, reflective membrane should be provided with at wafer orientation sheet outer surface, will be reflected to the light on wafer orientation sheet surface, then reflect away.
Claims (7)
1. a LED lamp, includes: heat conduction core (6), high-voltage insulation layer (4), thermal diffusion sheet (2) and wafer (1), and thermal diffusion sheet (2) is a kind of sheet metal including following four feature,
(1) thermal diffusion sheet (2) stock is copper or aluminum, or copper aluminum composite material,
(2) area of thermal diffusion sheet (2) chip area more than 5 times,
(3) thermal diffusion sheet (2) includes A face, and wafer (1) is placed directly against this A face, or
This A face is provided directly with low-voltage insulation layer (8), wafer (1) is placed directly against on this low-voltage insulation layer (8), this low-voltage insulation layer (8) is to have employed the ceramic insulating film generated by vapour deposition, or by pellumina that anodic oxidation directly grows from the metallic aluminum surface thermal diffusion sheet (2), the thickness of this pellumina is less than 50 ��m
(4) thermal diffusion sheet (2) includes B face, and high-voltage insulation layer (4) is placed directly against on this B face, and high-voltage insulation layer (4) is a kind of insulating barrier including following two feature,
(1) thickness of high-voltage insulation layer (4) is more than 0.1mm,
(2) one side of high-voltage insulation layer (4) is placed directly against the B face of thermal diffusion sheet (2), and another side is placed directly against the heat-absorbent surface of heat conduction core (6),
It is characterized in that: heat conduction core (6) have employed aluminum or copper; The transmission of heat by contact face of heat conduction core (6) outwards heat transfer have employed circular cone rod structure or taper bolt structure.
2. LED lamp according to claim 1, it is characterised in that: the thickness of thermal diffusion sheet (2) is not less than 0.5mm, and thermal diffusion sheet (2) area is not less than the chip area of 10 times.
3. LED lamp according to claim 1 and 2, it is characterised in that: draw wire (9) from heat conduction core (6) interior traverse, stretch out in heat conduction core rear end, or
Electrical terminals or contact or tactile disk it is provided with in the rear end of heat conduction core.
4. a LED chip, includes wafer (1), high-voltage insulation layer (4) and thermal diffusion sheet (2), it is characterised in that: thermal diffusion sheet (2) is a kind of sheet metal including following four feature,
(1) thermal diffusion sheet (2) stock is copper or aluminum, or copper aluminum composite material,
(2) area of thermal diffusion sheet (2) chip area more than 5 times,
(3) thermal diffusion sheet (2) includes A face, and wafer (1) is placed directly against this A face, or
This A face is provided directly with low-voltage insulation layer (8), wafer (1) is placed directly against on this low-voltage insulation layer (8), this low-voltage insulation layer (8) is to have employed the ceramic insulating film generated by vapour deposition, or by pellumina that anodic oxidation directly grows from the metallic aluminum surface thermal diffusion sheet (2), the thickness of this pellumina is less than 50 ��m
(4) thermal diffusion sheet (2) includes B face, and high-voltage insulation layer (4) is directly posted in this B face, and high-voltage insulation layer (4) is a kind of insulating barrier including following two feature,
(1) thickness of high-voltage insulation layer (4) is more than 0.1mm,
(2) high-voltage insulation layer (4) is placed directly against the B face of thermal diffusion sheet (2).
5. LED chip according to claim 4, it is characterised in that: thermal diffusion sheet (2) area is not less than the chip area of 10 times.
6. the LED chip according to claim 4 or 5, it is characterised in that: thermal diffusion sheet (2) thickness is not less than 0.5mm.
7. the LED chip according to claim 4 or 5, it is characterised in that: the pn-junction electrode of wafer (1) is V-type electrode, and LED chip adopts inverted structure; Wafer (1) is provided with thermal land (16), and weldering is attached to the A face of thermal diffusion sheet (2), welds, between wafer (1) with thermal diffusion sheet (2), the chip area that contact area is not less than 1/3rd; N junction electrode (22) on wafer and p junction electrode (20), or n junction electrode (22) on wafer and part p junction electrode (20), the ceramic insulating film (21) generated by vapour deposition by one layer is covered, and thermal land (16) is in the outside of this ceramic insulating film (21).
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| CN201297587Y (en) * | 2009-02-24 | 2009-08-26 | 上海彩煌光电科技有限公司 | LED light fixture with high heat dissipation performance |
| CN101614333A (en) * | 2009-03-23 | 2009-12-30 | 广州南科集成电子有限公司 | High-efficiency radiating LED illumination light source and manufacture method |
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| CN201297587Y (en) * | 2009-02-24 | 2009-08-26 | 上海彩煌光电科技有限公司 | LED light fixture with high heat dissipation performance |
| CN101614333A (en) * | 2009-03-23 | 2009-12-30 | 广州南科集成电子有限公司 | High-efficiency radiating LED illumination light source and manufacture method |
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