CN101949990B - IC pin open short circuit test method - Google Patents
IC pin open short circuit test method Download PDFInfo
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- CN101949990B CN101949990B CN201010289454A CN201010289454A CN101949990B CN 101949990 B CN101949990 B CN 101949990B CN 201010289454 A CN201010289454 A CN 201010289454A CN 201010289454 A CN201010289454 A CN 201010289454A CN 101949990 B CN101949990 B CN 101949990B
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Abstract
The invention relates to an IC (Integrated Circuit) pin open short circuit test method. The method comprises the following steps of: selecting any pin of an IC chip to be tested and supposing that the pin is a pin VDD, and selecting any more than two pins from the other pins as the comparison pins; grounding the supposed pin VDD or connecting the supposed pin VDD with 0V voltage, and respectively providing a constant current to the comparison pins; detecting the voltage of each comparison pin, determining that the supposed pin VDD is a real pin VDD if the voltage value of one comparison pin is 0.3-1.3V, but not vice versa; and repeating the steps till all the real pins VDD are detected if the supposed pin VDD is not a real pin VDD. The detection method of a pin VSS is similar to the test method of the invention. After all the pins VDD and all the pins VSS are detected, an open short circuit characteristic test is performed to the other pins on the IC chip to be tested. The invention is simple and easy to operate, accurate and effective, low in cost, and widely suitable for complex integrated circuits.
Description
Technical field
The present invention relates to be applied in a kind of IC pin open-short circuit method in fields such as IC package detection, IC nude film binding detection.
Background technology
Open-short circuit (open_short_test; Claim continuity test or contact test again) be whether a kind of each pin of finding chip very fast connects normal and the method for missing bond wires (bind and lost efficacy) whether when Chip Packaging; When it can also find to test the contact whether good, whether probe or test bench have problem.
The test philosophy of open-short circuit is fairly simple, divides open_short_to_VDD test and open_short_to_VSS test.In general, each pin of chip is all released or holding circuit, two end to end diodes of equivalence, and one of which termination VDD, a termination VSS, signal come in from the contact of two diodes.
The open_short_to_VDD method of testing is generally: connect 0 volt (or ground connection) to the VDD pin of chip earlier; Supply with the electric current from the test machine to the chip for again each chip pin; Electric current can flow to VDD (0 volt) through the upper end diode, surveys the voltage of pin then, about 0.7 volt of the deviation voltage that normal value should be a diode; Generally establish and be limited to 1.3 volts, be limited to 0.3 volt down.And the principle of open_short_to_VSS method of testing is basic identical, is equally earlier to connect 0 volt (or ground connection) to VSS, and then gives the electric current of a chip to test; Diode flows to test machine to electric current through the lower end by VSS, surveys the voltage of pin then, and is same; About 0.7 volt of the deviation voltage that normal value should be a diode; Just voltage direction is opposite, and the upper limit generally still is 1.3 volts, is limited to 0.3 volt down.
Chip pin is opened short circuit when testing; General all is the pin characteristic that the product description that provides through the designer is understood chip; After confirming that wherein which pin is VDD and VSS, the pin that again all the other pins is carried out circuit is opened short-circuit characteristic measurement.But owing to the producer that is engaged in product circuit test foundry in the market is many; So cause the test macro developer of foundry producer and the product design personnel of chip design company often can not carry out effectively linking up timely and feedback; So that occur delaying relevant issues such as test program development or development and testing system imperfection, and then can't test chip timely and effectively.
Summary of the invention
The objective of the invention is to propose a kind of IC pin open-short circuit method, it need not the description of product, can test unknown IC chip effectively, thereby overcome deficiency of the prior art.
For realizing the foregoing invention purpose, the present invention has adopted following technical scheme:
A kind of IC pin open-short circuit method is characterized in that this method is:
(1) chooses arbitrary pin of IC chip to be tested, and suppose that this pin is VDD pin or VSS pin, and in all the other pins except that this pin, choose any two above pins as comparing pin;
(2), and steady current is provided respectively to above-mentioned relatively pin with above-mentioned supposition VDD pin or VSS pin ground connection or connect 0V voltage;
(3) detect each relatively voltage of pin; If wherein one relatively the magnitude of voltage of pin be+0.3～+ 1.3V or-1.3V～-0.3V; Then above-mentioned supposition VDD pin is that true VDD pin or above-mentioned supposition VSS pin are true VSS pin, otherwise then is not true VDD pin or true VSS pin;
(4) if above-mentioned supposition VDD pin is not that true VDD pin or above-mentioned supposition VSS pin are not true VSS pins; Then choose another pin arbitrarily as supposition VDD pin or supposition VSS pin; And in all the other pins except that this another pin, choose any two above pins as comparing pin, repeat the operation of above-mentioned steps (2)-(3);
(5) operation of repetition above-mentioned steps (1)-(4) is until detecting all true VDD pins or true VSS pin;
(6) investigate out all VDD pins and VSS pin after, all the other pins of treating on the test I C chip are opened short-circuit characteristic measurement.
Particularly:
In the step (1), selected comparison pin is 3～5.
Said steady current is 100uA～500uA.
Said steady current is provided by a constant current source; This constant current source comprises first resistance, second resistance, an electric capacity, first triode, second triode, a switching diode, a trifocal shunt regulator tube, a load and the 3rd resistance; First resistance, second resistance and electric capacity one termination power; The base stage of another termination first triode of electric capacity; The emitter of another termination second triode of first resistance, another termination switching diode anode of second resistance, the negative electrode of this switching diode is connected with the collector of first triode and the base stage of second triode; The collector of second triode connects the negative electrode of trifocal shunt regulator tube; The emitter of first triode is connected with the reference edge of trifocal shunt regulator tube with the 3rd resistance one end, and the anode of trifocal shunt regulator tube is connected the other end ground connection of load with an end, the 3rd resistance other end of load.
Compared with prior art; Advantage of the present invention is: for the IC chip an of the unknown; When it opens short circuit curve when the needs test; Need not link up fully and judge VDD and VSS pin, and can directly carry out the investigation of VDD and VSS pin according to method of the present invention and remaining chip pin is carried out open-short circuit by mat conventionally test equipment, and need not to make special-purpose testing apparatus (like the DUT plate) and software through product description or with the designer; Thereby improved testing efficiency, accuracy greatly, and effectively practiced thrift the test maintaining cost.Be accompanied by development of semiconductor, at integrate circuit function from strength to strength, its pin is more and more, and under the situation such as become increasingly complex, the present invention will obtain using more widely.
Description of drawings
A kind of constant current source structural representation that Fig. 1 is in the specific embodiment of the invention to be applied to;
The structural representation of a kind of unknown IC chip that Fig. 2 is in the specific embodiment of the invention to be tested.
Embodiment
Below in conjunction with an accompanying drawing and a preferred embodiment technical scheme of the present invention is further described.
Suppose to have the IC chip (like Fig. 2) an of the unknown, when the pin of not knowing it distributes, can accurately investigate out VDD pin and VSS pin, and test the short circuit curve of opening of remaining chip pin through following method:
Step 1 provides a constant current source:
(structure is as shown in Figure 1 to be comprised: two 1K resistance R 2 to adopt TL431 and some related devices to form a constant-current source circuit; The capacitor C 1 of a 0.1uF; Two triode models are respectively 9013 and 9015; A switching diode 1N4148, a trifocal shunt regulator tube UA431, load RX and regulate the resistance R 1 of size of current); And with it steady current that 100uA～500uA is provided (size of constant current value can be regulated according to actual needs, in general electric current I=2*2.5/R1);
Step 2, confirm the VDD pin and the VSS pin of chip:
1. the judgement of VDD pin:
Suppose that at first the Pin1 pin is the VDD pin; Selected more any some pin such as the Pin2～Pin5 pin except that the Pin1 pin tested respectively these several pins that compare according to the method for testing of open_hort_to_VDD as pin (relatively the quantity of pin can be decided according to actual needs, and generally 3-5 pin gets final product) relatively; As long as about the deviation voltage 0.7V that any magnitude of voltage that pin fed back is a diode in Pin2～Pin5 pin (upper limit 1.3V, lower limit 0.3V); Think that then the Pin1 pin is the VDD pin, otherwise then be not the VDD pin, and the like; Suppose Pin2 respectively; Pin3 ... Pin20 is the VDD pin, judges successively according to the method described above, confirms that finally which pin is the VDD pin.
2. the judgement of VSS pin:
Determination methods principle with the VDD pin is identical, supposes that at first the Pin1 pin is the VSS pin, and (can decide according to actual needs by the quantity of comparison pin as the comparison pin for selected more any some pin such as the Pin2～Pin5 pin except that the Pin1 pin; General 3-5 pin get final product), according to the method for testing of open_short_to_VSS these several relatively pins are tested respectively, need only any magnitude of voltage that pin fed back is a diode in Pin2～Pin5 pin deviation voltage about 0.7V (voltage direction and above-mentioned VDD pin on the contrary; Upper limit 1.3V, lower limit 0.3V), think that then the Pin1 pin is the VSS pin; Otherwise then not the VDD pin; And the like, suppose Pin2 respectively, Pin3 ... Pin20 is the VSS pin; Judge successively according to the method described above, confirm that finally which pin is the VSS pin.
Step 3: the short circuit curve of opening of testing all the other pins:
After judging VDD pin and VSS pin according to the method described above, all the other pins are opened short-circuit characteristic measurement.
Adopt method of the present invention; Need not to confirm that in advance those pins are VDD and VSS, and directly can carry out the investigation of VDD and VSS pin, and remaining pin is carried out open-short circuit; Be applicable to the IC chip that needs test pin to open short circuit curve arbitrarily; Precise and high efficiency, with low cost, be suitable in the integrated circuit of complicacy, using.
The foregoing description is merely explanation technical conceive of the present invention and characteristics, and its purpose is to let the personage who is familiar with this technology can understand content of the present invention and enforcement according to this, can not limit protection scope of the present invention with this.All equivalences that spirit is done according to the present invention change or modify, and all should be encompassed within protection scope of the present invention.
Claims (3)
1. IC pin open-short circuit method is characterized in that this method is:
(1) chooses arbitrary pin of IC chip to be tested, and suppose that this pin is VDD pin or VSS pin, and in all the other pins except that this pin, choose any two above pins as comparing pin;
(2), and the steady current of 100uA～500uA is provided to above-mentioned relatively pin with above-mentioned supposition VDD pin or VSS pin ground connection or connect 0V voltage;
(3) detect each relatively voltage of pin; If wherein one relatively the magnitude of voltage of pin be+0.3～+ 1.3V or-1.3V～-0.3V; Then above-mentioned supposition VDD pin is that true VDD pin or above-mentioned supposition VSS pin are true VSS pin, otherwise then is not true VDD pin or true VSS pin;
(4) if above-mentioned supposition VDD pin is not that true VDD pin or above-mentioned supposition VSS pin are not true VSS pins; Then choose another pin arbitrarily as supposition VDD pin or supposition VSS pin; And in all the other pins except that this another pin, choose any two above pins as comparing pin, repeat the operation of above-mentioned steps (2)-(3);
(5) operation of repetition above-mentioned steps (1)-(4) is until detecting all true VDD pins or true VSS pin;
(6) investigate out all VDD pins and VSS pin after, all the other pins of treating on the test I C chip are opened short-circuit characteristic measurement.
2. IC pin open-short circuit method according to claim 1 is characterized in that in the step (1), selected comparison pin is 3～5.
3. IC pin open-short circuit method according to claim 1; It is characterized in that; Said steady current is provided by a constant current source, and this constant current source comprises first resistance, second resistance, an electric capacity, first triode, second triode, a switching diode, a trifocal shunt regulator tube, a load and the 3rd resistance, first resistance, second resistance and electric capacity one termination power; The base stage of another termination first triode of electric capacity; The emitter of another termination second triode of first resistance, another termination switching diode anode of second resistance, the negative electrode of this switching diode is connected with the collector of first triode and the base stage of second triode; The collector of second triode connects the negative electrode of trifocal shunt regulator tube; The emitter of first triode is connected with the reference edge of trifocal shunt regulator tube with the 3rd resistance one end, and the anode of trifocal shunt regulator tube is connected the other end ground connection of load with an end, the 3rd resistance other end of load.
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| CN201010289454A CN101949990B (en) | 2010-09-25 | 2010-09-25 | IC pin open short circuit test method |
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| CN201010289454A CN101949990B (en) | 2010-09-25 | 2010-09-25 | IC pin open short circuit test method |
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| CN101949990A CN101949990A (en) | 2011-01-19 |
| CN101949990B true CN101949990B (en) | 2012-10-03 |
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| CN103582824B (en) * | 2011-05-27 | 2016-08-17 | 飞思卡尔半导体公司 | Ground connection is lost supervisory circuit and includes its integrated circuit |
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| CN103698654B (en) * | 2013-12-28 | 2016-08-17 | 珠海全志科技股份有限公司 | The open circuit short-circuit test device of chip pin and method of testing |
| CN104811173B (en) * | 2015-02-25 | 2018-10-12 | 雅安小航电器有限责任公司 | Simple driving circuit with load short circuits protection and self-recovering function |
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| CN105866656B (en) * | 2016-03-17 | 2018-10-02 | 杭州长川科技股份有限公司 | A kind of control module circuit for more pin chip open-short circuits |
| CN105699880B (en) * | 2016-03-23 | 2018-06-08 | 瑞萨集成电路设计(北京)有限公司 | The open test method of AVSS pins and VSS pins |
| CN105911459A (en) * | 2016-07-05 | 2016-08-31 | 江苏奥雷光电有限公司 | Method for detecting TO tube insert direction |
| CN106771823A (en) * | 2017-02-06 | 2017-05-31 | 湖北三赢兴电子科技有限公司 | Camera module open-short circuit device, system |
| CN107064712B (en) * | 2017-03-14 | 2020-04-10 | 南京矽力杰半导体技术有限公司 | Short circuit detection method, short circuit detection circuit and D-class audio amplifier |
| CN106959719A (en) * | 2017-04-13 | 2017-07-18 | 成都卡诺源科技有限公司 | A kind of high-precision constant flow source circuit |
| CN109597780B (en) * | 2018-12-03 | 2021-06-04 | 华显光电技术（惠州）有限公司 | Chip signal line structure |
| CN112578254A (en) * | 2020-12-08 | 2021-03-30 | 葛正宏 | double-MOS tube testing method |
| CN112462243B (en) * | 2021-02-01 | 2021-04-27 | 南京宏泰半导体科技有限公司 | Automatic programming method of open-short circuit test system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1632605A (en) * | 2003-12-22 | 2005-06-29 | 威宇科技测试封装有限公司 | Chip pin open circuit and short circuit tester and method therefor |
| CN1831548A (en) * | 2005-03-12 | 2006-09-13 | 鸿富锦精密工业（深圳）有限公司 | Line open-short circuit tester |
| CN201096869Y (en) * | 2007-10-23 | 2008-08-06 | 苏州市华芯微电子有限公司 | Chip test circuit system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20030033576A1 (en) * | 2001-05-25 | 2003-02-13 | Mark Palmer | Functional pathway configuration at a system/IC interface |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1632605A (en) * | 2003-12-22 | 2005-06-29 | 威宇科技测试封装有限公司 | Chip pin open circuit and short circuit tester and method therefor |
| CN1831548A (en) * | 2005-03-12 | 2006-09-13 | 鸿富锦精密工业（深圳）有限公司 | Line open-short circuit tester |
| CN201096869Y (en) * | 2007-10-23 | 2008-08-06 | 苏州市华芯微电子有限公司 | Chip test circuit system |
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Application publication date: 20110119 Assignee: East Branch, China Electronic Product Reliability and Environmental Testing Research Institute,Mll Assignor: Suzhou Huaxin Microelectronics Co., Ltd. Contract record no.: 2018110000030 Denomination of invention: IC pin open short circuit test method Granted publication date: 20121003 License type: Exclusive License Record date: 20180503 |
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Granted publication date: 20121003 Termination date: 20200925 |