CN101937929A - Deep groove super PN junction structure and formation method thereof - Google Patents
Deep groove super PN junction structure and formation method thereof Download PDFInfo
- Publication number
- CN101937929A CN101937929A CN2009100542610A CN200910054261A CN101937929A CN 101937929 A CN101937929 A CN 101937929A CN 2009100542610 A CN2009100542610 A CN 2009100542610A CN 200910054261 A CN200910054261 A CN 200910054261A CN 101937929 A CN101937929 A CN 101937929A
- Authority
- CN
- China
- Prior art keywords
- deep trench
- junction
- super
- polysilicon
- oxide layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The embodiment of the invention provides a deep groove super PN junction structure, which comprises a single thick epitaxial layer deposited on a substrate, a deep groove formed in the single thick epitaxial layer, a super PN junction formed in the deep groove along the direction of the deep groove, and an oxide layer and polycrystalline silicon filled in the deep groove, wherein the deep groove has characteristic dimension of 0.4mu-6mu, depth of 10mu-80mu and angle of 80 degrees-90 degrees, and the super PN junction is formed by heavily-doped polycrystalline silicon. By the embodiment of the invention, the deep groove super PN junction structure can effectively increase the breakdown voltage of a power MOS (Metal Oxide Semiconductor) transistor, also greatly reduce the on resistance of the power MOS transistor, and has simple technology and good process controllability. The deep groove super PN junction structure avoids the multiple photo-etching, ion implantation, boosting and epitaxial growth in the traditional Super Junction process, effectively reduces the production cost, and overcomes the disadvantages of uneven faying surfaces of the traditional Super Junction process.
Description
Technical field
The present invention relates to technical field of semiconductors,, relate to super PN junction structure of a kind of deep trench and forming method thereof with specifically.
Background technology
Power MOSFET is best device for power switching, with its input impedance height, low-loss, switching speed are fast, no second breakdown, the safety operation area is wide, dynamic property good, the coupling of the Yi Yuqian utmost point realizes that characteristics such as big electric currentization, conversion efficiency height are used to handle electric energy, comprises frequency translation, Power Conversion and control, DC/DC conversion etc.Though power MOS (Metal Oxide Semiconductor) device has obtained surprising raising on power handling capability, in the high pressure field,, make the conduction loss of MOS device rise rapidly with withstand voltage raising owing to conducting resistance Ron., reduction conduction loss withstand voltage in order to improve, a series of new construction, new technology are arisen at the historic moment.And wherein be used for improving the effect highly significant of super PN junction (Super Junction) technology of MOS performance in the high pressure field, attracted large quantities of device suppliers research and development of injecting capital into, successfully developed plane Cool MOS at present and dropped into commercial the application.But will be in traditional Super Junction preparation through repeatedly photoetching, ion injects, and advance and epitaxial growth, and traditional Super Junction has the uneven shortcoming in composition surface.
Fig. 1 is the structural representation of traditional Super Junction.With the 700V MOS is example, the N+ or P+ silicon substrate 101 back sides are as the drain electrode of MOS, and first epitaxial loayer 102, second epitaxial loayer 103, the 3rd epitaxial loayer 104, the 4th epitaxial loayer 105, the 5th epitaxial loayer 106, the 6th epitaxial loayer 107 deposit formation successively.Inject, advance the P+ or the N+ knot 109 that form to be connected to each other formation super PN junction (Super Junction) by photoetching, ion after the epitaxial growth each time, be used for the active area 108 of power MOS (Metal Oxide Semiconductor) device.Use structure that the technology of traditional Super Junction forms as shown in Figure 1, there are several epitaxial loayers that deposit formation successively to pile up the thicker epitaxial loayer of formation, the knot that a P+ or N+ are arranged in each epitaxial loayer, above-mentioned these knots are connected to each other and form super PN junction (Super Junction).But inevitably,, there is bending fluctuation, is unfavorable for charge balance at the interface place of knot and knot because each knot 109 is independent formation.
Summary of the invention
In order to overcome the complicated and structural shortcoming of flow process in traditional Super Junction technology, this patent has proposed the super PN junction of a kind of new deep slot type (Super Junction) structure and forming method thereof.
According to embodiments of the invention, the super PN junction structure of a kind of deep trench is proposed, comprising:
Be deposited on the single thick epitaxial layer on the substrate;
Be formed on the deep trench in the single thick epitaxial layer, the characteristic size of deep trench is 0.4 micron-6 microns, and the degree of depth is 10 microns-80 microns, and angle is 80 degree-90 degree;
Be formed on the super PN junction along the deep trench direction in the deep trench, super PN junction is heavily doped polysilicon;
Be filled in oxide layer and polysilicon in the deep trench.
In one embodiment, the junction depth of super PN junction is 0.2 micron-8 microns.
In one embodiment, substrate is N+ or P+ substrate; Heavily doped polysilicon attach most importance to doped P-type or N type polysilicon, the thickness of deposition is
Micron, and under 1000 ℃-1200 ℃ temperature, advance.
According to embodiments of the invention, the formation method of the super PN junction of a kind of deep trench is also proposed, comprising:
The single thick epitaxial layer of deposition on substrate;
The deep trench that forms in single thick epitaxial layer, the characteristic size of deep trench are 0.4 micron-6 microns, and the degree of depth is 10 microns-80 microns, and angle is 80 degree-90 degree;
In deep trench, advance heavily doped polysilicon to form super PN junction along the deep trench direction;
Filling oxide layer and polysilicon in deep trench.
In one embodiment, the junction depth of super PN junction is 0.2 micron-8 microns.
In one embodiment, be included in the single thick epitaxial layer of deposition on N+ or the P+ substrate at the single thick epitaxial layer of deposition on the substrate;
In one embodiment, the deep trench that forms in single thick epitaxial layer comprises growth
Thermal oxide layer; Deposition
Silicon nitride; Deposition
Plasma strengthens oxide layer; Photoetching, etching above three layers to substrate; Remove photoresist, and with above three layers as hard mask etching deep trench, and wet etching falls the remaining plasma of silicon nitride surface and strengthens oxide layer.
In one embodiment, advancing heavily doped polysilicon to form super PN junction along the deep trench direction in deep trench is included in the deep trench and deposits
Heavily doped P type or N type polysilicon; Advance 200 minutes down at 1150 ℃, form along deep trench direction junction depth; Will
Heavily doped P type or N type polysilicon complete oxidation.
In one embodiment, filling oxide layer and polysilicon comprise in deep trench: filling oxide layer and densification in deep trench; The oxide layer that etched portions is filled; In deep trench, fill polysilicon by rpcvd; Anti-carving by dry method, is the stop layer that dry method anti-carves with the silicon nitride, anti-carves the polysilicon above the silicon nitride; By hydrofluoric acid and hot phosphoric acid silica and silicon nitride are shelled entirely; Remove with the thermal oxide layer of hydrofluoric acid silicon face.
According to embodiments of the invention, this structure not only can improve the puncture voltage of power MOS pipe effectively, significantly reduce the conducting resistance of power MOS pipe, and technology is simple, and process controllability is good.This structure has been avoided the repeatedly photoetching in traditional Super Junction technology, and ion injects, and advances and epitaxial growth, effectively reduces manufacturing cost, and has overcome the uneven shortcoming in traditional Super Junction composition surface.
Description of drawings
The above and other features of the present invention, character and advantage will become more obvious by the description below in conjunction with drawings and Examples, in the accompanying drawings, identical Reference numeral is represented identical feature all the time, wherein:
Fig. 1 has disclosed the schematic diagram of the Super Junction structure that obtains according to traditional Super Junction technology;
Fig. 2 has disclosed the flow chart according to the formation method of the super PN junction of deep trench of the present invention;
Fig. 3-Fig. 6 has disclosed the technical process that forms an embodiment of the super PN junction of deep trench according to the solution of the present invention.
Embodiment
The present invention disclosed the super PN junction of a kind of novel deep slot type (Super Junction) with and forming method thereof.
The super PN junction structure of this deep trench comprises:
Be deposited on the single thick epitaxial layer on the substrate;
Be formed on the deep trench in the single thick epitaxial layer, the characteristic size of deep trench is 0.4 micron-6 microns, and the degree of depth is 10 microns-80 microns, and angle is 80 degree-90 degree;
Be formed on the super PN junction along the deep trench direction in the deep trench, super PN junction is heavily doped polysilicon;
Be filled in oxide layer and polysilicon in the deep trench.
The junction depth of this super PN junction is 0.2 micron-8 microns, and substrate is N+ or P+ substrate, heavily doped polysilicon attach most importance to doped P-type or N type polysilicon, and the thickness of deposition is
Micron, and under 1000 ℃-1200 ℃ temperature, advance.
With reference to shown in Figure 2, the formation method of the super PN junction of deep trench that the present invention proposes comprises:
S101. on substrate, deposit single thick epitaxial layer.For example, the single thick epitaxial layer of deposition on N+ or P+ substrate.
S102. the deep trench that in single thick epitaxial layer, forms, the characteristic size of deep trench is 0.4 micron-6 microns, and the degree of depth is 10 microns-80 microns, and angle is 80 degree-90 degree.This step specifically can comprise: growth
Thermal oxide layer; Deposition
Silicon nitride; Deposition
Plasma strengthens oxide layer; Photoetching, etching above three layers to substrate; Remove photoresist, and with above three layers as hard mask etching deep trench, and wet etching falls the remaining plasma of silicon nitride surface and strengthens oxide layer.
S103. in deep trench, advance heavily doped polysilicon to form super PN junction along the deep trench direction.The junction depth of this super PN junction is 0.2 micron-8 microns.This step specifically comprises: deposit in deep trench
Heavily doped P type or N type polysilicon; Advance 200 minutes down at 1150 ℃, form along deep trench direction junction depth; Will
Heavily doped P type or N type polysilicon complete oxidation.
S104. filling oxide layer and polysilicon in deep trench.This step specifically comprises: filling oxide layer and polysilicon comprise in deep trench: filling oxide layer and densification in deep trench; The oxide layer that etched portions is filled; In deep trench, fill polysilicon by rpcvd; Anti-carving by dry method, is the stop layer that dry method anti-carves with the silicon nitride, anti-carves the polysilicon above the silicon nitride; By hydrofluoric acid and hot phosphoric acid silica and silicon nitride are shelled entirely; Remove with the thermal oxide layer of hydrofluoric acid silicon face.
With reference to figure 3-Fig. 6, Fig. 3-Fig. 6 has disclosed the technical process that forms an embodiment of the super PN junction of deep trench according to the solution of the present invention.
Fig. 3 is the structural representation of the groove-shaped super PN junction (Super Junction) according to one embodiment of the invention.With the drain electrode of N+ or P+ silicon substrate 201 back sides as MOS.The single thick epitaxial layer 202 of deposition on N+ or P+ silicon substrate 201.In this single thick epitaxial layer 202, form deep trench 207.In this deep trench 207, form the super PN junction (Super Junction) 203 of P+ or N+.Filling oxide layer 204 and polysilicon 205 in deep trench are used for the active area 206 of power MOS (Metal Oxide Semiconductor) device.Super PN junction 203 is owing to be once-forming, but not a plurality of independent knot be combined into, so the plane is very evenly level and smooth, helps charge balance, thus can the boost device performance.The implementation method of structure of the present invention is simple, and process controllability is good.This structure has been avoided the repeatedly photoetching among traditional super PN junction (Super Junction) preparation technology, and ion injects, and advances and epitaxial growth, effectively reduces manufacturing cost, and has overcome the uneven shortcoming in traditional Super Junction composition surface.
The implementation method of a specific embodiment of the groove-shaped super PN junction of the present invention (Super Junction) structure following (is example with 700V super junction):
At first on substrate, deposit single thick epitaxial layer.For example, the single thick epitaxial layer of deposition on N+ or P+ substrate.On this single thick epitaxial layer, form deep trench afterwards.With reference to shown in Figure 4, be that 40 microns deep trench is an example to form the degree of depth: growth earlier
Thermal oxide layer, deposition then
Silicon nitride deposits at last again
Plasma strengthens oxide layer; Photoetching, the above three kinds of films of etching are to silicon substrate; Remove photoresist then, and with the deep trench of above three kinds of films as hard mask etching 40um, wet etching falls the remaining plasma enhancing of silicon nitride surface oxide layer then, forms structure as shown in Figure 4.
In deep trench, deposit in the deep trench such as above-mentioned 40um afterwards
Dense doped P-type polysilicon, advance 200 minutes at 1150 ℃ then, form P type junction depth along deep trench direction 2~3um; Then will
Dense doped P-type polysilicon complete oxidation, form structure as shown in Figure 5.As be noted that in other application form the used heavily doped polysilicon of super PN junction can attach most importance to doped P-type or N type polysilicon, the thickness of deposition is
Micron, and can under 1000 ℃-1200 ℃ temperature, advance.
Filling oxide layer and polysilicon comprise in deep trench afterwards, at first filling oxide layer (being filled in the super PN junction) and densification in deep trench; The oxide layer that etched portions is filled; In deep trench, fill polysilicon by rpcvd; Anti-carving by dry method, is the stop layer that dry method anti-carves with the silicon nitride, anti-carves the polysilicon above the silicon nitride; By hydrofluoric acid and hot phosphoric acid silica and silicon nitride are shelled entirely; Remove with the thermal oxide layer of hydrofluoric acid silicon face.Form structure as shown in Figure 5.
Through above-mentioned technology, the final structure that forms as shown in Figure 3.
Conclude, the groove-shaped super PN junction of the present invention has the following structures feature:
1) characteristic size of deep trench is at 0.4 micron~6 microns, and the degree of depth is at 10 microns~80 microns, and angle is at 80 degree~90 degree.
2) junction depth of super PN junction, extends along the gash depth direction for P+ or N+ type knot at 0.2 micron~8 microns.
3) have the deep trench of being filled in interior oxidation layer and polysilicon;
4) implementing process of P+ or N+ knot is as follows: deposit in the deep trench that remains with the hard mask of part
The P of micron thickness or the heavily doped polysilicon of N type advance down at 1000 ℃-1200 ℃ then, form along the uniform super PN junction of deep trench direction (Super Junction), then with the polysilicon complete oxidation of remainder.
Concrete data can be according to different devices and different in the above-mentioned processing step.
According to embodiments of the invention, this structure not only can improve the puncture voltage of power MOS pipe effectively, significantly reduce the conducting resistance of power MOS pipe, and technology is simple, and process controllability is good.This structure has been avoided the repeatedly photoetching in traditional Super Junction technology, and ion injects, and advances and epitaxial growth, effectively reduces manufacturing cost, and has overcome the uneven shortcoming in traditional Super Junction composition surface.
The foregoing description provides to being familiar with the person in the art and realizes or use of the present invention; those skilled in the art can be under the situation that does not break away from invention thought of the present invention; the foregoing description is made various modifications or variation; thereby protection scope of the present invention do not limit by the foregoing description, and should be the maximum magnitude that meets the inventive features that claims mention.
Claims (9)
1. the super PN junction structure of deep trench is characterized in that, comprising:
Be deposited on the single thick epitaxial layer on the substrate;
Be formed on the deep trench in the described single thick epitaxial layer, the characteristic size of described deep trench is 0.4 micron-6 microns, and the degree of depth is 10 microns-80 microns, and angle is 80 degree-90 degree;
Be formed on the super PN junction along the deep trench direction in the described deep trench, described super PN junction is heavily doped polysilicon;
Be filled in oxide layer and polysilicon in the described deep trench.
2. the super PN junction structure of deep trench as claimed in claim 1 is characterized in that,
The junction depth of described super PN junction is 0.2 micron-8 microns.
3. the super PN junction structure of deep trench as claimed in claim 2 is characterized in that,
Described substrate is N+ or P+ substrate;
4. the formation method of the super PN junction of deep trench is characterized in that, comprising:
The single thick epitaxial layer of deposition on substrate;
The deep trench that forms in described single thick epitaxial layer, the characteristic size of described deep trench are 0.4 micron-6 microns, and the degree of depth is 10 microns-80 microns, and angle is 80 degree-90 degree;
In described deep trench, advance heavily doped polysilicon to form super PN junction along the deep trench direction;
Filling oxide layer and polysilicon in described deep trench.
5. the formation method of the super PN junction of deep trench as claimed in claim 4 is characterized in that,
The junction depth of described super PN junction is 0.2 micron-8 microns.
6. the formation method of the super PN junction of deep trench as claimed in claim 4 is characterized in that, the single thick epitaxial layer of deposition comprises on substrate:
The single thick epitaxial layer of deposition on N+ or P+ substrate;
7. the formation method of the super PN junction of deep trench as claimed in claim 4 is characterized in that, the deep trench that forms in described single thick epitaxial layer comprises:
Photoetching, etching above three layers to described substrate;
Remove photoresist, and with above three layers as hard mask etching deep trench, and wet etching falls the remaining plasma of silicon nitride surface and strengthens oxide layer.
8. the formation method of the super PN junction of deep trench as claimed in claim 4 is characterized in that, advances heavily doped polysilicon to form super PN junction along the deep trench direction in described deep trench and comprises:
Advance 200 minutes down at 1150 ℃, form along deep trench direction junction depth;
Will
Heavily doped P type or N type polysilicon complete oxidation.
9. the formation method of the super PN junction of deep trench as claimed in claim 4 is characterized in that, filling oxide layer and polysilicon comprise in described deep trench:
Filling oxide layer and densification in deep trench;
The oxide layer that etched portions is filled;
In deep trench, fill polysilicon by rpcvd;
Anti-carving by dry method, is the stop layer that dry method anti-carves with the silicon nitride, anti-carves the polysilicon above the silicon nitride;
By hydrofluoric acid and hot phosphoric acid silica and silicon nitride are shelled entirely;
Remove with the thermal oxide layer of hydrofluoric acid silicon face.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009100542610A CN101937929A (en) | 2009-07-01 | 2009-07-01 | Deep groove super PN junction structure and formation method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009100542610A CN101937929A (en) | 2009-07-01 | 2009-07-01 | Deep groove super PN junction structure and formation method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
CN101937929A true CN101937929A (en) | 2011-01-05 |
Family
ID=43391142
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009100542610A Pending CN101937929A (en) | 2009-07-01 | 2009-07-01 | Deep groove super PN junction structure and formation method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101937929A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106044701A (en) * | 2015-04-17 | 2016-10-26 | 罗伯特·博世有限公司 | Method for manufacturing microelectromechanical structures in layer sequence and corresponding electronic component having microelectromechanical structure |
-
2009
- 2009-07-01 CN CN2009100542610A patent/CN101937929A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106044701A (en) * | 2015-04-17 | 2016-10-26 | 罗伯特·博世有限公司 | Method for manufacturing microelectromechanical structures in layer sequence and corresponding electronic component having microelectromechanical structure |
CN106044701B (en) * | 2015-04-17 | 2022-02-01 | 罗伯特·博世有限公司 | Method for producing a microelectromechanical structure in a layer sequence and corresponding electronic component having a microelectromechanical structure |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101937927A (en) | Deep groove super PN junction structure and manufacturing method thereof | |
CN100552902C (en) | The groove type double-layer grid power MOS structure implementation method | |
CN106847880A (en) | A kind of semiconductor devices and preparation method thereof | |
CN102263133A (en) | Low-gate charge low-on resistance deep trench power metal oxide semiconductor field effect transistor (MOSFET) device and manufacturing method | |
CN104078324A (en) | Stacked nanowire fabrication method | |
CN105914230A (en) | Ultra-low power consumption semiconductor power device and preparation method thereof | |
CN105655402B (en) | Low-voltage super-junction MOSFET terminal structure and manufacturing method thereof | |
CN105870194A (en) | Groove type CoolMOS and manufacturing method thereof | |
CN108091685A (en) | It is a kind of to improve half pressure-resistant super node MOSFET structure and preparation method thereof | |
CN104576359A (en) | Preparation method of power diode | |
CN205159322U (en) | MOSFET (metal -oxide -semiconductor field effect transistor) device | |
CN102129997B (en) | Method for forming P-type pole in N-type super junction vertical double diffused metal oxide semiconductor (VDMOS) | |
CN102214582B (en) | Method for manufacturing terminal structure of deep-groove super-junction metal oxide semiconductor (MOS) device | |
CN103681817B (en) | IGBT device and manufacturing method thereof | |
CN102148164A (en) | Formation method for VDMOS (vertical double-diffused metal oxide semiconductor) device | |
CN110690272A (en) | A structure of SJ MOS device combined with shielding gate and method of making the same | |
CN102479699B (en) | Manufacturing method of super-junction semiconductor device structure | |
CN103022019A (en) | Silicon capacitor capable of reducing equivalent resistance and preparation method thereof | |
CN103137688A (en) | Semiconductor device with ditch groove metal oxide semiconductor (MOS) structure and manufacture method thereof | |
CN111261702A (en) | Trench type power device and method of forming the same | |
CN112133750B (en) | Deep trench power device and preparation method thereof | |
CN103531616A (en) | Groove-type fast recovery diode and manufacturing method thereof | |
CN106935645B (en) | MOSFET power device with bottom gate | |
CN101937929A (en) | Deep groove super PN junction structure and formation method thereof | |
CN103578999A (en) | Manufacturing method of super joint |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20110105 |