CN101924557B - A/D converter based on single amplifier chaos circuit and A/D converting method thereof - Google Patents
A/D converter based on single amplifier chaos circuit and A/D converting method thereof Download PDFInfo
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Abstract
The invention relates to an A/D converter and an A/D converting method thereof based on a single amplifier chaos circuit. The A/D conversion can be realized according to the position of a chaos track decided by judging initial value voltage. The chaos circuit is based on a single operation amplifier; a circuit topology structure can be changed by a time sequence control simulation switch; the initial voltage can be set by applying the operation and comparison function of the operation amplifier; and the aim of analog-to-digital conversion can be achieved by judging the mutual chaos iteration between two capacitance and voltage values and the position of the chaos track. By using a common element and a simple simulation switch, the higher conversion speed and precision can be realized when the A/D converter is used as the A/D conversion circuit and the conversion resolution of the A/D conversion circuit can reach over 10 bits. When the A/D converter is used as a random sequence generation circuit, the binary code stream can be really generated randomly.
Description
Technical field
The present invention relates to a kind of chaos circuit, be specifically related to a kind of chaos circuit of single amplifier discrete-time system.
Background technology
How to produce for communication, computer, control, the required chaos circuits in field such as detection are frontiers of in recent years nonlinear circuit and system subject research, have obtained some relevant achievements at present.
The research that the chaos circuit of the single amplifier discrete-time system of sequencing control is applied to A/D converter mainly contains following aspect:
" based on the chaotic A of Bernoulli mapping and the CPLD/D change-over circuit " that Electronics and Information Engineering institute of Xi'an Communications University appoints extra large roc to propose at " Chinese journal of scientific instrument " in 2007, main by Nonlinear Mapping f (.) and sampling holder realization chaos iteration, reach the effect of A/D conversion.Chaos circuit mainly adopts 8 operational amplifiers, but owing to having adopted the ratio delayer, cause switching rate limited, perhaps need the computer assisted binary code that calculates, perhaps hardware circuit is comparatively complicated, need a plurality of operational amplifiers, cause cost and the power consumption of whole circuit all excessive, increase along with the amplifier number, particularly operational amplifier is when doing integrator, error voltage mainly comes from offset voltage and the time of integration, and the amplifier that circuit comprises is more, and the error that offset voltage brings also can be more obvious.Too much amplifier quantity also can bring power consumption bigger than normal, the problems such as biasing output voltage disunity, and offset voltage is operational amplifier produces error in circuit key property parameter.
The A/D converter of pipeline-type also is at present than more efficient and powerful transducer, and it is when doing high precision converter, and operational amplifier plays the effect of accurate amplification, so the operational amplifier gain characteristic is had relatively high expectations.When operational amplifier chip type selecting, except considering switching rate, power consumption outside the parameters such as output offset voltage, is introduced again gain characteristic, and this has increased the requirement to operational amplifier, has also increased the cost of whole circuit.Simultaneously, because the specific operation principle of pipeline-type A/D converter, its input signal must pass several grades of circuit, can cause flowing water to postpone, and it is simultaneously that its output signal necessarily requires, so need strict latching regularly.
The chaos circuit of the single amplifier discrete-time system of sequencing control also is applied to random sequence generator: in digital communication technology, using pseudo random sequence to encrypt is the main method of digital enciphering system, utilize computer or mcu programming to realize, so pseudo random sequence itself has certain limitation: periodic pseudo random sequence can make Serial No. repeat; Might infer the algorithm that the generation pseudo random sequence by certain method, and then crack out the encryption random sequence, this pseudo random sequence can't satisfy the application needs of high security requirement.True random generator then is the randomness of utilizing natural noise, its generation be not have rule, the random sequence that can't crack.The traditional design method of true random sequence generator mainly is by thermal noise or the phase noise of sampling integrated circuit, perhaps produces and detect particle trajectory, and the noise sources such as quartz (controlled) oscillator obtain true random number.But higher to the circuit required precision owing to what install, and complex structure, expensive.Therefore this class random sequence production method is both inconvenient, and the scope of application is also limited.
Summary of the invention
Technical problem to be solved by this invention is, need a plurality of operational amplifiers based on the existing A/D converter that is used for chaos system, cause cost and the power consumption of whole circuit excessive, biasing output voltage disunity, and the error of being brought by offset voltage increases, to the defective such as have relatively high expectations of operational amplifier in the A/D converter, provide the Bei Nuli chaos circuit of the novel Discrete sequencing control that a kind of circuit is simple, cost is low.The invention provides the single amplifier chaos circuit that a kind of novel temporal based is controlled, realize the generation of A/D conversion or true random sequence, come the control simulation switch to change the syndeton of circuit thereby produce sequential by element circuits such as FPGA.
This A/D converter comprises: timing sequence generating circuit module, input voltage and supply module, single amplifier chaos circuit module.
The timing sequence generating circuit module is connected with the single amplifier chaos circuit module, produce timing control signal by the timing sequence generating circuit module, according to analog switch state in the sequential chart control single amplifier chaos circuit module, make the single amplifier chaos circuit module carry out successively sampling-hold mode, comparison state 1, compute mode 1, compare state 2, compute mode 2, realize respectively the circuit state of 5 kinds of difference in functionalitys; Make current state and satisfied 2 moulds, 1 relation, i.e. the magnitude of voltage x of single amplifier chaos circuit module output current state that take advantage of of the relation between the NextState of single amplifier chaos circuit
nMagnitude of voltage x with NextState
N+1Satisfy relational expression
Conversion realizes the A/D conversion or obtains random sequence through circuit state for (formula 1.1), input analog signal.
Wherein realize taking advantage of the concrete steps of 2 moulds, 1 relation to comprise, input voltage and supply module input analog voltage realize that in sampling-hold mode input voltage vin is to the sampling charging of the first capacitor C 1; Make voltage on the second capacitor C 2 equal the twice mould one of the upper voltage of C1 through state 1 relatively and compute mode 1; Make voltage on the first capacitor C 1 equal the twice mould one of voltage on the second capacitor C 2 through state 2 relatively and compute mode 2.Then the sampling input voltage makes on capacitor C 1 and the capacitor C 2 to have the Conversion Relations of taking advantage of two moulds one between the voltage on capacitor C 1, finally realizes the A/D conversion or produces true random sequence.
Single amplifier Bei Nuli chaos circuit of temporal based control is specially when being used for the A/D conversion, realize the A/D conversion by judging the chaotic orbit position that first threshold voltage determines, this chaos circuit changes circuit topological structure by the sequencing control analog switch, use computing and the comparing function of operational amplifier, realization is to the sampling of initial voltage, and to the mutual chaos iteration between the two capacitance voltage values and chaotic orbit position judgment, to reach analog-to-digital purpose.
The single amplifier chaos circuit module can adopt single amplifier Bei Nuli chaos circuit to realize.Single amplifier Bei Nuli chaos circuit comprises: input voltage and supply module provide reference voltage Vref, by input analog switch S1 access, analog switch S1 connects with resistance R 1 and accesses the backward end (1) of operational amplifier U1, analog switch S2 one end connects with reference to ground, the other end also accesses the backward end (1) of operational amplifier U1 by resistance R 2, analog switch S3 connects with resistance R 3 and is connected between the backward end (1) and output (6) of U1 as the negative feedback branch road, analog switch S0 one termination input voltage vin, the other end connects the forward end (5) of U1, the first capacitor C 1 common port (0) ground connection of connecting with the second capacitor C 2, consist of capacitive branch, analog switch S4 and analog switch S5 series connection, the forward end (5) of common port access U1, S4 is connected the other end and is connected respectively two non-common ports of capacitive branch (i.e. an end (8) of an end (7) of the first capacitor C 1 and the second capacitor C 2) with S5, analog switch S6 and analog switch S7 series connection, common port connects the output (6) of U1, and S6 is connected the other end and is connected respectively two non-common ports (i.e. an end (8) of an end (7) of the first capacitor C 1 and the second capacitor C 2) of capacitive branch with S7.
The timing sequence generating circuit module is according to analog switch state in the sequential chart control single amplifier chaos circuit module, make the single amplifier chaos circuit module carry out successively sampling-hold mode, comparison state 1, compute mode 1, compare state 2, compute mode 2, realize respectively the circuit state of 5 kinds of difference in functionalitys; Make the magnitude of voltage x of single amplifier chaos circuit module output current state
nMagnitude of voltage x with NextState
N+1Satisfy relational expression
The present invention is based on single amplifier Bei Nuli chaos circuit of sequencing control, when being used for the random sequence generation, realize that by judging the chaotic orbit position that first threshold voltage determines random sequence produces, this chaos circuit changes circuit topological structure by the sequencing control analog switch, use computing and the comparing function of operational amplifier, realization is to the sampling of initial voltage, and to the mutual chaos iteration between the two capacitance voltage values and chaotic orbit position judgment, to produce random sequence.
Input voltage value can be stochastical sampling decimal system analog signal voltage value by sampling-hold mode with voltage sampling to C1, perhaps directly utilize the small voltage on the capacitor C 1 to sample.Output rusults is random binary sequence.When circuit is when directly utilizing small voltage on the capacitor C 1 to sample, on circuit topological structure, not need input voltage and analog switch S0.The sequencing control state is sampling-hold mode not, but directly enters comparison state 1, compute mode 1, comparison state 1, budget state 2.All the other timing sequence generating and control mode, and element is all the same with the implementation that is used for the A/D conversion.
When circuit when being through sampling-hold mode that voltage sample is upper to C1 by stochastical sampling decimal system analog signal voltage, its circuit topological structure, timing sequence generating and control mode, and component parameters is all the same for the implementation that A/D changes with circuit.The sequence of binary digits of chaos circuit output output is the desired true random sequence code stream of random sequence generator.
The present invention only just can carry out the generation of A/D conversion and true random sequence by an operational amplifier, circuit structure is simple.When being used for the A/D conversion, reach higher switching rate.This circuit can also as the random sequence generator in when coding in the secure communication, can obtain the binary sequence of true random.Experimental result shows, sort circuit is simple, resolution and sensitivity is higher, nonlinearity erron is less and adaptive capacity is stronger characteristics.
Other advantages of the present invention, target, to set forth in the following description to a certain extent with feature, and based on being apparent to those skilled in the art to investigating hereinafter, perhaps can be instructed from the practice of the present invention to a certain extent.Target of the present invention and other advantages can be passed through following specification, claims, and the specifically noted structure realizes and obtains in the accompanying drawing.
Description of drawings
In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing:
Fig. 1 is based on the A/D converter theory diagram of single amplifier chaos circuit
Fig. 2 list amplifier Bei Nuli chaos circuit schematic diagram
Embodiment
Single amplifier Bei Nuli chaos circuit of the present invention (Bernoulli) is take an operational amplifier as core, and by the control simulation switch, and small part electric capacity and resistance are that main element consists of state switching circuit.Can adopt single-chip microcomputer, the sequential that other element circuits such as FPGA produce is controlled this chaos circuit module, produces different circuit states, finally reaches A/D conversion or random sequence and occurs.
Be illustrated in figure 1 as the A/D converter theory diagram based on single amplifier chaos circuit.The timing sequence generating circuit module is connected with the single amplifier chaos circuit module, generate the sequencing control state table by the timing sequence generating circuit module, according to the sequencing control state table single amplifier chaos circuit module is implemented control, the control single amplifier chaos circuit enters successively sampling-hold mode, comparison state 1, compute mode 1, compares state 2, compute mode 2, input voltage is changed through realization A/D behind the above-mentioned different circuit states in the single amplifier chaos circuit module from the analog signal of power supply circuits input, and the output random sequence.
Table 1: the sequencing control state table when making A/D converter
The sequencing control state can be by single-chip microcomputer, and other element circuits such as FPGA produce.The timing sequence generating circuit module produces sequencing control state control single amplifier chaos circuit module, makes the magnitude of voltage x of single amplifier chaos circuit output current state
nMagnitude of voltage x with NextState
N+1Satisfy relational expression
Make current state and the relation between the NextState of its output satisfy 2 moulds, 1 relation of taking advantage of, on off state by timing control signal control simulation switch consists of sampling-hold mode, control ratio than state 1, compute mode 1, comparison state 2, compute mode 2, realizes respectively 5 kinds of circuit states of difference in functionality; Conversion realizes the A/D conversion or obtains random sequence the reference voltage of input voltage and supply module input through circuit state.
Figure 2 shows that single amplifier Bei Nuli chaos circuit schematic diagram.Input voltage and supply module provide reference voltage Vref (aanalogvoltage), by input analog switch S1 access, analog switch S1 connects with resistance R 1 and accesses the backward end (1) of operational amplifier U1, analog switch S2 one end connects with reference to ground, the other end also accesses the backward end (1) of operational amplifier U1 by resistance R 2, analog switch S3 connects with resistance R 3 and is connected between the backward end (1) and output (6) of U1 as the negative feedback branch road, analog switch S0 one termination input voltage vin, the other end connects the forward end (5) of U1, the first capacitor C 1 common port (0) ground connection of connecting with the second capacitor C 2, consist of capacitive branch, analog switch S4 and analog switch S5 series connection, the forward end (5) of common port access U1, S4 is connected the other end and is connected respectively two non-common ports of capacitive branch (i.e. an end (8) of an end (7) of the first capacitor C 1 and the second capacitor C 2) with S5, analog switch S6 and analog switch S7 series connection, common port connects the output (6) of U1, and S6 is connected the other end and is connected respectively two non-common ports (i.e. an end (8) of an end (7) of the first capacitor C 1 and the second capacitor C 2) of capacitive branch with S7.
The timing sequence generating circuit module is according to the sequencing control table, produce timing control signal control simulation switch S 0, S3, S6 closure in sampling-hold mode, circuit sampling input voltage is to C1, operational amplifier plays the voltage follower in the chaos circuit at this moment, according to " empty short " effect of operational amplifier, namely the positive and negative terminal magnitude of voltage will guarantee identically, and being connected to amplifier negative terminal capacitor C 1 can be recharged, until identical with the input voltage that connects the amplifier anode, stop charging.
In relatively state 1 and compute mode 1, send Trig control signal trigger switch S1, S2, S4 are closed, this moment operational amplifier as voltage comparator, chaos circuit output signal D; D is judged, if D is high level, Trig control signal trigger switch S1, S3, S4, S7 closure, otherwise trigger switch S2, S3, S4, S7 closure, disconnect other switches, under the linearity amplification and subtraction effect of operational amplifier, voltage equals the twice mould one of voltage on the capacitor C 1 on the capacitor C 2.Comparing state 2 and compute mode 2, sending Trig control signal trigger switch S1, S2, S5, disconnecting other switches, operational amplifier is output as D as voltage comparator; D is judged, if D is high level, control signal trigger switch S1, S3, S5, S6 closure, otherwise trigger switch S2, S3, S5, S6 closure, disconnect other switches, under the linearity amplification and subtraction effect of operational amplifier, the upper voltage of C1 equals the twice mould one of the upper voltage of C2.In N number conversion of process, the relatively N bit of output of operational amplifier is transformation result, then repeats this process and can carry out new A/D conversion, realizes analog signal to the conversion of digital signal, or produces random sequence.
Below respectively 5 kinds of operating states of chaos circuit are analyzed and are illustrated:
1. sampling-hold mode circuit
Sequencing control analog switch S0, S3, S6 closure, other switches disconnect, circuit sampling input voltage is to C1, this moment, operational amplifier U1 played the voltage follower, can be according to " empty short " effect of operational amplifier, it is identical to be that the positive and negative terminal magnitude of voltage will guarantee, the voltage that connects on the U1 negative terminal C1 can be recharged, until identical with the input voltage that connects the amplifier anode.
2. compare state 1 circuit
After through the control of sampling-hold mode circuit, there has been voltage Vin on the capacitor C 1, sequential control circuit enters comparison state 1.Operational amplifier can be used as voltage comparator under open loop case, can realize the size of both end voltage is compared, and in two input voltages, one is the reference voltage of input, and another is the analog input voltage that is compared.It is output as comparative result, can adopt digital signal high level or low level to represent.Comparing in state 1 situation, sequencing control analog switch S1, S2, S4 is closed, and consist of voltage comparator circuit this moment, according to the voltage V on the capacitor C 1
C1Determine operational amplifier output D with the relation of reference voltage
0(being Dout).The operational amplifier output terminal Output rusults is:
Namely work as the voltage V on the C1
C1Greater than
The time, the output D of operational amplifier
0The output high level, otherwise, the voltage V on C1
C1Less than
The time, the output D of operational amplifier
0Output low level is relatively exported saltus step between high-low level (0,1).
3. compute mode 1 status circuit
After comparing state 1, taking advantage of in two moulds, one state, 1 situation, timing sequence generating circuit module controls analog switch S3, S4, S7 is closed.In comparing state 1, when
The time, can get D
0=1.That is: S1=D
0=1, analog switch S1 is closed, then
Analog switch S2 disconnects, and can get thus compute mode 1 this moment, V
C2=2V
1-V
RefIn comparing state 1, when
The time, can get D
0=0; That is:
That is: S1 disconnects, and S2 is closed; Can get thus compute mode 1 this moment, V
C2=2V
1
In sum, the voltage V on compute mode 1 sequencing control C2
C2With the voltage V on the C1
C1Satisfy relation:
Namely work as the voltage V on the C1
C1Greater than
The time, the voltage V on the C2
C2Equal 2 times V
C1Deduct V
RefOtherwise,, the voltage V on C1
C1Less than
The time, the voltage V on the C2
C2Equal 2 times V
C1At this moment, be stored in the C1 input signal Vin on the electric capacity, by once taking advantage of 1 computing of 2 moulds, that is: the upper voltage of C1 equals the twice mould one of the upper voltage of C2, and the upper voltage unloading of C1 is on C2; Comparative result also has V
OutOutput, and pass through D
0Be stored in the memory etc. to be collected.
4. relatively state 2 status circuit analyses
When through after the compute mode 1, there has been voltage V on the capacitor C 2
C2Timing sequence generating circuit module controls analog switch S1, S2, S5 is closed, and rest switch disconnects, and the single amplifier chaos circuit module enters comparison state 2.At this moment, operational amplifier as a comparison device again make single amplifier chaos circuit consist of voltage comparator circuit; This moment capacitor C 2 voltage and reference voltage V
RefCompare single amplifier chaos circuit module Output rusults D
0As follows:
Voltage V on C1
C2Greater than V
RefThe time, the output D of operational amplifier
0The output high level, otherwise, the voltage V on C1
C2Less than V
RefThe time, the output D of operational amplifier
0Output low level is relatively exported saltus step between high-low level (0,1).
5. compute mode 2 status circuit analyses
Circuit is being taken advantage of two moulds, one state 2 times through after comparing state 2, timing sequence generating circuit module controls analog switch S3, and S4, S6 is closed.
In comparing state 2, when
The time, can get V in compute mode 2
Out=D
0=1.That is: S1=D
0=1, analog switch S1 is closed, then
Analog switch S2 disconnects, and can get V this moment
C1=2V
2-V
Ref；
In comparing state 2, when
The time, can get in compute mode 2
That is: S1=D
0=0, then
Be that S2 is closed, S1 disconnects: can get thus V
C1=2V
2
Sampling-hold mode control inputs voltage Vin is to the sampling charging of the first capacitor C 1, relatively voltage equals the twice mould one of voltage on the first capacitor C 1 on state 1 and compute mode 1 control the second capacitor C 2, and relatively voltage equals the twice mould one of voltage on the second capacitor C 2 on state 2 and compute mode 2 controls the first capacitor C 1.
Combine with described voltage V on C1
C1Greater than
The time, the voltage V on the C2
C2Equal 2 times V
C1Deduct V
RefOtherwise,, the voltage V on C1
C1Less than
The time, the voltage V on the C2
C2Equal 2 times V
C1Be voltage V
C2With V
C1Satisfy relation:
At this moment, again through once taking advantage of 1 computing of 2 moulds, that is: the upper voltage of C1 equals the twice mould one of the upper voltage of C2, and the upper voltage unloading of C2 is on capacitor C 1; Comparator Output rusults V
Out, and pass through D
0Be stored in the memory etc. to be collected.
The sequencing control chaos circuit is through the foregoing circuit state, the analog signal of input is through the analog-to-digital conversion of one-period, voltage equals the twice mould one of the upper voltage of C1 on the C2 comprising making, and makes the upper voltage of C2 equal twice mould one this two-part process of the upper voltage of C1., C1 is powered on press the above-mentioned relatively state 1 that repeats the sampling of C1 charging by above-mentioned sampling-hold mode control inputs voltage Vin, compute mode 1, state 2 relatively, the periodic process that compute mode 2 forms obtains analog-to-digital result.
When this chaos circuit during as random sequence generator.Sampling-hold mode realizes that mainly random input voltage vin to the sampling of capacitor C 1 charging, perhaps directly utilizes the small voltage on the capacitor C 1.Relatively state 1 makes the upper voltage of C2 equal the twice mould one of the upper voltage of C1 with compute mode 1.Relatively state 2 makes the upper voltage of C1 equal the twice mould one of the upper voltage of C2 with compute mode 2.When sampling-hold mode, if directly utilize the small voltage on the capacitor C 1 to sample, then do not need input voltage vin to the sampling charging of capacitor C 1, the chaos circuit Output rusults is random binary sequence.Figure is as shown in table 2 for sequencing control chaos circuit control simulation switching sequence.
Table 2: the sequencing control state table when making random sequence generator (directly to the C1 voltage sample)
As adopt single-chip microcomputer as time-sequence control module.
Single-chip microcomputer can adopt STM32, comprise external circuits: usb circuit, UART AccessPort circuit, power-supplying circuit, and the start-up circuit that resets, wherein wrapped a slice serial port chip MAX3232EUE, a slice reference voltage source chip REF5025, and a slice voltage transitions chip LM1117, and resistance, electric capacity, magnetic bead etc.
The GPIO mouth is connected with analog switch, and mcu programming is controlled the GPIO interface, produces the timing waveform of analog switch as shown in table 1.Eight analog switches are connected with single-chip microcomputer GPIO mouth respectively, the DAC pin output of single-chip microcomputer is by the input Vin of a voltage follower (preventing that the Vin of rear class is to the interference of the DAC pin of prime) connecting analog signal, input Vin is linked into respectively the switched-capacitor circuit module, and the ADC pin of single-chip microcomputer.The single-chip microcomputer extension circuit is by serial port circuit, the USB control circuit, and power circuit forms.Also can utilize in addition the D/A converter of single-chip microcomputer STM32 inside to produce analog input signal Vin, can also utilize potentiometer to produce and control simulation input signal Vin.The inner D/A converter of control single chip computer, produce an analog signal Vin by a binary number, process compares the digital-to-analogue conversion result of the A/D converter of A/D converter of the present invention and single-chip microcomputer STM32 inside, is reached the required precision of A/D converter fully by the Output rusults of chaos circuit generation of the present invention.
Claims (5)
1. A/D converter based on single amplifier Bei Nuli chaos circuit, it is characterized in that, comprise: timing sequence generating circuit module, input voltage and supply module, single amplifier chaos circuit module, the timing sequence generating circuit module produces timing control signal, according to analog switch state in the sequential chart control single amplifier chaos circuit module, make the single amplifier chaos circuit module carry out successively the circuit state of 5 kinds of difference in functionalitys, the magnitude of voltage x of single amplifier chaos circuit module output current state
nMagnitude of voltage x with NextState
N+1Satisfy relational expression
Single amplifier chaos circuit comprises: input voltage and supply module provide reference voltage, by input analog switch S1 access, analog switch S1 connects with resistance R 1 and accesses the backward end of operational amplifier U1, analog switch S2 one end connects with reference to ground, the other end also accesses the backward end of operational amplifier U1 by resistance R 2, analog switch S3 connects with resistance R 3 and is connected between the backward end and output of U1 as the negative feedback branch road, analog switch S0 one termination input voltage, the other end connects the forward end of U1, the first capacitor C 1 is connected with the second capacitor C 2 and is consisted of capacitive branch, the common end grounding that C1 is connected with C2, analog switch S4 and analog switch S5 series connection, the forward end of the common port access U1 that S4 is connected with S5, S4 is connected the other end and is connected respectively the capacitive branch two ends with S5, analog switch S6 and analog switch S7 series connection, the output of the common port connection U1 that S6 is connected with S7, S6 are connected the other end and are connected respectively the two ends of capacitive branch with S7.
2. A/D converter according to claim 1 is characterized in that, produces timing control signal control simulation switch S 0, S3, S6 closure in sampling-hold mode, comparing state 1 timing control signal control simulation switch S 1, S2, S4 is closed, in compute mode 1 timing control signal control simulation switch S 3, S4, S7 is closed, comparing state 2 timing control signal control simulation switch S 1, S2, S5 is closed, in compute mode 2 timing control signal control simulation switch S 3, S4, S6 is closed.
3. A/D conversion method based on single amplifier Bei Nuli chaos circuit, it is characterized in that, the timing sequence generating circuit module is connected with the single amplifier chaos circuit module, produce timing control signal by the timing sequence generating circuit module, according to analog switch state in the sequential chart control single amplifier chaos circuit module, make the single amplifier chaos circuit module carry out successively sampling-hold mode, comparison state 1, compute mode 1, compare state 2, compute mode 2, realize respectively the circuit state of 5 kinds of difference in functionalitys, make the magnitude of voltage x of single amplifier chaos circuit module output current state
nMagnitude of voltage x with NextState
N+1Satisfy relational expression
Input voltage and supply module input analog signal realize the A/D conversion or obtain random sequence through the single amplifier chaos circuit module, described single amplifier chaos circuit comprises: input voltage and supply module provide reference voltage, by input analog switch S1 access, analog switch S1 connects with resistance R 1 and accesses the backward end of operational amplifier U1, analog switch S2 one end connects with reference to ground, the other end also accesses the backward end of operational amplifier U1 by resistance R 2, analog switch S3 connects with resistance R 3 and is connected between the backward end and output of U1 as the negative feedback branch road, analog switch S0 one termination input voltage, the other end connects the forward end of U1, the first capacitor C 1 is connected with the second capacitor C 2 and is consisted of capacitive branch, the common end grounding that C1 is connected with C2, analog switch S4 and analog switch S5 series connection, the forward end of the common port access U1 that S4 is connected with S5, S4 is connected the other end and is connected respectively the capacitive branch two ends with S5, analog switch S6 and analog switch S7 series connection, common port that S6 is connected with S7 connects the output of U1, and S6 is connected the other end and is connected respectively the two ends of capacitive branch with S7.
4. A/D conversion method according to claim 3 is characterized in that, realizes that in sampling-hold mode input voltage vin is to the sampling charging of the first capacitor C 1; Make voltage on the second capacitor C 2 equal the twice mould one of the upper voltage of C1 through state 1 relatively and compute mode 1; Make voltage on the first capacitor C 1 equal the twice mould one of voltage on the second capacitor C 2 through state 2 relatively and compute mode 2.
5. A/D conversion method according to claim 3 is characterized in that, in sampling-hold mode, timing control signal control simulation on off state makes in the chaos circuit operational amplifier make voltage follower; In relatively state 1 and compute mode 1, timing control signal control simulation on off state makes operational amplifier as voltage comparator, in the control single amplifier chaos circuit module on the second capacitor C 2 voltage equal the twice mould one of voltage on the first capacitor C 1; Comparing state 2 and compute mode 2, timing control signal control simulation on off state makes operational amplifier as voltage comparator, and the upper voltage of control C1 equals the twice mould one of the upper voltage of C2.
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| CN103312491B (en) * | 2013-04-27 | 2016-01-06 | 重庆邮电大学 | A kind of chaos circuit being applicable to AD conversion and producing random binary sequence |
| CN103558542B (en) * | 2013-11-08 | 2016-03-16 | 重庆邮电大学 | A kind of chaotic circuit detector and detection method thereof |
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| CN111510143A (en) * | 2020-04-03 | 2020-08-07 | 四川知微传感技术有限公司 | Front-end circuit for direct conversion from capacitance to digital quantity |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101222318A (en) * | 2008-01-23 | 2008-07-16 | 黑龙江大学 | Chaotic sequence generation method and sequence generator of high speed high-precision chaotic function |
| CN101364388A (en) * | 2007-08-07 | 2009-02-11 | 奇美电子股份有限公司 | Novel integrated DC transducer applied to LCD |
-
2010
- 2010-08-09 CN CN 201010248389 patent/CN101924557B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101364388A (en) * | 2007-08-07 | 2009-02-11 | 奇美电子股份有限公司 | Novel integrated DC transducer applied to LCD |
| CN101222318A (en) * | 2008-01-23 | 2008-07-16 | 黑龙江大学 | Chaotic sequence generation method and sequence generator of high speed high-precision chaotic function |
Non-Patent Citations (2)
| Title |
|---|
| Li Qingdu等.Simple Chaos-Based ADC with Only One Opamp.《Systems and Informatics (ICSAI), 2012 International Conference on》.2012,第824-827页. * |
| 任海鹏等.基于贝努力映射和CPLD的混沌A/D转换器.《仪器仪表学报》.2007,第28卷(第01期), * |
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