CN101911035B - 通过存储器地址映射使处理器与外部设备相接口的桥电路 - Google Patents
通过存储器地址映射使处理器与外部设备相接口的桥电路 Download PDFInfo
- Publication number
- CN101911035B CN101911035B CN200880123203.2A CN200880123203A CN101911035B CN 101911035 B CN101911035 B CN 101911035B CN 200880123203 A CN200880123203 A CN 200880123203A CN 101911035 B CN101911035 B CN 101911035B
- Authority
- CN
- China
- Prior art keywords
- interface
- memory
- address
- control module
- bridge circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/404—Coupling between buses using bus bridges with address mapping
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Bus Control (AREA)
Abstract
Description
Claims (13)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US1667007P | 2007-12-26 | 2007-12-26 | |
US61/016,670 | 2007-12-26 | ||
US12/333,854 US7870323B2 (en) | 2007-12-26 | 2008-12-12 | Bridge circuit for interfacing processor to main memory and peripherals |
US12/333,854 | 2008-12-12 | ||
PCT/IB2008/003613 WO2009081271A1 (en) | 2007-12-26 | 2008-12-23 | Bridge circuit interfacing a processor to external devices via memory address mapping |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101911035A CN101911035A (zh) | 2010-12-08 |
CN101911035B true CN101911035B (zh) | 2014-02-19 |
Family
ID=40799980
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200880123203.2A Active CN101911035B (zh) | 2007-12-26 | 2008-12-23 | 通过存储器地址映射使处理器与外部设备相接口的桥电路 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7870323B2 (zh) |
EP (1) | EP2225653A1 (zh) |
JP (1) | JP4972212B2 (zh) |
CN (1) | CN101911035B (zh) |
TW (1) | TWI451262B (zh) |
WO (1) | WO2009081271A1 (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9098209B2 (en) | 2011-08-24 | 2015-08-04 | Rambus Inc. | Communication via a memory interface |
WO2013028859A1 (en) | 2011-08-24 | 2013-02-28 | Rambus Inc. | Methods and systems for mapping a peripheral function onto a legacy memory interface |
US11048410B2 (en) | 2011-08-24 | 2021-06-29 | Rambus Inc. | Distributed procedure execution and file systems on a memory interface |
JP5876017B2 (ja) * | 2013-08-30 | 2016-03-02 | 株式会社ソニー・コンピュータエンタテインメント | 周辺機器制御装置および情報処理装置 |
JP6924026B2 (ja) * | 2016-12-19 | 2021-08-25 | シナプティクス インコーポレイテッド | 半導体装置、ヒューマンインターフェース装置及び電子機器 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005338900A (ja) * | 2004-05-24 | 2005-12-08 | Matsushita Electric Ind Co Ltd | バスブリッジ回路 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5822550A (en) * | 1994-12-22 | 1998-10-13 | Texas Instruments Incorporated | Split data path fast at-bus on chip circuits systems and methods |
US5857117A (en) * | 1995-12-22 | 1999-01-05 | Intel Corporation | Apparatus and method for multiplexing integrated device electronics circuitry with an industry standard architecture bus |
JP3061106B2 (ja) * | 1996-02-28 | 2000-07-10 | 日本電気株式会社 | バスブリッジおよびそれを備えた計算機システム |
US6275888B1 (en) * | 1997-11-19 | 2001-08-14 | Micron Technology, Inc. | Method for configuring peer-to-peer bus bridges in a computer system using shadow configuration registers |
US6101566A (en) * | 1998-03-13 | 2000-08-08 | Compaq Computer Corporation | Computer system with bridge logic that includes an internal modular expansion bus and a common target interface for internal target devices |
US6145029A (en) * | 1998-03-13 | 2000-11-07 | Compaq Computer Corporation | Computer system with enhanced docking support |
US6148357A (en) * | 1998-06-17 | 2000-11-14 | Advanced Micro Devices, Inc. | Integrated CPU and memory controller utilizing a communication link having isochronous and asynchronous priority modes |
US20030191730A1 (en) * | 2002-04-05 | 2003-10-09 | Compaq Information Technologies Group, L.P. | Unobtrusive rule-based computer usage enhancement system |
US20050177829A1 (en) * | 2003-10-10 | 2005-08-11 | Vipul Vishwanath | Method of applying constraints against discovered attributes in provisioning computers |
US7293153B2 (en) * | 2003-10-14 | 2007-11-06 | Freescale Semiconductor, Inc. | Method and system for direct access to a non-memory mapped device memory |
JP2007200169A (ja) * | 2006-01-30 | 2007-08-09 | Hitachi Ltd | ストレージシステム及び記憶制御方法 |
-
2008
- 2008-12-12 US US12/333,854 patent/US7870323B2/en active Active
- 2008-12-23 CN CN200880123203.2A patent/CN101911035B/zh active Active
- 2008-12-23 EP EP08863587A patent/EP2225653A1/en not_active Ceased
- 2008-12-23 JP JP2010540184A patent/JP4972212B2/ja active Active
- 2008-12-23 WO PCT/IB2008/003613 patent/WO2009081271A1/en active Application Filing
- 2008-12-25 TW TW097150740A patent/TWI451262B/zh not_active IP Right Cessation
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005338900A (ja) * | 2004-05-24 | 2005-12-08 | Matsushita Electric Ind Co Ltd | バスブリッジ回路 |
Also Published As
Publication number | Publication date |
---|---|
WO2009081271A1 (en) | 2009-07-02 |
TW200935239A (en) | 2009-08-16 |
CN101911035A (zh) | 2010-12-08 |
TWI451262B (zh) | 2014-09-01 |
JP2011508329A (ja) | 2011-03-10 |
EP2225653A1 (en) | 2010-09-08 |
US20090172238A1 (en) | 2009-07-02 |
JP4972212B2 (ja) | 2012-07-11 |
US7870323B2 (en) | 2011-01-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4799417B2 (ja) | ホストコントローラ | |
EP2973572B1 (en) | System and method of reading data from memory concurrently with sending write data to the memory | |
KR101988260B1 (ko) | 임베디드 멀티미디어 카드, 및 이의 동작 방법 | |
CN102411549B (zh) | 存储器系统、主机控制器以及dma的控制方法 | |
CN108304334B (zh) | 应用处理器和包括中断控制器的集成电路 | |
US10866736B2 (en) | Memory controller and data processing circuit with improved system efficiency | |
CN101911035B (zh) | 通过存储器地址映射使处理器与外部设备相接口的桥电路 | |
US20190196722A1 (en) | Host device to embedded multi-media card device communication | |
CN101206626A (zh) | 对共用总线进行控制的方法和设备 | |
US20180239557A1 (en) | Nonvolatile memory device, data storage device including the same, and operating method of data storage device | |
US8266361B1 (en) | Access methods and circuits for devices having multiple buffers | |
US11748025B2 (en) | Nonvolatile memory device, data storage device including the same and operating method thereof | |
US20110072168A1 (en) | Data transfer system with different operating modes | |
US10719382B2 (en) | Collecting state records of cores in a data storage device | |
US9009571B2 (en) | Storage medium, system and method utilizing the same | |
KR101029074B1 (ko) | 호스트 컨트롤러에서의 디스크립터 추적 장치 및 그 추적방법 | |
CN110795373B (zh) | 一种i2c总线到并行总线的转换方法、终端及存储介质 | |
US20050198425A1 (en) | Combined optical storage and flash card reader using single ide or sata port and method thereof | |
US11366736B2 (en) | Memory system using SRAM with flag information to identify unmapped addresses | |
CN110164394B (zh) | 时序控制器及时序控制板 | |
CN110750476A (zh) | 一种spi总线与并行总线的桥接方法、设备、系统及介质 | |
US20180336147A1 (en) | Application processor including command controller and integrated circuit including the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20200427 Address after: Singapore City Patentee after: Marvell Asia Pte. Ltd. Address before: Ford street, Grand Cayman, Cayman Islands Patentee before: Kaiwei international Co. Effective date of registration: 20200427 Address after: Ford street, Grand Cayman, Cayman Islands Patentee after: Kaiwei international Co. Address before: Hamilton, Bermuda Patentee before: Marvell International Ltd. Effective date of registration: 20200427 Address after: Hamilton, Bermuda Patentee after: Marvell International Ltd. Address before: Babado J San Michael Patentee before: MARVELL WORLD TRADE Ltd. |