CN101908868A

CN101908868A - CMOS comparator with rail-to-rail input and reference voltage amplitudes

Info

Publication number: CN101908868A
Application number: CN 201010241861
Authority: CN
Inventors: 梅海涛; 孙礼中
Original assignee: SUZHOU COSINE MICROELECTRONICS TECHNOLOGY Co Ltd
Current assignee: SUZHOU COSINE MICROELECTRONICS TECHNOLOGY Co Ltd
Priority date: 2010-07-30
Filing date: 2010-07-30
Publication date: 2010-12-08
Anticipated expiration: 2030-07-30
Also published as: CN101908868B

Abstract

The invention relates to a CMOS comparator with rail-to-rail input and reference voltage amplitudes, and belongs to the application field of analog-digital/digital-analog converters. The CMOS comparator with the rail-to-rail input and reference voltage amplitudes consists of an NMOS-type comparator and a PMOS-type comparator; the grid electrodes of a first NMOS tube and a second NMOS tube serving as an NMOS differential pair in the NMOS-type comparator are connected with the grid electrodes of a first PMOS tube and a second PMOS tube serving as a PMOS differential pair in the PMOS-type comparator; the drain electrode and the source electrode of a third PMOS tube on the output amplification stage of the NMOS-type comparator are connected with the drain electrode of a third NMOS tube on the output amplification stage of the PMOS-type comparator and the source electrode of a fourth PMOS tube; and the drain electrode of a fourth NMOS tube on the output amplification stage of the NMOS-type comparator is connected with the drain electrode of a fourth PMOS tube. The comparator can output accurate results no matter the input and reference voltages are changed in any interval.

Description

A kind of input and reference voltage amplitude are the CMOS comparator of rail-to-rail

Technical field:

The present invention relates to a kind of input and reference voltage amplitude is the CMOS comparator of rail-to-rail, belongs to the D and D/A converter application.

Background technology:

D and D/A converter is a kind of integrated circuit (IC)-components that is widely used in the various electronic systems, and the core circuit of D and D/A converter is a comparator, its operation principle as shown in Figure 1, V _RefBe reference voltage, as input voltage V _InBe lower than reference voltage V _RefThe time, output V _Out=0, as input voltage V _InBe higher than reference voltage V _RefThe time, output V _Out=1.The physical circuit of traditional classical comparator as shown in Figures 2 and 3, Fig. 2 is the nmos type comparator, Fig. 3 is the pmos type comparator.Two kinds of comparators all are based on the structure and the principle of 2 grades of difference amplifiers.With nmos type comparator (Fig. 2) is example, and it is right that M1 and M2 form input difference, and M3 and M6 form the load of amplifier, and M7-M10 forms the output stage of amplifier, and cross-coupled M4 and M5 are used for realizing the late effect of comparator.The comparator of this differential amplifier structure can be realized input voltage V _InWith reference voltage V _RefComparison, and error is amplified to 1 or 0.This comparator configuration is simply suitable, but exists certain defective, the structures shape of differential amplifier its scope to input voltage and reference voltage certain qualification is arranged, the requirement of differential pair M1 and M2 operate as normal is input voltage V _InWith reference voltage V _RefMust be greater than the V of current source pipe _DsAdd the threshold voltage V of M1 or M2 _T1,2, be example with 0.18um CMOS technology, above-mentioned two voltages add and are approximately 0.7V together, and supply voltage only is 1.8V, this has been limited between the 0.7V-1.8V with regard to the scope that means input and reference voltage.In actual applications, there are many situations all to need comparator to realize input and reference voltage are compared in the scope of rail-to-rail (Rail to Rail), the excursion that is to say input and reference voltage is from VSS to VDD, and obvious this comparator is difficult to satisfy the requirement of rail-to-rail (Rail to Rail).

Therefore the principle of pmos type comparator and nmos type identical exist the limitation identical with the NMOS comparator too, and just the pmos type comparator is 0V-1.1V (is example with 0.18um CMOS technology) to the limited field of input and reference voltage.

Summary of the invention:

In order to solve the problems of the technologies described above, the invention provides a kind of input and reference voltage amplitude is the CMOS comparator of rail-to-rail.

The technical solution adopted for the present invention to solve the technical problems is: a kind of input and reference voltage amplitude are the CMOS comparator of rail-to-rail, form by nmos type comparator and pmos type comparator, nmos differential in the described nmos type comparator is right: the PMOS differential pair in the grid of NMOS pipe and the 2nd NMOS pipe and the pmos type comparator: a PMOS manages and is connected with the grid of the 2nd PMOS pipe, the drain electrode of the 3rd PMOS pipe on the output amplifier stage of described nmos type comparator, source electrode and the drain electrode that is arranged at the 3rd NMOS pipe on the pmos type comparator output amplifier stage, the source electrode of the 4th PMOS pipe links to each other, and the drain electrode of the 4th NMOS pipe on the output amplifier stage of described nmos type comparator links to each other with the drain electrode of the 4th PMOS pipe.

No matter import with reference voltage by the present invention and to change in any interval, comparator can both be exported correct result.

Description of drawings:

Fig. 1 is the fundamental diagram of D and D/A converter.

Fig. 2 is the circuit diagram of traditional nmos type comparator.

Fig. 3 is the circuit diagram of conventional P MOS type comparator.

Fig. 4 is a circuit diagram of the present invention.

Among the figure: 1, NMOS pipe; 2, the 2nd NMOS pipe; 3, the 3rd NMOS pipe; 4, the 4th NMOS pipe; 5, the 5th NMOS pipe; 6, the 6th NMOS pipe; 7, the 7th NMOS pipe; 8, the 8th NMOS pipe; 9, PMOS pipe; 10, the 2nd PMOS pipe; 11, the 3rd PMOS pipe; 12, the 4th PMOS pipe; 13, the 5th PMOS pipe; 14, the 6th PMOS pipe; 15, the 7th PMOS pipe; 16, the 8th PMOS pipe.

Embodiment:

The present invention is further described below in conjunction with drawings and Examples.

By as can be seen to the analysis of nmos type comparator and pmos type comparator, two kinds of structures all have certain limitation to the scope of input and reference voltage, but also can find simultaneously, the level of these two kinds limitation scopes is opposite, one is to be confined to lower semisection, another is to be confined to upper semisection, then exist certain overlapping in the centre, the present invention is based on this characteristics combines two kinds of structures, realized that physical circuit as shown in Figure 4 to the comparison of input and reference voltage rail-to-rail (Rail to Rail).

Among Fig. 4 NMOS pipe the 1, the 2nd NMOS pipe the 2 and the one PMOS pipe the 9, the 2nd PMOS pipe 10 be respectively nmos differential to the PMOS differential pair, the 5th PMOS pipe the 13, the 6th PMOS pipe the 14 and the 5th NMOS pipe the 5, the 6th NMOS pipe 6 is respectively the load of NMOS part and PMOS part, the 7th PMOS pipe the 15, the 8th PMOS pipe the 16 and the 7th NMOS pipe the 7, the 8th NMOS pipe 8 is realized the late effect of NMOS part and PMOS part respectively, and other metal-oxide-semiconductors such as the 3rd NMOS pipe the 3, the 4th PMOS pipe the 12, the 3rd PMOS pipe the 11, the 4th NMOS pipe 4 have been formed common output amplifier stage.Its concrete structure can be described as: a kind of input and reference voltage amplitude are the CMOS comparator of rail-to-rail, form by nmos type comparator and pmos type comparator, nmos differential in the described nmos type comparator is right: the PMOS differential pair in the grid of NMOS pipe 1 and the 2nd NMOS pipe 2 and the pmos type comparator: PMOS pipe 9 and the 2nd PMOS manage 10 grid and are connected, the drain electrode of the 3rd PMOS pipe 11 on the output amplifier stage of described nmos type comparator, source electrode and the drain electrode that is arranged at the 3rd NMOS pipe 3 on the pmos type comparator output amplifier stage, the source electrode of the 4th PMOS pipe 12 links to each other, and the drain electrode of the 4th NMOS pipe 4 on the output amplifier stage of described nmos type comparator links to each other with the drain electrode of the 4th PMOS pipe 12.When input and reference voltage when changing in the low side scope, the nmos type comparator partly ends, and the function of comparator is partly realized by the pmos type comparator; When input and reference voltage when changing in higher end range, the pmos type comparator partly ends, and the function of comparator is partly realized by the nmos type comparator; When input and reference voltage when in intermediate range, changing, function is relatively realized jointly by nmos type comparator and pmos type comparator, owing to use same output amplifier stage, no matter import with reference voltage and in any interval, change, comparator can both be exported correct result, has so just realized the comparison of rail-to-rail (Rail to Rail).

It is emphasized that: above only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, every foundation technical spirit of the present invention all still belongs in the scope of technical solution of the present invention any simple modification, equivalent variations and modification that above embodiment did.

Claims

1. input and reference voltage amplitude are the CMOS comparator of rail-to-rail, it is characterized in that: described input and reference voltage amplitude are that the CMOS comparator of rail-to-rail is made up of nmos type comparator and pmos type comparator, nmos differential in the described nmos type comparator is right: the PMOS differential pair in the grid of NMOS pipe (1) and the 2nd NMOS pipe (2) and the pmos type comparator: a PMOS manages the grid that (9) and the 2nd PMOS manage (10) and is connected, the drain electrode of the 3rd PMOS pipe (11) on the output amplifier stage of described nmos type comparator, source electrode and the drain electrode that is arranged at the 3rd NMOS pipe (3) on the pmos type comparator output amplifier stage, the source electrode of the 4th PMOS pipe (12) links to each other, and the drain electrode of the 4th NMOS pipe (4) on the output amplifier stage of described nmos type comparator links to each other with the drain electrode that the 4th PMOS manages (12).