CN101884029B - 具有锁定指示器的多线程处理器 - Google Patents

具有锁定指示器的多线程处理器 Download PDF

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Publication number
CN101884029B
CN101884029B CN200880119089.6A CN200880119089A CN101884029B CN 101884029 B CN101884029 B CN 101884029B CN 200880119089 A CN200880119089 A CN 200880119089A CN 101884029 B CN101884029 B CN 101884029B
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tlb
lock
thread
response
lock indicator
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Chinese (zh)
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CN101884029A (zh
Inventor
卢奇安·科德雷斯库
埃里克·J·普隆德克
苏雷什·K·文库马汉提
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Qualcomm Inc
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Qualcomm Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30083—Power or thermal control instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/52—Indexing scheme relating to G06F9/52
    • G06F2209/522—Manager
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CN200880119089.6A 2007-12-03 2008-12-03 具有锁定指示器的多线程处理器 Active CN101884029B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/949,284 2007-12-03
US11/949,284 US8140823B2 (en) 2007-12-03 2007-12-03 Multithreaded processor with lock indicator
PCT/US2008/085402 WO2009073722A1 (en) 2007-12-03 2008-12-03 Multithreaded processor with lock indicator

Publications (2)

Publication Number Publication Date
CN101884029A CN101884029A (zh) 2010-11-10
CN101884029B true CN101884029B (zh) 2014-09-03

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CN200880119089.6A Active CN101884029B (zh) 2007-12-03 2008-12-03 具有锁定指示器的多线程处理器

Country Status (6)

Country Link
US (1) US8140823B2 (enExample)
EP (1) EP2232370B1 (enExample)
JP (3) JP2011505647A (enExample)
KR (1) KR101146359B1 (enExample)
CN (1) CN101884029B (enExample)
WO (1) WO2009073722A1 (enExample)

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CN103377086A (zh) * 2012-04-27 2013-10-30 华为技术有限公司 用于异步多核系统操作共享资源的方法、装置及系统
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US9501332B2 (en) * 2012-12-20 2016-11-22 Qualcomm Incorporated System and method to reset a lock indication
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US9361116B2 (en) 2012-12-28 2016-06-07 Intel Corporation Apparatus and method for low-latency invocation of accelerators
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Also Published As

Publication number Publication date
CN101884029A (zh) 2010-11-10
JP2013145568A (ja) 2013-07-25
KR20100101629A (ko) 2010-09-17
KR101146359B1 (ko) 2012-05-17
WO2009073722A1 (en) 2009-06-11
JP2011505647A (ja) 2011-02-24
EP2232370A1 (en) 2010-09-29
JP2014197408A (ja) 2014-10-16
US8140823B2 (en) 2012-03-20
EP2232370B1 (en) 2015-11-04
US20090144519A1 (en) 2009-06-04

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