CN101882471A - Device and method for detecting word line defect - Google Patents

Device and method for detecting word line defect Download PDF

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Publication number
CN101882471A
CN101882471A CN 201010198361 CN201010198361A CN101882471A CN 101882471 A CN101882471 A CN 101882471A CN 201010198361 CN201010198361 CN 201010198361 CN 201010198361 A CN201010198361 A CN 201010198361A CN 101882471 A CN101882471 A CN 101882471A
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China
Prior art keywords
word line
data
storage unit
controller
demoder
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Pending
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CN 201010198361
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Chinese (zh)
Inventor
陈伟仁
陈和颖
杨连圣
吴书仁
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Etron Technology Inc
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Etron Technology Inc
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Publication date
Application filed by Etron Technology Inc filed Critical Etron Technology Inc
Priority to CN 201010198361 priority Critical patent/CN101882471A/en
Publication of CN101882471A publication Critical patent/CN101882471A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a method for detecting a word line defect, which comprises the following steps of: starting a first word line so as to read a first data which is pre-stored in a storage unit; making the first word line positioned in a suspension state in a preset time, and writing a second data which is complementary to the first data in the storage unit; starting the first word line again so as to read a third data from the storage unit; and comparing the second data and the third data so as to judge whether an electric connection path is present between the first word line and the second word line.

Description

A kind of arrangement for detecting of word line defect and method
Technical field
The present invention relates to a kind of arrangement for detecting of word line defect, more particularly, about a kind of detecting one word line whether and other word line short circuits and cause the arrangement for detecting of defective.
Background technology
In storer, the user can pass through a word line (Word Line) and a bit line (Bit Line), in the storage unit with data storing to a correspondence.Yet if when one first word line and one second word line short circuit, when user's desire with a data storing to corresponding to one first storage unit of this first word line the time, these data also can be stored to one second storage unit corresponding to this second word line simultaneously, so just can override former should the stored data of second storage unit, and cause the user when reading this second storage unit, can read wrong data, cause user's inconvenience.
Summary of the invention
The invention provides a kind of arrangement for detecting of word line defect.This arrangement for detecting comprises one first word line and is coupled at least one storage unit; One second word line setting is adjacent to this first word line; And one controller be coupled to this first word line and this second word line, this controller starts this first word line earlier to read first data that are stored in advance in this storage unit, this controller is again with a schedule time, make this first word line be in suspended state, write then one with one second data of this first data complement to this storage unit, this controller starts this first word line once more reading out one the 3rd data from this storage unit then, and relatively the 3rd data and this second data to judge between this first word line and this second word line whether have an electrical connection path.
The present invention provides a kind of method of detecting word line defect in addition, and wherein a storage unit is coupled to one first word line and second word line adjacent to this first word line.This method comprises (a) and starts this first word line to read first data that are stored in this storage unit in advance; (b) with a schedule time, make this first word line be in suspended state, write one second data with this first data complement then to this storage unit; (c) start this first word line once again, to read one the 3rd data from this storage unit; And (d) relatively these second data and the 3rd data to judge between this first word line and this second word line whether have an electrical connection path.
Description of drawings
By reference above stated specification and following accompanying drawing, technical characterictic of the present invention and advantage are obtained to be understood fully.
Fig. 1 is the synoptic diagram of the arrangement for detecting of explanation word line defect of the present invention;
Fig. 2 detects the process flow diagram of the method for word line defect for explanation the present invention.
Wherein, Reference numeral
The arrangement for detecting controller of 100 word line defects
120 demoders
B 1, B 2Bit line
W 1, W 2Word line
P 1, P 2Driver
M 11, M 12, M 21, M 22Storage unit
201~207 steps
Embodiment
Please refer to Fig. 1.Fig. 1 is the synoptic diagram of the arrangement for detecting 100 of explanation word line defect of the present invention.Arrangement for detecting 100 comprises a controller 110, a demoder 120, two driver P 1With P 2, two word line W 1With W 2, and dibit line B 1With B 2, word line W wherein 1With W 2For adjacent.
Storage unit M 11With M 12Be coupled to word line W 1, and be respectively coupled to bit line B 1With B 2Storage unit M 21With M 22Be coupled to word line W 2, and be respectively coupled to bit line B 1With B 2
Please refer to Fig. 2.Fig. 2 detects the process flow diagram of the method 200 of word line defect for explanation the present invention.If arrangement for detecting 100 desires detecting word line W 1Defectiveness whether, that is arrangement for detecting 100 can judge whether that electrical connection path is present in word line W 1With adjacent word line W 2Between, then arrangement for detecting 100 can carry out the described step of Fig. 2.Be described in detail as follows:
Step 201: controller 110 control demoders 120 and driver P 1, to start (activate) word line W 1, simultaneously with word line W 2Remain on the state of non-startup (deactivate);
Step 202: controller 110 is by bit line B 1, read corresponding storage unit M 11In stored data D 1
Step 203: controller 110 is with a schedule time T P, close demoder 120 and driver P 1, so that word line W 1Be in suspended state (suspending);
Step 204: controller 110 is at this schedule time T PAfterwards, open this driver P 1(demoder 120 still keeps closing) is with data D 1Complementary state (complementary) as data D 2, by bit line B 1, with data D 2Write storage unit M 11In;
Step 205: controller 110 control demoders 120 and driver P 1, to start word line W once more 1
Step 206: controller 110 is by bit line B 1, reading cells M 11In stored data D 3
Step 207: controller 110 is according to data D 1With D 3, judged whether that electrical connection path is present in word line W 1With adjacent word line W 2Between.
The startup of word line and non-startup need that corresponding driver carries out with it by demoder 120.For instance, if desire starts word line W 1, then demoder 120 need send the signal of representative " startup " to driver P 1, word line W 1Just can be activated; Otherwise, if the non-startup word line of desire W 2, then demoder 120 need send the signal of representative " non-startup " to driver P 2, word line W 2Just can be by non-startup.In addition, the word line W of startup 1Word line W with non-startup 2Can be urged to an initiate potential V respectively ACTWith a non-initiate potential V DEACTFor instance, establish initiate potential V ACTBe a noble potential (as 5 volts), non-initiate potential V DEACTBe an electronegative potential (as 0 volt), then as word line W 1After being activated, the current potential on it is 5 volts; As word line W 2After non-startup, the current potential on it is 0 volt.Perhaps, can establish initiate potential V ACTBe an electronegative potential (as 0 volt), non-initiate potential V DEACTBe a noble potential (as 5 volts), then as word line W 1After being activated, the current potential on it is 0 volt; As word line W 2After non-startup, the current potential on it is 5 volts.And at initiate potential V ACTWith non-initiate potential V DEACTBetween a critical potential V can be set THCurrent potential on a word line falls within initiate potential V ACTWith critical potential V THBetween the time, the pairing storage unit of this word line can be carried out the action of read/write by the bit line of correspondence; Otherwise the current potential on a word line falls within non-initiate potential V ACTWith critical potential V THBetween the time, the pairing storage unit of this word line just can't be carried out the action of read/write by the bit line of correspondence.Below will set initiate potential V ACTBe 5 volts, non-initiate potential V DEACTBe 0 volt, critical potential V THBe 3 volts with convenient explanation.
In step 201, start word line W 1Represent word line W 1On current potential can be driven to 5 volts of (V ACT), but not start word line W 2Represent word line W 2On current potential can be driven to 0 volt of (V DEACT).
In step 202, word line W 1Be activated, then storage unit M 11Just can pass through bit line B 1With stored data D 1Be sent to controller 110.
In step 203, controller 110 is with demoder 120 and driver P 1Close, so word line W 1Just be in suspended state.Because previous word line W 1Be activated, word line W 2By non-startup, so word line W 1With W 2On current potential be respectively 5 and 0 volts.As previously mentioned, storage unit M 11The condition that can be carried out read/write is word line W 1On current potential need be higher than 3 volts of (critical potential V TH).If there is electrical connection path to be present in word line W 1With W 2Between, word line W then 1On current potential will leak off to word line W owing to electrical connection path 2And reduce word line W gradually 1On current potential.Therefore in step 203, with word line W 1By a period of time T that suspends PPurpose be to judge word line W whereby 1With W 2Between whether have electrical connection path.In other words, if word line W 1With W 2Between there is no and have the electrically connect path, then through after the step 203, word line W 1On current potential still can keep 5 volts to allow storage unit M 11Carry out read/write; If word line W 1With W 2Between have the electrically connect path, then through after the step 203, word line W 1On current potential just can be reduced to and can't allow storage unit carry out read/write.
In step 204, controller 110 is at this schedule time T PAfterwards, open this driver P 1, and with data D 1Complementary state as data D 2, by bit line B 1, with data D 2Write storage unit M 11In.That is to say, if data D 1Be logical one, then data D 2Be logical zero; If data D 1Be logical zero, then data D 2Be logical one.Because this moment, demoder 120 still was in closed condition, so word line W 1Do not restarted (that is not being urged to 5 volts again).Thus, if word line W 1With W 2Between have the electrically connect path, data D then 2Just can't write to storage unit M 11If word line W 1With W 2Between do not have the electrically connect path, data D then 2Just can pass through bit line B 1, write to storage unit M 11More particularly, if word line W 1With W 2Between have the electrically connect path, through after the step 204, storage unit M 11Stored data still are previous data D 1If word line W 1With W 2Between do not have the electrically connect path, storage unit M then 11Stored data just become data D 2
In step 205, controller 110 is opened demoder 120 and driver P 1, and start word line W once more 1, promptly in step 205, word line W 1On current potential can be driven to 5 volts once more.So in step 206, controller 110 just can pass through bit line B 1Come reading cells M 11Stored data D 3
In step 207, controller 110 just can compare the data D that step 206 reads 3With the data D that is read in the step 202 1, judge word line W 1With W 2Between whether have the electrically connect path.More particularly, because in the step 204, controller 110 writes and data D 1The data D of complementary kenel 2, therefore, if in step 204, data D 2Write success, then the data D that in step 207, is read out 3Will be data D 2If in step 204, data D 2Write failure, then the data D that in step 207, is read out 3Will be data D 1Controller 110 so just can compare data D 3With D 1, to judge word line W 1With W 2Between whether have electrical connection path.More particularly, if data D 3With D 1Be complementary kenel, then be illustrated in the data D in the step 204 2Write success, so controller 110 can be judged word line W 1With W 2Between there is no and have electrical connection path; If data D 3With D 1Be identical kenel, then be illustrated in the data D in the step 204 2Write failure, so controller 110 can be judged word line W 1With W 2Between the electrical connection path of existence is arranged, and judge word line W according to this 1Defectiveness.
In sum, the arrangement for detecting of word line defect provided by the present invention, can utilize suspends word line carries out the mode that complementary data writes after a period of time again, detect and whether have electrical connection path between the adjacent word line, so just, can effectively detect defective word line, offer the bigger convenience of user.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.

Claims (6)

1. the arrangement for detecting of a word line defect is characterized in that, comprises:
One first word line is coupled at least one storage unit;
One second word line setting is adjacent to this first word line; And
One controller is coupled to this first word line and this second word line, this controller starts this first word line earlier to read first data that are stored in advance in this storage unit, this controller is again with a schedule time, make this first word line be in suspended state, write then one with one second data of this first data complement to this storage unit, this controller starts this first word line once more reading out one the 3rd data from this storage unit then, and relatively the 3rd data and this second data to judge between this first word line and this second word line whether have an electrical connection path.
2. arrangement for detecting according to claim 1 is characterized in that, when these second data were different from the 3rd data, this controller judged that this electrical connection path is present between this first word line and this second word line.
3. arrangement for detecting according to claim 1 is characterized in that, this controller comprises:
One first driver, corresponding to this first word line and a demoder, this demoder is coupled to this first word line and this second word line, this controller is with this first driver and this demoder is closed so that this first word line is in suspended state, and when this controller cuts out at this demoder, open this first driver, to write these second data to this storage unit.
4. a method of detecting word line defect is characterized in that, a storage unit is coupled to one first word line and second word line adjacent to this first word line, and this method comprises:
(a) start this first word line to read first data that are stored in this storage unit in advance;
(b) with a schedule time, make this first word line be in suspended state, write one second data with this first data complement then to this storage unit;
(c) start this first word line once again, to read one the 3rd data from this storage unit; And
(d) relatively these second data and the 3rd data to judge between this first word line and this second word line whether have an electrical connection path.
5. method according to claim 4 is characterized in that, when these second data are different from the 3rd data, judges that this electrical connection path is present between this first word line and this second word line.
6. method according to claim 4 is characterized in that, one first driver is coupled to this first word line and this second word line corresponding to this first word line and a demoder, and this step (b) comprises:
(b1) close this first driver and this demoder so that this first word line is in suspended state; And
(b2) when this demoder is closed, open this first driver to write these second data to this storage unit.
CN 201010198361 2010-06-08 2010-06-08 Device and method for detecting word line defect Pending CN101882471A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111833953A (en) * 2019-04-18 2020-10-27 旺宏电子股份有限公司 Memory device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5901096A (en) * 1997-03-05 1999-05-04 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device capable of disconnecting an internal booster power supply from a selected word line in response to a test signal and testing method therefor
CN101281786A (en) * 2008-05-08 2008-10-08 钰创科技股份有限公司 Method and related apparatus for detecting breakage of character wire in memory array
CN101377960A (en) * 2007-08-27 2009-03-04 旺宏电子股份有限公司 Apparatus and method for detecting word line leakage in memory devices

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5901096A (en) * 1997-03-05 1999-05-04 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device capable of disconnecting an internal booster power supply from a selected word line in response to a test signal and testing method therefor
CN101377960A (en) * 2007-08-27 2009-03-04 旺宏电子股份有限公司 Apparatus and method for detecting word line leakage in memory devices
CN101281786A (en) * 2008-05-08 2008-10-08 钰创科技股份有限公司 Method and related apparatus for detecting breakage of character wire in memory array

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111833953A (en) * 2019-04-18 2020-10-27 旺宏电子股份有限公司 Memory device
CN111833953B (en) * 2019-04-18 2022-04-19 旺宏电子股份有限公司 Memory device

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Application publication date: 20101110