CN101834137B

CN101834137B - Ion implantation method for source/drain electrodes

Info

Publication number: CN101834137B
Application number: CN2009100474401A
Authority: CN
Inventors: 周地宝
Original assignee: Semiconductor Manufacturing International Shanghai Corp
Current assignee: Semiconductor Manufacturing International Shanghai Corp
Priority date: 2009-03-12
Filing date: 2009-03-12
Publication date: 2012-02-08
Anticipated expiration: 2029-03-12
Also published as: CN101834137A

Abstract

The invention discloses an ion implantation method for source/drain electrodes, which comprises the following steps of: orderly carrying out primary ion implantation and secondary ion implantation on source/drain electrode regions on a wafer, wherein the depth for the primary ion implantation is greater than that for the secondary ion implantation, and the concentration for the primary ion implantation is smaller than that for the secondary ion implantation; and then carrying out ion implantation on the source/drain electrode regions by using carbon ions, wherein the implantation depth of the carbon ions ranges between the depth for the primary ion implantation and the depth for the secondary ion implantation. In the ion implantation method of the source/drain electrodes in the embodiment of the invention, a carbon ion implantation step is added after the completion of the existing IMP1 (Implantation 1) and IMP2, and the implantation depth of the carbon ions is controlled to range between depth for the IMP1 and the depth for the IMP2 to enable the carbon ions to effectively inhibit the high concentration ions in the IMP2 layer from dispersing to a Well in an annealing process, so that a shallower PN (Positive Negative) junction can be formed finally, and the advancing degree from a PN junction depletion layer to the Well can be weakened to increase the width of the effective channel, thereby the control on the MOS (Metal Oxide Semiconductor) pipe short-channel effect is enhanced and the working performance of the MOS pipe device is improved.

Description

The method that the source-drain electrode ion injects

Technical field

The present invention relates to integrated circuit processing and manufacturing technology, be specifically related to the method that the source-drain electrode ion injects.

Background technology

In current integrated circuit processing technology, the processing technology of wafer (wafer) is in core and crucial status the most.Wherein, it is the requisite step of wafer manufacturing procedure that ion in the source-drain electrode forming process injects, and this step has decisive influence for the service behaviour of the metal-oxide-semiconductor field effect t that finally obtains (hereafter is a metal-oxide-semiconductor).As everyone knows, the raising of integrated circuit integrated level is to realize through the size that reduces single metal-oxide-semiconductor, and the raising of integrated circuit arithmetic speed then is to realize through the service behaviour that improves metal-oxide-semiconductor.In order to improve the service behaviour of metal-oxide-semiconductor, the ion concentration that in the IC Chip Production process, improves the injection of source-drain electrode ion is one of method that widely adopts (is commonly referred to highly doped source and leaks injection).

The cross-section structure that carries out the preceding wafer of source-drain electrode ion injection is as shown in Figure 1, for simplicity, only shows the cross-section structure in the scope of territory, a NMOS area under control here.Wherein, the zone of the top is the grid that polysilicon (Poly) layer constitutes, and is that (Gate Oxide in promptly scheming, main component is the oxide of silicon to gate oxide, like SiO under the Poly layer ₂), under the Gate Oxide P type doped region (i.e. P-Well among the figure).

The process of carrying out the injection of source-drain electrode ion is as shown in Figure 2, and said source-drain electrode ion injection generally is divided into the completion of two steps and (for distinguishing said twice injection process, hereinafter source-drain electrode ion injection for the first time is called IMP1; The source-drain electrode ion injects and is called IMP2 for the second time); Wherein, IMP1 and IMP2 are employed to be the homotype ion---promptly for NMOS pipe, the N type that the is ion that IMP1 and IMP2 use; And for the PMOS pipe, the P type that the is ion that IMP1 and IMP2 use; And the employed ion of IMP1 and IMP2 can be ion of the same race, also can be non-ion of the same race.

Be that example describes still below with the NMOS pipe; Visible by Fig. 2; Wait to inject ion and inject whole source drain region from the device top---promptly wait to inject ion and inject the Poly layer simultaneously, thereby and the zone of the Gate Oxide of Poly both sides below---the N+ that forms source-drain electrode is regional.Concerning the NMOS pipe, use N type ion such as phosphorus, arsenic etc. usually, the IMP1 ion implantation concentration is about 10 ¹³～10 ¹⁴Individual/square centimeter (is abbreviated as "/cm with unit " individual/square centimeter " usually ²", Hereinafter the same), it is darker that it injects the degree of depth; The IMP2 ion implantation concentration is about 10 ¹⁵～10 ¹⁶/ cm ²It injects somewhat shallower in depth---and promptly, after the injection of source-drain electrode ion, N+ zone reality is two-layer; And the ion concentration than shallow-layer is higher than far away than more than deep layer one one magnitude---promptly, be than 100 times of the ion concentration of deep layer or higher generally than the ion concentration of shallow-layer.After IMP1 and IMP2 and annealing in process, can obtain cross-section structure as shown in Figure 2.In fact in the N+ zone, the left and right sides any all include two different layer regions of concentration, and more shallow one deck is the high concentration ion that injects in the IMP2 process, and darker one deck is the low concentration ion for injecting in the IMP1 process then.

Operating characteristic according to semiconductor device is understood easily, and the concentration of injecting ion is high more, and the movable charge carrier quantity that the annealing back is activated is just many more, thereby the series resistance between the source-drain electrode will be more little; Simultaneously and since source-drain electrode is carried out ion inject in ion also can be injected into the polysilicon of grid, can make that equally carrier concentration increases in the polysilicon.When metal-oxide-semiconductor was in conducting state, polysilicon gate was attend institute's making alive and is made P-Well district transoid, thereby produced raceway groove, and the place near gate oxide (Gate Oxide) can form one deck depletion layer in polysilicon gate simultaneously.Under the constant situation of other conditions, carrier concentration is big more in the polysilicon gate, and the depletion layer thickness of its formation is thin more.Thereby during said metal-oxide-semiconductor operate as normal, its effective electrical thickness of gate oxide (EOT) will be thin more, subthreshold value amplitude of oscillation S _tCan reduce, thereby can effectively improve device property.

When said NMOS pipe is in by operating state; The sketch map of its cross-section structure is as shown in Figure 3; After the annealed diffusion of ion of in IMP1 and IMP2 process, injecting, two N+ zones about formation, each said N+ zone forms a PN junction with P-Well; Left side solid line L has identified the regional PN junction border that forms with P-Well of left side N+ among the figure, and right side solid line L ' has then identified the PN junction border of N+ zone in right side with P-Well formation.Understand easily; When said NMOS manages not place in circuit; If ignore the disturbance in the production process; The PN junction of left and right sides formation should be in symmetric position (being that L and L ' are about P-Well zone symmetry) in theory; And the L1 and the L1 ' of the depletion layer boundaries in the sign N+ zone, both sides; And the L2 and the L2 ' of the depletion layer boundaries of both sides, sign P-Well zone, also all should be in symmetric position respectively.

When the NMOS pipe was in cut-off state, this moment, grid potential was zero, source ground, and drain electrode connects an operating voltage (high potential), P-Well zone ground connection (not shown).At this moment; In sectional structure chart shown in Figure 3; Can know according to the basic principle of Semiconductor Physics and those skilled in the art's common practise, for the PN junction that right side drain electrode N+ zone and P-Well zone form, the reversed bias voltage (V of N+ zone and the interregional existence of P-Well _Bias) can make both sides, said PN junction border (being right side solid line L ') form depletion layer respectively; Simultaneously; Because the ion doping concentration in the said N+ zone is regional far above P-Well, the depletion width that the depletion width that therefore in the P-Well zone on the left of the L ', forms will form in the N+ zone on L ' right side (there are the relation of approximate reverse ratio in the width of depletion layer and this regional ion doping concentration).If, can see obviously from Fig. 3 that then the distance that this chain-dotted line leaves L ' is bigger with the border of depletion layer in chain-dotted line sign P-Well right side area this moment.Obviously, the increase along with drain voltage (is V _BiasIncrease), the depletion width among the P-Well can further increase thereupon, correspondingly in Fig. 3, promptly shows as said chain-dotted line and is moved to the left.

When said drain voltage increases to a certain degree, said chain-dotted line constantly moves left and will finally cause the border (being L2) of this chain-dotted line and left side depletion layer to overlap i.e. P-Well break-through (PunchThrough).At this moment, the electric current that flows to source electrode from drain electrode will enlarge markedly, and on macroscopic view, just shows as the NMOS pipe and is reversed puncture (Break-down).Usually (Drain toSource Break-down Voltage BVDS) describes the withstand voltage degree of metal-oxide-semiconductor, and comprehensively uses metal-oxide-semiconductor OFF state leakage current (I to utilize reverse breakdown voltage _Off), leak the short-channel effect that an induced barrier decline (DIBL) and threshold voltage (Vth) are described metal-oxide-semiconductor.The high more and/or I of BVDS, Vth _Off, DIBL is more little, the short-channel effect control of expression metal-oxide-semiconductor good more, promptly the device performance of metal-oxide-semiconductor is good more.

Concerning said NMOS pipe, the ion concentration that source-drain electrode injects is high more, and it is after annealing, and the depletion layer when forming PN junction between source-drain electrode and the P-Well is just big more.Therefore adopt highly doped source to leak and inject, can make the border (being solid line L and L ') thereby move to the inside of said two PN junctions among Fig. 3 become more near.Certainly, because this moment, drain electrode loaded operating voltage and source ground, the degree that the degree that the depletion layer of the PN junction that right side drain electrode and P-Well form is expanded to the left wants the long-range PN junction depletion layer that forms with left side source electrode and Well to expand to the right.According to the analysis in the preamble; When metal-oxide-semiconductor is in by operating state; Highly doped source is leaked and is injected the depletion width broad that makes that the P-Well zone in L ' left side forms, and drain electrode adds that operating voltage makes the border of PN junction depletion layer expand again left, thus the PN junction depletion layer on both sides more near; Thereby the short-channel effect of metal-oxide-semiconductor will become obviously (be short-channel effect control relatively poor), situation serious in addition OFF state leakage current (I can appear _Off) excessive and cause the metal-oxide-semiconductor can't operate as normal, and device size is more little, and its short-channel effect is just obvious more.

It is thus clear that, though leaking, highly doped source injects the service behaviour that can improve metal-oxide-semiconductor, can cause metal-oxide-semiconductor tangible short-channel effect to occur.

Summary of the invention

The method that the embodiment of the invention provides a kind of source-drain electrode ion to inject can improve the control to the metal-oxide-semiconductor short-channel effect.

For achieving the above object, technical scheme of the present invention specifically is achieved in that

The method that a kind of source-drain electrode ion injects, this method comprises:

Source drain region on the wafer is carried out the ion injection first time and ion injection for the second time successively, and darker than what the second time, ion injected for the first time, littler than the concentration that the second time, ion injected for the first time;

Then, the use carbon ion carries out ion to source drain region and injects, and the degree of depth that said carbon ion injects is between the degree of depth of the ion injection first time and ion injection for the second time.

For P type source drain region, saidly source drain region on the wafer is carried out ion for the first time successively inject the method for injecting with ion for the second time and comprise:

Use P type ion to carry out the ion injection first time, it is darker that its ion injects degree of depth, and ion concentration is 10 ¹³～10 ¹⁴Individual/square centimeter;

Use P type ion to carry out the ion injection second time, it is more shallow that its ion injects degree of depth, and ion concentration is 10 ¹⁵～10 ¹⁶Individual/square centimeter.

For N type source drain region, saidly source drain region on the wafer is carried out ion for the first time successively inject the method for injecting with ion for the second time and comprise:

Use N type ion to carry out the ion injection first time, it is darker that its ion injects degree of depth, and ion concentration is 10 ¹³～10 ¹⁴Individual/square centimeter;

Use N type ion to carry out the ion injection second time, it is more shallow that its ion injects degree of depth, and ion concentration is 10 ¹⁵～10 ¹⁶Individual/square centimeter.

The concentration that said carbon ion injects is 10 ¹⁴～10 ¹⁵Individual/square centimeter.

Visible by above-mentioned technical scheme; The method that the source-drain electrode ion of the embodiment of the invention injects after existing IMP1 and IMP2 completion, has increased a step that carbon ion injects; And control is injected into the degree of depth between IMP1 and the IMP2 with carbon ion; Make carbon ion in annealing process, can effectively suppress the diffusion of high concentration ion in Well in the IMP2 layer, make that the final PN junction that forms is more shallow, the propelling degree of PN junction depletion layer in Well weakens; Increased the width of effective raceway groove, thereby improved control the metal-oxide-semiconductor short-channel effect.

Description of drawings

Fig. 1 is for carrying out the sketch map of the preflood NMOS pipe of source-drain electrode ion cross-section structure in the prior art.

Fig. 2 is the sketch map that carries out the process of source-drain electrode ion injection in the prior art.

Fig. 3 is in the sketch map of its cross-section structure when operating state for NMOS pipe in the prior art.

Fig. 4 is the sketch map of the NMOS pipe cross-section structure after carbon ion injects in the embodiment of the invention.

Fig. 5 is the sketch map of the NMOS pipe cross-section structure after carbon ion injects in the embodiment of the invention.

Fig. 6 is the sketch map of the NMOS pipe cross-section structure after carbon ion injects in the embodiment of the invention.

Fig. 7 is the sketch map of the NMOS pipe cross-section structure after carbon ion injects in the embodiment of the invention.

Fig. 8 is the sketch map of the NMOS pipe cross-section structure after carbon ion injects in the embodiment of the invention.

Embodiment

For making the object of the invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, to further explain of the present invention.

The method that the embodiment of the invention provides a kind of source-drain electrode ion to inject; This method is accomplished after IMP1 and the IMP2 successively according to existing method; Be not to carry out high annealing immediately to form the N+ zone; But increased the process that a step carbon ion injects, and then carry out high annealing according to existing method, that is:

Steps A: carry out the ion injection first time (being IMP1) according to existing method;

Step B: carry out the ion injection second time (being IMP2) according to existing method;

Step C: adopt carbon ion that source drain region is carried out ion and inject, the degree of depth that said carbon ion injects is between IMP1 and IMP2, and concentration is 10 ¹⁴～10 ¹⁵/ cm ²

The method of introducing said source-drain electrode ion injection below in detail can improve the principle of metal-oxide-semiconductor service behaviour under cut-off state, is that example describes with the NMOS pipe still, and the NMOS of this moment manages cross-section structure as shown in Figure 4:

Inject after the carbon ion; Because the carbon ion layer is between the ion of IMP1 and IMP2 injection; In this zone, can form a large amount of interstitial atoms because carbon ion injects the damage that causes, these interstitial atoms form many energy levels center, when after step C accomplishes, carrying out high annealing; The transient enhanced diffusion effect (TED) of the high concentration ion that said interstitial atom will effectively suppress IMP2 and injected, thus PN junction will reduce to the degree that the P-Well zone advances greatly.Therefore; Through the PN junction depletion layer (at the depletion layer of P-Well one side) that forms behind the high annealing; Comparing will be smaller under the situation that does not have the carbon ion layer in the prior art---and among Fig. 4, the PN junction line of demarcation that forms after the carbon ion is injected in NL, NL ' expression, and L and L ' then represent the formed PN junction of the ion injection method under prior art line of demarcation (being L shown in Fig. 3 and L ')---and visible; The PN junction line of demarcation NL of this moment more takes back than L, and NL ' more takes over than L '.That is, the PN junction line of demarcation that form this moment is than prior art, its phase mutual edge distance farther (be that distance between NL and the NL ' is more farther than the distance between L and the L ', the channel width of metal-oxide-semiconductor is wideer).

Understand easily, after injecting through carbon ion, because the P-Well peak width of said NMOS pipe is wideer; Thereby when it was operated in cut-off state, puncturing the needed voltage of P-Well will be higher, and NMOS pipe therefore shown in Figure 4 is than NMOS pipe shown in Figure 3; Its BVDS and Vth are higher, and DIBL is littler, simultaneously; Under the constant situation of other conditions, flow to the leakage current I of source electrode from drain electrode _OffAlso littler.

Need to prove, in the embodiment of the invention be with the NMOS pipe be example carry out for example, but the present invention can be applied to the PMOS pipe equally.Difference is that for the NMOS pipe, what use among said IMP1, the IMP2 is N type ion such as phosphorus, arsenic etc., and channel type is P-Well; And for the PMOS pipe, said IMP1, what use among the IMP2 then is P type ion such as boron, boron fluoride etc., channel type then is N-Well.Wherein:

1) to the NMOS pipe, the ion that injects among the IMP1 can be a phosphonium ion, and its energy range is 20KeV～50KeV, and concentration range is 10 ¹³/ cm ²～10 ¹⁴/ cm ²Preferably, in practical application, can select: the energy of the phosphonium ion of injection is respectively 22KeV, 26KeV, 32KeV, 40KeV or 46KeV etc., and the concentration of the phosphonium ion of injection is respectively 2 * 10 ¹³/ cm ², 4 * 10 ¹³/ cm ², 6 * 10 ¹³/ cm ², 8 * 10 ¹³/ cm ²Or 9 * 10 ¹³/ cm ²Deng; The ion that injects among the said IMP1 also can be an arsenic ion, and corresponding its energy range is 32KeV～72KeV, and concentration range is 10 ¹³/ cm ²～10 ¹⁴/ cm ²Preferably, in practical application, can select: the energy of the arsenic ion of injection is respectively 35KeV, 42KeV, 50KeV, 57KeV, 62KeV or 70KeV etc., and the concentration of the arsenic ion of injection is respectively 2 * 10 ¹³/ cm ², 3 * 10 ¹³/ cm ², 5 * 10 ¹³/ cm ², 7 * 10 ¹³/ cm ²Or 8 * 10 ¹³/ cm ²Deng.

The ion that injects among the IMP2 can be a phosphonium ion, and its energy range is 6KeV～25KeV, and concentration range is 10 ¹³/ cm ²～10 ¹⁴/ cm ²Preferably, in practical application, can select: the energy of the phosphonium ion of injection is respectively 6KeV, 10KeV, 15KeV, 20KeV or 24KeV etc., and the concentration of the phosphonium ion of injection is respectively 2 * 10 ¹⁵/ cm ², 4 * 10 ¹⁵/ cm ², 6 * 10 ¹⁵/ cm ², 8 * 10 ¹⁵/ cm ²Or 9 * 10 ¹⁵/ cm ²Deng; The ion that injects among the said IMP2 also can be an arsenic ion, and corresponding its energy range is 10KeV～40KeV, and concentration range is 10 ¹⁵/ cm ²～10 ¹⁶/ cm ²Preferably, in practical application, can select: the energy of the arsenic ion of injection is respectively 14KeV, 19KeV, 25KeV, 31KeV or 36KeV, and the concentration of the arsenic ion of injection is respectively 2 * 10 ¹⁵/ cm ², 4 * 10 ¹⁵/ cm ², 6 * 10 ¹⁵/ cm ², 8 * 10 ¹⁵/ cm ²And 9 * 10 ¹⁵/ cm ²Deng.

Need to prove that above-mentioned data are only represented to should not be construed as limiting for example.Simultaneously, there is overlapping situation in the energy range of IMP1 and IMP2 in the said data, understands easily, and in practical application, when carrying out the selection of ion energy, the injection degree of depth of the injection depth ratio IMP2 of necessary assurance IMP1 is darker.Such as, if IMP1 selects the phosphonium ion of 20KeV for use, then when IMP2, though the phosphonium ion energy range of putting down in writing in the preamble is 6～25KeV, this moment is more shallow for the ion that guarantees IMP2 injects the degree of depth, can only in 6～20KeV scope, select the energy of phosphonium ion; And if selected energy among the IMP1 for use is the phosphonium ion of 50KeV, then IMP2 selects ion energy to get final product in 6～25KeV scope arbitrarily.PMOS pipe hereinafter has same situation, explains in the lump that at this analogue repeats no more.

2) to the PMOS pipe, the ion that injects among the IMP1 can be the boron ion, and its energy range is 2KeV～10KeV, and concentration range is 10 ¹³/ cm ²～10 ¹⁴/ cm ²Preferably, in practical application, can select: the boron energy of ions of injection is respectively 3KeV, 5KeV, 6KeV, 7KeV or 9KeV etc., and the concentration of the boron ion of injection is respectively 2 * 10 ¹³/ cm ², 4 * 10 ¹³/ cm ², 6 * 10 ¹³/ cm ², 8 * 10 ¹³/ cm ²Or 9 * 10 ¹³/ cm ²Deng; The ion that injects among the said IMP1 also can be the boron fluoride ion, and its energy range is 6KeV～25KeV, and concentration range is 10 ¹³/ cm ²～10 ¹⁴/ cm ²Preferably, in practical application, can select: the boron fluoride energy of ions of injection is respectively 8KeV, 12KeV, 16KeV, 20KeV or 24KeV etc., and the concentration of the boron fluoride ion of injection is respectively 2 * 10 ¹³/ cm ², 4 * 10 ¹³/ cm ², 6 * 10 ¹³/ cm ², 8 * 10 ¹³/ cm ²Or 9 * 10 ¹³/ cm ²Deng.

The ion that injects among the IMP2 can be the boron fluoride ion, and its energy range is 2KeV～10KeV, and concentration range is 10 ¹⁵/ cm ²～10 ¹⁶/ cm ²Preferably, in practical application, can select: the boron fluoride energy of ions of injection is respectively 3KeV, 5KeV, 6KeV, 7KeV or 9KeV etc., and the concentration of the boron fluoride ion of injection is respectively 2 * 10 ¹⁵/ cm ², 4 * 10 ¹⁵/ cm ², 6 * 10 ¹⁵/ cm ², 8 * 10 ¹⁵/ cm ²And 9 * 10 ¹⁵/ cm ²Deng; The ion that injects among the said IMP2 also can be the boron ion, and its energy range is 1KeV～6KeV, and concentration range is 10 ¹⁵/ cm ²～10 ¹⁶/ cm ²Preferably, in practical application, can select: the boron energy of ions of injection is respectively 2KeV, 3KeV, 4KeV or 5KeV etc., and the concentration of the boron ion of injection is respectively 2 * 10 ¹⁵/ cm ², 4 * 10 ¹⁵/ cm ², 6 * 10 ¹⁵/ cm ², 8 * 10 ¹⁵/ cm ²And 9 * 10 ¹⁵/ cm ²Deng.

At last, it should be explicitly made clear at this point that the step C of said interpolation carbon ion is set in said IMP1 and IMP2 execution afterwards is the most effective and reasonable manner.Set forth respectively below step C is placed on before the steps A, and be placed on the deficiency that has which aspect between steps A and the step B respectively.

If said step C is set in before the steps A---be first execution in step C, carry out IMP1 again.Then the carbon ion of step C injects the ion injection that will influence steps A (IMP1) greatly; Make the ion injection distribution of IMP1 become very precipitous; Thereby the junction capacitance of source-drain electrode and PN junction that P-Well forms is strengthened, and junction capacitance adds the frequency characteristic that conference has a strong impact on integrated circuit.

In addition; If it also is improper that step C is placed between steps A and the step B; Because carbon ion belongs to lighter particle relatively, can occur the channeling effect (Channeling Effect) that ion injects when therefore being injected into active area, thereby the distribution that uncontrollable carbon ion injects; And, just must use heavier ion beam (normally germanium ion) to bombard said active area in advance for fear of the generation of channeling effect, SiO wherein ₂Lattice structure upset and make it become non crystalline structure, could use carbon ion that ion is carried out in the zone that becomes non crystalline structure then and inject.Obviously, this need increase the treatment step that an ion injects, thereby the cost of flow process time and materials is increased.By comparison; The method that the embodiment of the invention provides; It then is the injection of after IMP1 (steps A) and IMP2 (step B) completion, carrying out carbon ion again; Because the ion that uses among the IMP2 (step B) is general relative heavier, so the process of IMP2, be equivalent to when the completion ion injects, realize that heavy ion bombardment changes active area SiO ₂The effect of lattice structure, and its degree of depth of ion that said IMP2 injects is more shallow than the degree of depth that carbon ion injects, and therefore after IMP2 accomplishes, just no longer need before carbon ion injects, carry out special processing to have avoided the generation of channelling effect.

It is thus clear that the method that the embodiment of the invention provides is than step C being set in steps A scheme before, and is minimum to the influence of junction capacitance; And than step C being placed between steps A and the step B, then this programme step still less, flow process is simpler and cost is lower.

Through several groups of following experimental datas; Can show quantitatively through after the carbon ion injection; The change of several Specifeca tion speeification numerical value of metal-oxide-semiconductor, wherein, the wafer that is numbered #BL has adopted highly doped source of the prior art to leak injection method; The wafer that is numbered #CI then is a method of having utilized the embodiment of the invention to provide; 9 positions of picked at random on said two wafer respectively, wherein 1 point in wafer center, 4 points in edge, 4 points of zone line, and all data are all handled through normalization:

1) Fig. 5 is the distribution schematic diagram of the BVDS value that each said position records among said two wafer; Wherein the diamond position indicates the value that the wafer that is numbered #BL goes up the BVDS of position, and circular frame position then indicates the value that the wafer that is numbered #CI goes up the BVDS of position.Find easily by Fig. 5, the method that adopts the embodiment of the invention to provide, BVDS is obvious to become big, and promptly the resistance to pressure of metal-oxide-semiconductor strengthens, and also convergence more of the value distribution of the BVDS of each position among the #CI simultaneously explains that the uniformity of each metal-oxide-semiconductor is better on the wafer.

2) Fig. 6 is the distribution schematic diagram of the DIBL value that each said position records among said two wafer; Wherein the diamond position indicates the value that the wafer that is numbered #BL goes up the DIBL of position, and circular frame position then indicates the value that the wafer that is numbered #CI goes up the DIBL of position.Find easily by Fig. 6, the method that adopts the embodiment of the invention to provide, DIBL obviously reduces, and it is better to explain that the present invention compares conventional method to the control of metal-oxide-semiconductor short-channel effect.

3) Fig. 7 is the I that each said position records among said two wafer _OffThe distribution schematic diagram of value, wherein the diamond position indicates the wafer that is numbered #BL and goes up the I of position _OffValue, circular frame position then indicates the I that the wafer that is numbered #CI goes up the position _OffValue.Find the method that adopts the embodiment of the invention to provide, I easily by Fig. 6 _OffObviously reduce, explain that the service behaviour of metal-oxide-semiconductor under cut-off state improves; The I of each position among the while #CI _OffThe value convergence more that distributes also, explain that the uniformity of each metal-oxide-semiconductor is better.

4) Fig. 8 is the distribution schematic diagram of the Vth value that each said position records among said two wafer; Wherein the diamond position indicates the value that the wafer that is numbered #BL goes up the Vth of position, and circular frame position then indicates the value that the wafer that is numbered #CI goes up the Vth of position.Find easily by Fig. 6, the method that adopts the embodiment of the invention to provide, Vth obviously increases, and is illustrated in short channel place threshold voltage and compares the decline of long raceway groove and will lack, and it is better to explain that the present invention compares conventional method to the control of metal-oxide-semiconductor short-channel effect.

The method to sum up visible, that the source-drain electrode ion that the embodiment of the invention provides injects after existing IMP1 and IMP2 accomplish, has increased a step that carbon ion injects, and controls carbon ion is injected into the degree of depth between IMP1 and the IMP2, and carbon ion concentration is 10 ¹⁴～10 ¹⁵Individual/square centimeter; Make interstitial atom that carbon ion produced in annealing process, can effectively suppress the transient enhanced diffusion of IMP2 layer middle and high concentration ion; Suppressed the expansion of PN junction in Well; Make final source-drain electrode that forms and the PN junction between the Well narrow down at the depletion layer that Well one side forms; Thereby improved the withstand voltage properties of metal-oxide-semiconductor under cut-off state, reduced the leakage current under the cut-off state, improved ability, thereby improved the device performance of metal-oxide-semiconductor the control of MOS short-channel effect.

Claims

1. the method injected of a source-drain electrode ion is characterized in that this method comprises:

2. method according to claim 1 is characterized in that, for P type source drain region, saidly source drain region on the wafer is carried out ion for the first time successively injects the method for injecting with ion for the second time and comprises:

3. method according to claim 1 is characterized in that, for N type source drain region, saidly source drain region on the wafer is carried out ion for the first time successively injects the method for injecting with ion for the second time and comprises:

4. according to claim 1,2 or 3 described methods, it is characterized in that the concentration that said carbon ion injects is 10 ¹⁴～10 ¹⁵Individual/square centimeter.