CN101819361B - TFT-LCD (Thin Film Transistor Liquid Crystal Display) array substrate and manufacture method thereof - Google Patents
TFT-LCD (Thin Film Transistor Liquid Crystal Display) array substrate and manufacture method thereof Download PDFInfo
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- CN101819361B CN101819361B CN 200910078374 CN200910078374A CN101819361B CN 101819361 B CN101819361 B CN 101819361B CN 200910078374 CN200910078374 CN 200910078374 CN 200910078374 A CN200910078374 A CN 200910078374A CN 101819361 B CN101819361 B CN 101819361B
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- 238000000034 method Methods 0.000 title claims abstract description 67
- 239000010409 thin film Substances 0.000 title claims abstract description 55
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 54
- 239000000758 substrate Substances 0.000 title claims abstract description 44
- 239000004973 liquid crystal related substance Substances 0.000 title abstract description 6
- 239000012780 transparent material Substances 0.000 claims abstract description 9
- 229920002120 photoresistant polymer Polymers 0.000 claims description 187
- 239000010408 film Substances 0.000 claims description 155
- 238000005516 engineering process Methods 0.000 claims description 133
- 239000000203 mixture Substances 0.000 claims description 132
- 238000003860 storage Methods 0.000 claims description 122
- 238000002161 passivation Methods 0.000 claims description 102
- 239000004065 semiconductor Substances 0.000 claims description 59
- 238000005530 etching Methods 0.000 claims description 36
- 238000009413 insulation Methods 0.000 claims description 23
- 238000000151 deposition Methods 0.000 claims description 15
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 13
- 238000002207 thermal evaporation Methods 0.000 claims description 13
- 230000015572 biosynthetic process Effects 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 9
- 238000011161 development Methods 0.000 claims description 8
- 238000012546 transfer Methods 0.000 claims description 8
- 239000011248 coating agent Substances 0.000 claims description 7
- 238000000576 coating method Methods 0.000 claims description 7
- 239000007792 gaseous phase Substances 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- 238000013461 design Methods 0.000 abstract description 8
- 239000003990 capacitor Substances 0.000 abstract 3
- 239000007789 gas Substances 0.000 description 15
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 8
- 238000003384 imaging method Methods 0.000 description 8
- 238000013459 approach Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 description 4
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 4
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 4
- 239000000956 alloy Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 229910052804 chromium Inorganic materials 0.000 description 3
- 238000010276 construction Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 239000011521 glass Substances 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention relates to a TFT-LCD (Thin Film Transistor Liquid Crystal Display) array substrate and a manufacture method thereof. The array substrate comprises a grid line and a data line which are formed on the substrate, wherein pixel electrodes and thin film transistors are formed in pixel regions limited by the grid line and the data line; and memory electrodes and connecting electrodes are also formed in the pixel regions, wherein the memory electrodes is made of transparent materials and form memory capacitors with the pixel electrodes, and the connecting electrodes ensure that the memory electrodes in adjacent pixel regions are mutually connected. Through forming the memory electrodes formed by transparent conductive thin films in the pixel regions, the invention can design proper memory capacitors according to actual demands through changing the areas of the memory electrodes, thereby guaranteeing the sufficient allowance of the memory capacitors, effectively reducing the leaping voltage deltaVp and improving the display quality. Furthermore, by adopting the transparent memory electrodes, the aperture ratio and the display brightness can also be effectively improved, thereby the display quality is improved on the whole.
Description
Technical field
The present invention relates to a kind of LCD Structure of thin film transistor and manufacturing approach thereof, especially a kind of TFT-LCD array base palte and manufacturing approach thereof.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor Liquid Crystal Display is called for short TFT-LCD) has characteristics such as volume is little, low in energy consumption, radiationless, in current flat panel display market, has occupied leading position.
TFT-LCD mainly is made up of array base palte and color membrane substrates to box, wherein is formed with thin film transistor (TFT) and pixel electrode that matrix form is arranged on the array base palte, and each pixel electrode is controlled by thin film transistor (TFT).When thin film transistor (TFT) was opened, pixel electrode charged in the time of opening, and after charging finishes, pixel electrode voltage will be maintained to when scanning next time and charge again.In general, liquid crystal capacitance is little, only depends on liquid crystal capacitance can not keep the voltage of pixel electrode, and therefore existing design all is provided with the voltage that a MM CAP keeps pixel electrode.Usually; The main type of MM CAP is: MM CAP is in (Cs on Gate), MM CAP on the grid line (Cs on Common) and unitized construction on public electrode wire; Unitized construction is meant a MM CAP part on grid line, and another part is on public electrode wire.
When TFT-LCD works, owing between source electrode and the gate electrode, have stray capacitance between drain electrode and the gate electrode, therefore can produce a leaping voltage Δ V in the moment that the pixel electrode charging finishes
p, the expression formula of leaping voltage is:
V wherein
GhBe the cut-in voltage of gate electrode, V
GlThe shutoff voltage of gate electrode, C
LcBe liquid crystal capacitance, C
GsBe stray capacitance, C
sBe MM CAP.Research shows, leaping voltage Δ V
pExistence the polarity of pixel electrode is changed, and then cause the voltage difference of positive-negative polarity inconsistent, cause display frame to produce flicker (flicker) phenomenon, seriously influenced display quality, therefore design is gone up and is required the leaping voltage Δ V that produces
pMore little good more.Though through reducing stray capacitance C
GsCan reduce leaping voltage Δ V
p, but because the restriction of manufacture craft, existing TFT-LCD can not eliminate stray capacitance fully.And adopt increase MM CAP C in prior art
sReduce leaping voltage Δ V
pTechnical scheme in, have following technical matters:
(1) for the structure type of MM CAP on grid line, because storage capacitance value is less, so reduce leaping voltage Δ V
pEffect undesirable;
(2),, can effectively reduce leaping voltage Δ V though storage capacitance value is bigger for the structure type of MM CAP on public electrode wire
p, but, therefore cause aperture opening ratio to reduce and the display brightness reduction because public electrode wire has blocked the partial pixel zone;
(3) for the unitized construction type, though the problems referred to above are eased, cause the TFT-LCD array base-plate structure complicated, the manufacture craft difficulty strengthens, and has influenced the product quality of TFT-LCD to a certain extent.
Summary of the invention
The purpose of this invention is to provide a kind of TFT-LCD array base palte and manufacturing approach thereof, when the increase MM CAP is with effective minimizing leaping voltage, also have advantages such as high aperture and high display brightness.
For realizing above-mentioned purpose; The invention provides a kind of TFT-LCD array base palte; Comprise the grid line and the data line that are formed on the substrate; Form pixel electrode and thin film transistor (TFT) in the pixel region that said grid line and data line limit, also be formed with the storage electrode that constitutes the transparent material of MM CAP with said pixel electrode in the said pixel region.
Be formed with passivation layer on the said storage electrode, said pixel electrode is formed on the passivation layer, and making the distance between said storage electrode and the pixel electrode is the thickness of said passivation layer.
Said storage electrode is formed on the doping semiconductor layer; The below of data line remains with transparent conductive film, doped semiconductor films and the semiconductive thin film that forms said storage electrode, and the source electrode of thin film transistor (TFT) and the below of drain electrode remain with the transparent conductive film that forms said storage electrode.Perhaps said storage electrode is formed on the gate insulation layer, and the below of data line remains with the transparent conductive film that forms said storage electrode, and the source electrode of thin film transistor (TFT) and the below of drain electrode remain with the transparent conductive film that forms said storage electrode.
On the technique scheme basis, also be formed with the interconnective connection electrode of storage electrode that makes in the adjacent pixel regions between the adjacent pixel region.
Said connection electrode is formed on the passivation layer, with pixel electrode with layer, and be connected with said storage electrode through the passivation layer via hole of offering on the passivation layer.
To achieve these goals, the present invention also provides a kind of TFT-LCD manufacturing method of array base plate, comprising:
Said step 2 can comprise:
Using plasma strengthens chemical gaseous phase depositing process, deposits gate insulation layer, semiconductive thin film and doped semiconductor films successively;
Adopt the method for magnetron sputtering or thermal evaporation, metallic film is leaked in deposit transparent conductive film and source successively;
Adopt three to transfer mask plate to form the figure that comprises data line, drain electrode, source electrode, TFT channel region and storage electrode through composition technology.
Said employing three transfers mask plate to comprise that through the formation of composition technology the figure of active layer, data line, drain electrode, source electrode, TFT channel region and storage electrode comprises:
Leak coating one deck photoresist on the metallic film in said source;
Adopt three to transfer the mask plate exposure, make photoresist form photoresist and remove zone, the complete reserve area of photoresist, photoresist half reserve area and photoresist part reserve area fully; The complete reserve area of photoresist is corresponding to data line, source electrode and drain electrode figure region; Photoresist half reserve area is corresponding to storage electrode figure region; Photoresist part reserve area is corresponding to TFT channel region figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment; The photoresist thickness of the complete reserve area of photoresist does not change; Photoresist is removed the photoresist in zone fully and is removed fully; The photoresist thickness of photoresist half reserve area reduces, and the photoresist thickness of photoresist part reserve area reduces, and the thickness of photoresist part reserve area photoresist is greater than the thickness of photoresist half reserve area photoresist;
Through the first time etching technics etch away photoresist fully and remove the source in zone fully and leak metallic film, transparent conductive film, doped semiconductor films and semiconductive thin film, form active layer and data line figure;
Photoresist through cineration technics removal first time photoresist half reserve area exposes this regional source and leaks metallic film;
Metallic film is leaked in source through the second time, etching technics etched away photoresist half reserve area fully, forms the storage electrode figure;
Photoresist through cineration technics removal second time photoresist part reserve area exposes this regional source and leaks metallic film;
Metallic film and doped semiconductor films are leaked in the source that etches away photoresist part reserve area through etching technics for the third time fully; And etch away the semiconductive thin film of segment thickness; This regional semiconductive thin film is come out, form source electrode, drain electrode and TFT channel region figure;
Peel off remaining photoresist.
Said step 2 also can comprise:
Using plasma strengthens chemical gaseous phase depositing process, deposits gate insulation layer, semiconductive thin film and doped semiconductor films successively;
Adopt common accent mask plate to form the figure that comprises active layer through composition technology;
Adopt the method for magnetron sputtering or thermal evaporation, metallic film is leaked in deposit transparent conductive film and source successively;
Adopt shadow tone or gray mask plate to form the figure that comprises data line, drain electrode, source electrode, TFT channel region and storage electrode through composition technology.
Said employing shadow tone or gray mask plate form through composition technology and comprise that the figure of data line, drain electrode, source electrode, TFT channel region and storage electrode comprises:
Leak coating one deck photoresist on the metallic film in said source;
Adopt the exposure of shadow tone or gray mask plate, make photoresist form photoresist and remove zone, the complete reserve area of photoresist and photoresist half reserve area fully; The complete reserve area of photoresist is corresponding to data line, source electrode and drain electrode figure region, and photoresist half reserve area is corresponding to storage electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed fully, and the photoresist thickness of photoresist half reserve area reduces;
Through the first time etching technics etch away photoresist fully and remove the source in zone fully and leak metallic film and transparent conductive film; Form data line, source electrode and drain electrode figure; Wherein, the doped semiconductor films between source electrode and the drain electrode is etched away fully, and etches away the semiconductive thin film of segment thickness; This regional semiconductive thin film is come out, form TFT channel region figure;
Photoresist through cineration technics removal photoresist half reserve area exposes this regional source and leaks metallic film;
Metallic film is leaked in source through the second time, etching technics etched away photoresist half reserve area fully, forms the storage electrode figure;
Peel off remaining photoresist.
On the technique scheme basis; Deposit passivation layer on the substrate of completing steps 2; Form the figure that comprises passivation layer first via hole and passivation layer second via hole through composition technology; At least one said passivation layer first via hole is positioned at the top of said drain electrode, and at least two said passivation layer second via holes lay respectively at the edge of said storage electrode both sides; Afterwards; Deposit transparent conductive film on the substrate of accomplishing abovementioned steps; Form the figure that comprises pixel electrode and connection electrode through composition technology; Said pixel electrode is connected with drain electrode through passivation layer first via hole, and said connection electrode interconnects the storage electrode in the adjacent pixel regions through passivation layer second via hole.
The invention provides a kind of TFT-LCD array base palte and manufacturing approach thereof,, form the structure of MM CAP on transparent storage electrode through in pixel region, forming the storage electrode that constitutes by transparent conductive film.Because storage electrode is a transparent material, therefore can design suitable storage electric capacity through the area that changes storage electrode according to actual needs, so just guaranteed sufficient MM CAP surplus, can reduce leaping voltage Δ V effectively
p, improve display quality.Further, the transparent storage electrode of the present invention can the occluded pixels zone, therefore can effectively improve aperture opening ratio and display brightness, has improved the display quality of TFT-LCD on the whole.
Description of drawings
Fig. 1 is the planimetric map of TFT-LCD array base palte of the present invention;
Fig. 2 be among Fig. 1 A1-A1 to sectional view;
Fig. 3 be among Fig. 1 B1-B1 to sectional view;
Fig. 4 is the planimetric map after the TFT-LCD array base palte composition technology first time of the present invention;
Fig. 5 be among Fig. 4 A2-A2 to sectional view;
Fig. 6 is the planimetric map after the TFT-LCD array base palte composition technology second time of the present invention;
Fig. 7 for TFT-LCD array base palte of the present invention for the second time in the composition technology behind the exposure imaging A3-A3 to sectional view;
Fig. 8 for TFT-LCD array base palte of the present invention for the second time in the composition technology behind the exposure imaging B3-B3 to sectional view;
Fig. 9 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the first time behind the etching technics A3-A3 to sectional view;
Figure 10 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the first time behind the etching technics B3-B3 to sectional view;
Figure 11 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the first time behind the cineration technics A3-A3 to sectional view;
Figure 12 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the first time behind the cineration technics B3-B3 to sectional view;
Figure 13 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the second time behind the etching technics B3-B3 to sectional view;
Figure 14 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the second time behind the cineration technics A3-A3 to sectional view;
Figure 15 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the third time behind the etching technics A3-A3 to sectional view;
Figure 16 for TFT-LCD array base palte of the present invention for the second time after the composition technology A3-A3 to sectional view;
Figure 17 for TFT-LCD array base palte of the present invention for the second time after the composition technology B3-B3 to sectional view;
Figure 18 is TFT-LCD array base palte of the present invention planimetric map after the composition technology for the third time;
Figure 19 be among Figure 18 A4-A4 to sectional view;
Figure 20 be among Figure 18 B4-B4 to sectional view;
Figure 21 is the planimetric map after the another kind of manufacture process of TFT-LCD array base palte of the present invention forms active layer, data line, source electrode, drain electrode and storage electrode figure;
Figure 22 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the second time composition technology form A5-A5 behind the active layer pattern to sectional view;
The another kind of manufacture process of Figure 23 TFT-LCD array base palte of the present invention for the third time in the composition technology behind the exposure imaging A5-A5 to sectional view;
Figure 24 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology behind the exposure imaging B5-B5 to sectional view;
Figure 25 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology for the first time behind the etching technics A5-A5 to sectional view;
Figure 26 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology for the first time behind the etching technics B5-B5 to sectional view;
Figure 27 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology behind the cineration technics A5-A5 to sectional view;
Figure 28 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology behind the cineration technics B5-B5 to sectional view;
Figure 29 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology for the second time behind the etching technics B5-B5 to sectional view;
Figure 30 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time after the composition technology A5-A5 to sectional view;
Figure 31 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time after the composition technology B5-B5 to sectional view;
Figure 32 is the process flow diagram of TFT-LCD manufacturing method of array base plate of the present invention;
Figure 33 is the process flow diagram of TFT-LCD manufacturing method of array base plate first embodiment of the present invention;
Figure 34 is the process flow diagram of TFT-LCD manufacturing method of array base plate second embodiment of the present invention.
Description of reference numerals:
The 1-substrate; The 2-gate electrode; The 3-gate insulation layer;
The 4-semiconductor layer; The 5-doping semiconductor layer; 6-source electrode;
The 7-drain electrode; The 8-passivation layer; The 9-pixel electrode;
The 11-grid line; The 12-data line; The 13-storage electrode;
14-passivation layer first via hole; 15-passivation layer second via hole; The 16-connection electrode;
The 21-transparent conductive film; Metallic film is leaked in the 22-source; The 23-semiconductive thin film;
The 24-doped semiconductor films; The 30-photoresist.
Embodiment
Through accompanying drawing and embodiment, technical scheme of the present invention is done further detailed description below.
Fig. 1 is the planimetric map of TFT-LCD array base palte of the present invention, and what reflected is the structure of a pixel cell, Fig. 2 be among Fig. 1 A1-A1 to sectional view, Fig. 3 be among Fig. 1 B1-B1 to sectional view.Like Fig. 1～shown in Figure 3; The agent structure of TFT-LCD array base palte of the present invention comprises grid line 11, data line 12, pixel electrode 9, thin film transistor (TFT) and the storage electrode 13 that is formed on the substrate 1; Orthogonal grid line 11 has defined pixel region with data line 12, and thin film transistor (TFT) and pixel electrode 9 are formed in the pixel region, and grid line 11 is used for to thin film transistor (TFT) start signal being provided; Data line 12 is used for to pixel electrode 9 data-signal being provided; The storage electrode 13 of transparent material is used for constituting MM CAP with pixel electrode 9, and storage electrode 13 of the present invention adopts transparent conductive film, like tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide; Be formed in the pixel region, the storage electrode 13 in the adjacent pixel regions connects through connection electrode 16.Particularly, TFT-LCD array base palte of the present invention comprises the grid line 11 and gate electrode 2 that is formed on the substrate 1, and gate electrode 2 is connected with grid line 11; Gate insulation layer 3 is formed on gate electrode 2 and the grid line 11 and covers whole base plate 1; Active layer (comprising semiconductor layer 4 and doping semiconductor layer 5) is formed on the gate insulation layer 3 and is positioned at the top of gate electrode 2; Source electrode 6 is formed on the active layer with drain electrode 7; One end of source electrode 6 is positioned at the top of gate electrode 2; The other end is connected with data line 12, and an end of drain electrode 7 is positioned at the top of gate electrode 2, and the other end is connected with pixel electrode 9 through passivation layer first via hole of offering on the passivation layer 8 14; Form the TFT channel region between source electrode 6 and the drain electrode 7; The doping semiconductor layer 5 of TFT channel region is etched away fully, and etches away the semiconductor layer 4 of segment thickness, and the semiconductor layer 4 of TFT channel region is come out; Storage electrode 13 is formed on the doping semiconductor layer 5; Passivation layer 8 is formed on data line 12, source electrode 6, drain electrode 7 and the storage electrode 13 and covers whole base plate 1; Offer passivation layer first via hole 14 that drain electrode 7 is connected with pixel electrode 9 in drain electrode 7 positions, offer storage electrode 13 interconnective passivation layer second via holes 15 that make adjacent pixel regions at the marginal position of storage electrode 13; Pixel electrode 9 is formed on the passivation layer 8 with connection electrode 16, and pixel electrode 9 is connected with drain electrode 7 through passivation layer first via hole 14, and connection electrode 16 interconnects the storage electrode 13 of adjacent pixel regions through passivation layer second via hole 15.
Fig. 4～Figure 20 is the synoptic diagram of a kind of manufacture process of TFT-LCD array base palte of the present invention; Can further specify technical scheme of the present invention; In following explanation; The alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching and photoresist lift off, and photoresist is example with the positive photoresist.
Fig. 4 is TFT-LCD array base palte of the present invention planimetric map after the composition technology for the first time, and what reflected is the structure of a pixel cell, Fig. 5 be among Fig. 4 A2-A2 to sectional view.At first adopt the method for magnetron sputtering or thermal evaporation; Go up deposition one deck grid metallic film at substrate 1 (like glass substrate or quartz base plate); The grid metallic film can adopt metal or alloy such as Cr, W, Ti, Ta, Mo, Al, Cu, also can adopt the laminated film that is made up of the multiple layer metal film.Adopt the normal masks plate to form the figure that comprises grid line 11 and gate electrode 2, like Fig. 4 and shown in Figure 5 through composition technology.
Fig. 6 is the planimetric map after the TFT-LCD array base palte composition technology second time of the present invention; What reflected is the structure of a pixel cell; Fig. 7 for TFT-LCD array base palte of the present invention for the second time in the composition technology behind the exposure imaging A3-A3 to sectional view, Fig. 8 for TFT-LCD array base palte of the present invention for the second time in the composition technology behind the exposure imaging B3-B3 to sectional view.On the substrate of accomplishing above-mentioned Fig. 4 structure graph; Using plasma strengthens chemical vapor deposition (being called for short PECVD) method; Deposit gate insulation layer 3, semiconductive thin film 23 and doped semiconductor films 24 successively; Then adopt the method for magnetron sputtering or thermal evaporation, deposit transparent conductive film 21 leaks metallic film 22 with the source successively.Gate insulation layer 3 can be selected oxide, nitride or oxynitrides for use, and corresponding reacting gas can be SiH
4, NH
3, N
2Mixed gas or SiH
2Cl
2, NH
3, N
2Mixed gas; Semiconductive thin film 23 corresponding reacting gas can be SiH
4, H
2Mixed gas or SiH
2Cl
2, H
2Mixed gas; Doped semiconductor films 24 corresponding reacting gas can be SiH
4, PH
3, H
2Mixed gas or SiH
2Cl
2, PH
3, H
2Mixed gas; Transparent conductive film 21 can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide, also can adopt other metal and metal oxide; Metallic film 22 is leaked in the source can adopt metal or alloy such as Cr, W, Ti, Ta, Mo, Al, Cu, also can adopt the laminated film that is made up of the multiple layer metal film.Subsequently, leak coating one deck photoresist 30 on the metallic film 22, adopt three to transfer the mask plates exposure, make photoresist form complete exposure area A, unexposed area B, half exposure area C and partial exposure area D in the source.Unexposed area B is corresponding to data line, source electrode and drain electrode figure region; Half exposure area C is corresponding to storage electrode figure region; Partial exposure area D is corresponding to TFT channel region figure region, and complete exposure area A is corresponding to the zone beyond the above-mentioned figure.After the development treatment, the photoresist thickness of unexposed area B does not change, and forms the complete reserve area of photoresist; The photoresist of complete exposure area A is removed fully; Form photoresist and remove the zone fully, the photoresist thickness of half exposure area C reduces half the, forms photoresist half reserve area; The photoresist thickness of partial exposure area D slightly reduces; Form photoresist part reserve area, the thickness of photoresist part reserve area photoresist is greater than the thickness of photoresist half reserve area photoresist, like Fig. 7, shown in Figure 8.Three accent mask plates are a kind of mask plates with three kinds of transmissivities, add light tight zone, can form four exposure areas.In the practical application, can adopt three of multiple version to transfer mask plate, for example can adopt the half-tone mask plate that has slit.
Fig. 9 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the first time behind the etching technics A3-A3 to sectional view, Figure 10 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the first time behind the etching technics B3-B3 to sectional view.Metallic film 22, transparent conductive film 21, doped semiconductor films 24 and semiconductive thin film 23 are leaked in source through the first time, etching technics etched away complete exposure area A fully; Formation comprises the figure of active layer and data line; Active layer comprises semiconductor layer 4 and doping semiconductor layer 5, like Fig. 9 and shown in Figure 10.
Figure 11 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the first time behind the cineration technics A3-A3 to sectional view, Figure 12 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the first time behind the cineration technics B3-B3 to sectional view.Through the cineration technics first time, get rid of the photoresist of half exposure area C, expose this regional source and leak metallic film 22, like Figure 11 and shown in Figure 12.Because the thickness of partial exposure area D (photoresist part reserve area) photoresist is greater than the thickness of half exposure area C (photoresist half reserve area) photoresist, therefore behind the cineration technics first time, partial exposure area D still is coated with certain thickness photoresist 30.
Figure 13 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the second time behind the etching technics B3-B3 to sectional view.Metallic film 22 is leaked in source through the second time, etching technics etched away half exposure area C fully, forms storage electrode 13 figures, and storage electrode 13 belows remain with doped semiconductor films 24 and semiconductive thin film 23, and are shown in figure 13.In the practical application, the shape and size of storage electrode 13 can design according to actual needs.
Figure 14 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the second time behind the cineration technics A3-A3 to sectional view.Through the cineration technics second time, get rid of the photoresist of partial exposure area D, expose this regional source and leak metallic film 22, shown in figure 14.
Figure 15 for TFT-LCD array base palte of the present invention for the second time in the composition technology for the third time behind the etching technics A3-A3 to sectional view.Metallic film 22, transparent conductive film 21 and doping semiconductor layer 5 are leaked in the source that etches away partial exposure area D through etching technics for the third time fully; And etch away the semiconductor layer 4 of segment thickness; This regional semiconductor layer 4 is come out; Formation source electrode 6, drain electrode 7 and TFT channel region figure, shown in figure 15.
Figure 16 for TFT-LCD array base palte of the present invention for the second time after the composition technology A3-A3 to sectional view, Figure 17 for TFT-LCD array base palte of the present invention for the second time after the composition technology B3-B3 to sectional view.Peel off remaining photoresist at last, accomplish TFT-LCD array base palte of the present invention composition technology for the second time, like Fig. 6, Figure 16 and shown in Figure 17.After the present invention's composition technology second time; Gate insulation layer 3 is formed on grid line 11 and the gate electrode 2 and covers whole base plate 1, and active layer (comprising semiconductor layer 4 and doping semiconductor layer 5) is formed on the gate insulation layer 3 and is positioned at the top of gate electrode 2, and source electrode 6 is formed on the active layer with drain electrode 7; One end of source electrode 6 is positioned at the top of gate electrode 2; The other end is connected with data line 12, and an end of drain electrode 7 is positioned at the top of gate electrode 2, is oppositely arranged with source electrode 6; Form the TFT channel region between source electrode 6 and the drain electrode 7; The doping semiconductor layer 5 of TFT channel region is etched away fully, and etches away the semiconductor layer 4 of segment thickness, and the semiconductor layer 4 of TFT channel region is come out.The storage electrode 13 that is formed by transparent conductive film is arranged in the pixel region; Storage electrode 13 belows remain with doped semiconductor films 24 and semiconductive thin film 23; Data line 12 belows remain with transparent conductive film 21, doped semiconductor films 24 and semiconductive thin film 23, and the below of source electrode 6 and drain electrode 7 remains with transparent conductive film 21.
Figure 18 is TFT-LCD array base palte of the present invention planimetric map after the composition technology for the third time, and what reflected is the structure of a pixel cell, Figure 19 be among Figure 18 A4-A4 to sectional view, Figure 20 be among Figure 18 B4-B4 to sectional view.On the substrate of accomplishing above-mentioned Fig. 6 structure graph, adopt PECVD method deposit passivation layer 8.Passivation layer 8 can adopt oxide, nitride or oxynitrides, and corresponding reacting gas can be SiH
4, NH
3, N
2Mixed gas or SiH
2Cl
2, NH
3, N
2Mixed gas.Adopt the normal masks plate passivation layer 8 to be carried out composition through composition technology; Form passivation layer first via hole 14 and passivation layer second via hole 15; Wherein, at least one passivation layer first via hole 14 is positioned at the top of drain electrode 7, and at least two passivation layer second via holes 15 lay respectively at the edge of storage electrode 13 both sides near data line; Every lateral edges at least one, like Figure 18, Figure 19 and shown in Figure 20.In order to reduce bad connection, can be employed in each junction in the practical application a plurality of passivation layer via hole structures are set, present embodiment has only illustrated to adopt the structure of a passivation layer first via hole 14 and two passivation layer second via holes 15.In this composition technology, also be formed with the grid line interface via hole in grid line interface zone (grid line PAD) and the data line interface via hole figures in data line interface zone (data line PAD) simultaneously.Above-mentioned technology through composition technology formation grid line interface via hole and data line interface via pattern has been widely used in the present composition technology.
At last; On the substrate of accomplishing the said structure figure, adopt the method for magnetron sputtering or thermal evaporation, deposition layer of transparent conductive film; Transparent conductive film can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide, also can adopt other metal and metal oxide.Adopt the normal masks plate to form pixel electrode 9 and connection electrode 16 through composition technology; Pixel electrode 9 is connected with drain electrode 7 through passivation layer first via hole 14; Connection electrode 16 is connected with storage electrode 13 through passivation layer second via hole 15 of storage electrode 13 both sides of the edge; The storage electrode 13 of adjacent two pixel regions is coupled together, like Fig. 1, Fig. 2 and shown in Figure 3.
Four composition technologies discussed above only are a kind of implementation methods of preparation TFT-LCD array base palte of the present invention, can also be through increasing or reduce composition technology number of times, selecting material different or combination of materials to realize the present invention in actual the use.For example; TFT-LCD array base palte of the present invention composition technology for the second time both can be accomplished by secondary composition technology; Also can accomplish by three composition technologies; Secondary composition technology comprises the composition technology and the composition technology that adopts shadow tone or gray mask plate that adopt the normal masks plate; Promptly form active layer pattern, form data line, source electrode, drain electrode and storage electrode figure through the composition technology that once adopts shadow tone or gray mask plate through the composition technology that once adopts the normal masks plate; Three times composition technology comprises three composition technologies that adopt the normal masks plate; Promptly form active layer pattern through the composition technology that once adopts the normal masks plate; Composition technology through once adopting the normal masks plate forms the storage electrode figure, forms data line, source electrode, drain electrode and TFT channel region figure through the composition technology that once adopts the normal masks plate.
Figure 21～Figure 31 is the synoptic diagram of the another kind of manufacture process of TFT-LCD array base palte of the present invention; Different with aforementioned manufacture process is; This manufacture process is a kind of five composition technologies, promptly through composition technology formation for the first time grid line and gate electrode figure (identical with the composition technology first time of aforementioned manufacture process); The composition technology second time through adopting the normal masks plate forms active layer pattern; The technology of composition for the third time through adopting shadow tone or gray mask plate forms data line, source electrode, drain electrode and storage electrode figure; Form passivation layer via hole figure (identical) through the 4th composition technology with the technology of composition for the third time of aforementioned manufacture process; Form pixel electrode and connection electrode figure (identical) through the 5th composition technology with the 4th composition technology of aforementioned manufacture process.
Figure 21 is the planimetric map after the another kind of manufacture process of TFT-LCD array base palte of the present invention forms active layer, data line, source electrode, drain electrode and storage electrode figure, and what reflected is the structure of a pixel cell.Concrete manufacture process is explained as follows:
Figure 22 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the second time composition technology form A5-A5 behind the active layer pattern to sectional view.On the substrate of accomplishing grid line and gate electrode figure, adopt the PECVD method to deposit gate insulation layer 3, semiconductive thin film and doped semiconductor films successively.Adopt the normal masks plate above gate electrode 2, to form active layer pattern through composition technology, active layer comprises semiconductor layer 4 and doping semiconductor layer 5, and is shown in figure 22.
The another kind of manufacture process of Figure 23 TFT-LCD array base palte of the present invention for the third time in the composition technology behind the exposure imaging A5-A5 to sectional view, Figure 24 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology behind the exposure imaging B5-B5 to sectional view.On the substrate of accomplishing the said structure figure, adopt the method for magnetron sputtering or thermal evaporation, deposit transparent conductive film 21 leaks metallic film 22 with the source successively.Subsequently, leak coating one deck photoresist 30 on the metallic film 22, adopt the exposure of shadow tone or gray mask plate, make photoresist form complete exposure area A, unexposed area B and half exposure area C in the source.Unexposed area B is corresponding to data line, source electrode and drain electrode figure region, and half exposure area C is corresponding to storage electrode figure region, complete exposure area A corresponding to above-mentioned figure with exterior domain.After the development treatment; The photoresist of unexposed area B does not change, and forms the complete reserve area of photoresist, and the photoresist of complete exposure area A is removed fully; Form photoresist and remove the zone fully; The photoresist thickness of half exposure area C reduces half the, forms photoresist half reserve area, like Figure 23 and shown in Figure 24.
Figure 25 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology for the first time behind the etching technics A5-A5 to sectional view, Figure 26 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology for the first time behind the etching technics B5-B5 to sectional view.Metallic film 22 and transparent conductive film 21 are leaked in source through the first time, etching technics etched away complete exposure area A fully; Form data line 12, source electrode 6 and drain electrode 7, wherein, form the TFT channel region between source electrode 6 and the drain electrode 7; The doping semiconductor layer 5 of TFT channel region is etched away fully; And etch away the semiconductor layer 4 of segment thickness, the semiconductor layer 4 of TFT channel region is come out, like Figure 25 and shown in Figure 26.
Figure 27 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology behind the cineration technics A5-A5 to sectional view, Figure 28 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology behind the cineration technics B5-B5 to sectional view.Pass through cineration technics; Get rid of the photoresist of half exposure area C; Expose this regional source and leak metallic film 22, because the thickness of unexposed area B photoresist is greater than the thickness of half exposure area C photoresist, so behind the cineration technics; Unexposed area B still is coated with certain thickness photoresist 30, like Figure 27 and shown in Figure 28.
Figure 29 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time in the composition technology for the second time behind the etching technics B5-B5 to sectional view.Metallic film 22 is leaked in source through the second time, etching technics etched away half exposure area C fully, exposes transparent conductive film, forms storage electrode 13 figures, and is shown in figure 29.
Figure 30 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time after the composition technology A5-A5 to sectional view, Figure 31 for the another kind of manufacture process of TFT-LCD array base palte of the present invention for the third time after the composition technology B5-B5 to sectional view.Peel off remaining photoresist at last, accomplish TFT-LCD array base palte of the present invention composition technology for the second time, like Figure 21, Figure 30, shown in Figure 31.This manufacture process is for the third time after the composition technology, and gate insulation layer 3 is formed on grid line 11 and the gate electrode 2 and covers whole base plate 1, and active layer (comprising semiconductor layer 4 and doping semiconductor layer 5) is formed on the gate insulation layer 3 and is positioned at the top of gate electrode 2; One end of source electrode 6 is positioned on the active layer; The other end is connected with data line 12, and an end of drain electrode 7 is positioned on the active layer, is oppositely arranged with source electrode 6; Form the TFT channel region between source electrode 6 and the drain electrode 7; The doping semiconductor layer 5 of TFT channel region is etched away fully, and etches away the semiconductor layer 4 of segment thickness, and the semiconductor layer 4 of TFT channel region is come out.Be arranged on the storage electrode 13 that is formed by transparent conductive film in the pixel region and be formed on the gate insulation layer 3, the below of data line 12, source electrode 6 and drain electrode 7 remains with transparent conductive film 21.
The invention provides a kind of TFT-LCD array base palte,, form the structure of MM CAP on transparent storage electrode through in pixel region, forming the storage electrode that constitutes by transparent conductive film.Because storage electrode is a transparent material, therefore can design suitable storage electric capacity through the area that changes storage electrode according to actual needs, so just guaranteed sufficient MM CAP surplus, can reduce leaping voltage Δ V effectively
p, improve display quality.The transparent storage electrode of the present invention can the occluded pixels zone, therefore can effectively improve aperture opening ratio and display brightness, has improved display quality on the whole.Further, because the distance between storage electrode of the present invention and the pixel electrode is the thickness of passivation layer, therefore for the storage electrode of same size, its formed MM CAP is bigger.
Figure 32 is the process flow diagram of TFT-LCD manufacturing method of array base plate of the present invention, comprising:
In the technique scheme of the present invention; Because storage electrode is made up of transparent conductive film; Be transparent material; Therefore can design suitable storage electric capacity through the area that changes storage electrode according to actual needs, so just guarantee sufficient MM CAP surplus, can reduce leaping voltage Δ V effectively
p, improve display quality.
Further specify the technical scheme of TFT-LCD manufacturing method of array base plate of the present invention below through specific embodiment.
Figure 33 is the process flow diagram of TFT-LCD manufacturing method of array base plate first embodiment of the present invention, and in technical scheme shown in Figure 32, said step 2 comprises:
The mask plates exposure is transferred in step 14, employing three, makes photoresist form photoresist and removes zone, the complete reserve area of photoresist, photoresist half reserve area and photoresist part reserve area fully; The complete reserve area of photoresist is corresponding to data line, source electrode and drain electrode figure region; Photoresist half reserve area is corresponding to storage electrode figure region; Photoresist part reserve area is corresponding to TFT channel region figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment; The photoresist thickness of the complete reserve area of photoresist does not change; Photoresist is removed the photoresist in zone fully and is removed fully; The photoresist thickness of photoresist half reserve area reduces, and the photoresist thickness of photoresist part reserve area reduces, and the thickness of photoresist part reserve area photoresist is greater than the thickness of photoresist half reserve area photoresist;
Metallic film and doped semiconductor films are leaked in step 19, the source that etches away photoresist part reserve area fully through etching technics for the third time; And etch away the semiconductive thin film of segment thickness; This regional semiconductive thin film is come out, form source electrode, drain electrode and TFT channel region figure; Peel off remaining photoresist.
Present embodiment is a kind of technical scheme that adopts the multistep etching technics to form active layer, data line, drain electrode, source electrode, TFT channel region and storage electrode figure simultaneously through composition technology; Its preparation process is introduced in earlier figures 6～technical scheme shown in Figure 17 in detail, repeats no more here.
Figure 34 is the process flow diagram of TFT-LCD manufacturing method of array base plate second embodiment of the present invention, and in technical scheme shown in Figure 32, said step 2 comprises:
Present embodiment is a kind of technical scheme that adopts normal masks plate and shadow tone or gray mask plate to form active layer, data line, drain electrode, source electrode, TFT channel region and storage electrode figure respectively through secondary composition technology; Its preparation process is introduced in aforementioned Figure 21～technical scheme shown in Figure 31 in detail, repeats no more here.
In the step 1 of the present invention; At first adopt the method for magnetron sputtering or thermal evaporation; Go up deposition one deck grid metallic film at substrate (like glass substrate or quartz base plate); The grid metallic film can adopt metal or alloy such as Cr, W, Ti, Ta, Mo, Al, Cu, also can adopt the laminated film that is made up of the multiple layer metal film.Adopt the normal masks plate to form the figure that comprises grid line and gate electrode through composition technology.
In the step 3 of the present invention, at first adopt PECVD method deposit passivation layer.Passivation layer can adopt oxide, nitride or oxynitrides, and corresponding reacting gas can be SiH
4, NH
3, N
2Mixed gas or SiH
2Cl
2, NH
3, N
2Mixed gas.Adopt the normal masks plate through composition technology passivation layer to be carried out composition, form the figure that comprises passivation layer first via hole, wherein passivation layer first via hole is positioned at the top of drain electrode.In this composition technology, also be formed with the grid line interface via hole in grid line interface zone and the data line interface via hole figures in data line interface zone simultaneously.Above-mentioned technology through composition technology formation grid line interface via hole and data line interface via pattern has been widely used in the present composition technology.Afterwards, adopt the method for magnetron sputtering or thermal evaporation, deposition layer of transparent conductive film, transparent conductive film can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide, also can adopt other metal and metal oxide.Adopt the normal masks plate to form through composition technology and comprise pattern of pixel electrodes, pixel electrode is connected with drain electrode through passivation layer first via hole.
On the basis of TFT-LCD manufacturing method of array base plate previous embodiment of the present invention, can also comprise the technical scheme that forms connection electrode in the step 3, connection electrode is used to make the storage electrode in the adjacent pixel regions to interconnect.Said step 3 comprises: deposit passivation layer on the substrate of completing steps 2; Form the figure that comprises passivation layer first via hole and passivation layer second via hole through composition technology; At least one said passivation layer first via hole is positioned at the top of said drain electrode, and at least two said passivation layer second via holes lay respectively at the edge of said storage electrode both sides; Afterwards; Deposit transparent conductive film on the substrate of accomplishing abovementioned steps; Form the figure that comprises pixel electrode and connection electrode through composition technology; Said pixel electrode is connected with drain electrode through passivation layer first via hole, and said connection electrode interconnects the storage electrode in the adjacent pixel regions through passivation layer second via hole.
Particularly; At first adopt PECVD method deposit passivation layer, adopt the normal masks plate passivation layer to be carried out composition, form passivation layer first via hole and passivation layer second via hole through composition technology; Wherein, At least one passivation layer first via hole is positioned at the top of drain electrode, and at least two passivation layer second via holes lay respectively at the edge of storage electrode both sides near data line, every lateral edges at least one.In order to reduce bad connection, can be employed in each junction in the practical application a plurality of passivation layer via hole structures are set.Afterwards; Adopt the method for magnetron sputtering or thermal evaporation; Deposition layer of transparent conductive film adopts the normal masks plate to form pixel electrode and connection electrode through composition technology, and pixel electrode is connected with drain electrode through passivation layer first via hole; Connection electrode is connected with storage electrode through passivation layer second via hole of storage electrode both sides of the edge, and the storage electrode of two pixel regions is coupled together.
The invention provides a kind of TFT-LCD manufacturing method of array base plate,, form the structure of MM CAP on transparent storage electrode through in pixel region, forming the storage electrode that constitutes by transparent conductive film.Because storage electrode is a transparent material, therefore can design suitable storage electric capacity through the area that changes storage electrode according to actual needs, so just guaranteed sufficient MM CAP surplus, can reduce leaping voltage Δ V effectively
p, improve display quality.Further, the transparent storage electrode of the present invention can the occluded pixels zone, therefore can effectively improve aperture opening ratio and display brightness, has improved display quality on the whole.
What should explain at last is: above embodiment is only unrestricted in order to technical scheme of the present invention to be described; Although the present invention is specified with reference to preferred embodiment; Those of ordinary skill in the art is to be understood that; Can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and the scope of technical scheme of the present invention.
Claims (10)
1. TFT-LCD array base palte; Comprise the grid line and the data line that are formed on the substrate; Form pixel electrode and thin film transistor (TFT) in the pixel region that said grid line and data line limit; It is characterized in that, also be formed with the storage electrode that constitutes the transparent material of MM CAP with said pixel electrode in the said pixel region;
Be formed with passivation layer on the said storage electrode, said pixel electrode is formed on the passivation layer, and making the distance between said storage electrode and the pixel electrode is the thickness of said passivation layer;
Said storage electrode is formed on the doping semiconductor layer; The below of data line remains with transparent conductive film, doped semiconductor films and the semiconductive thin film that forms said storage electrode, and the source electrode of thin film transistor (TFT) and the below of drain electrode remain with the transparent conductive film that forms said storage electrode.
2. TFT-LCD array base palte according to claim 1 is characterized in that, also is formed with the interconnective connection electrode of storage electrode that makes in the adjacent pixel regions between the adjacent pixel region.
3. TFT-LCD array base palte according to claim 2 is characterized in that said connection electrode is formed on the passivation layer, with pixel electrode with layer, and be connected with said storage electrode through the passivation layer via hole of offering on the passivation layer.
4. TFT-LCD array base palte; Comprise the grid line and the data line that are formed on the substrate; Form pixel electrode and thin film transistor (TFT) in the pixel region that said grid line and data line limit; It is characterized in that, also be formed with the storage electrode that constitutes the transparent material of MM CAP with said pixel electrode in the said pixel region;
Be formed with passivation layer on the said storage electrode, said pixel electrode is formed on the passivation layer, and making the distance between said storage electrode and the pixel electrode is the thickness of said passivation layer;
Said storage electrode is formed on the gate insulation layer, and the below of data line remains with the transparent conductive film that forms said storage electrode, and the source electrode of thin film transistor (TFT) and the below of drain electrode remain with the transparent conductive film that forms said storage electrode.
5. TFT-LCD array base palte according to claim 4 is characterized in that, also is formed with the interconnective connection electrode of storage electrode that makes in the adjacent pixel regions between the adjacent pixel region.
6. TFT-LCD array base palte according to claim 5 is characterized in that said connection electrode is formed on the passivation layer, with pixel electrode with layer, and be connected with said storage electrode through the passivation layer via hole of offering on the passivation layer.
7. a TFT-LCD manufacturing method of array base plate is used to make the described TFT-LCD array base palte of claim 1, it is characterized in that, comprising:
Step 1, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode through composition technology;
Step 2, on the substrate of completing steps 1, deposit gate insulation layer, semiconductive thin film, doped semiconductor films, transparent conductive film and metallic film is leaked in the source; Form the figure that comprises active layer, data line, drain electrode, source electrode, TFT channel region and storage electrode through composition technology; Wherein, Said storage electrode is formed by said transparent conductive film, and is formed in the pixel region;
Step 3, on the substrate of completing steps 2 deposit passivation layer, form the figure comprise passivation layer first via hole through composition technology, said passivation layer first via hole is positioned at the top of said drain electrode; Afterwards, the deposit transparent conductive film comprises pattern of pixel electrodes through the formation of composition technology, and said pixel electrode is connected with drain electrode through passivation layer first via hole;
Wherein, said step 2 comprises:
Using plasma strengthens chemical gaseous phase depositing process, deposits gate insulation layer, semiconductive thin film and doped semiconductor films successively;
Adopt the method for magnetron sputtering or thermal evaporation, metallic film is leaked in deposit transparent conductive film and source successively;
Adopt three to transfer mask plate to form the figure that comprises active layer, data line, drain electrode, source electrode, TFT channel region and storage electrode through composition technology;
Wherein, said employing three transfers mask plate to comprise that through the formation of composition technology the figure of active layer, data line, drain electrode, source electrode, TFT channel region and storage electrode comprises:
Leak coating one deck photoresist on the metallic film in said source;
Adopt three to transfer the mask plate exposure, make photoresist form photoresist and remove zone, the complete reserve area of photoresist, photoresist half reserve area and photoresist part reserve area fully; The complete reserve area of photoresist is corresponding to data line, source electrode and drain electrode figure region; Photoresist half reserve area is corresponding to storage electrode figure region; Photoresist part reserve area is corresponding to TFT channel region figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment; The photoresist thickness of the complete reserve area of photoresist does not change; Photoresist is removed the photoresist in zone fully and is removed fully; The photoresist thickness of photoresist half reserve area reduces, and the photoresist thickness of photoresist part reserve area reduces, and the thickness of photoresist part reserve area photoresist is greater than the thickness of photoresist half reserve area photoresist;
Through the first time etching technics etch away photoresist fully and remove the source in zone fully and leak metallic film, transparent conductive film, doped semiconductor films and semiconductive thin film, form active layer and data line figure;
Photoresist through cineration technics removal first time photoresist half reserve area exposes this regional source and leaks metallic film;
Metallic film is leaked in source through the second time, etching technics etched away photoresist half reserve area fully, forms the storage electrode figure;
Photoresist through cineration technics removal second time photoresist part reserve area exposes this regional source and leaks metallic film;
Metallic film and doped semiconductor films are leaked in the source that etches away photoresist part reserve area through etching technics for the third time fully; And etch away the semiconductive thin film of segment thickness; This regional semiconductive thin film is come out, form source electrode, drain electrode and TFT channel region figure;
Peel off remaining photoresist.
8. TFT-LCD manufacturing method of array base plate according to claim 7 is characterized in that, said step 3 comprises:
Deposit passivation layer on the substrate of completing steps 2; Form the figure that comprises passivation layer first via hole and passivation layer second via hole through composition technology; At least one said passivation layer first via hole is positioned at the top of said drain electrode, and at least two said passivation layer second via holes lay respectively at the edge of said storage electrode both sides; Afterwards; Deposit transparent conductive film on the substrate of accomplishing abovementioned steps; Form the figure that comprises pixel electrode and connection electrode through composition technology; Said pixel electrode is connected with drain electrode through passivation layer first via hole, and said connection electrode interconnects the storage electrode in the adjacent pixel regions through passivation layer second via hole.
9. a TFT-LCD manufacturing method of array base plate is used to make the described TFT-LCD array base palte of claim 4, it is characterized in that, comprising:
Step 1, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode through composition technology;
Step 2, on the substrate of completing steps 1, deposit gate insulation layer, semiconductive thin film, doped semiconductor films, transparent conductive film and metallic film is leaked in the source; Form the figure that comprises active layer, data line, drain electrode, source electrode, TFT channel region and storage electrode through composition technology; Wherein, Said storage electrode is formed by said transparent conductive film, and is formed in the pixel region;
Step 3, on the substrate of completing steps 2 deposit passivation layer, form the figure comprise passivation layer first via hole through composition technology, said passivation layer first via hole is positioned at the top of said drain electrode; Afterwards, the deposit transparent conductive film comprises pattern of pixel electrodes through the formation of composition technology, and said pixel electrode is connected with drain electrode through passivation layer first via hole;
Wherein, said step 2 comprises:
Using plasma strengthens chemical gaseous phase depositing process, deposits gate insulation layer, semiconductive thin film and doped semiconductor films successively;
Adopt common accent mask plate to form the figure that comprises active layer through composition technology;
Adopt the method for magnetron sputtering or thermal evaporation, metallic film is leaked in deposit transparent conductive film and source successively;
Adopt shadow tone or gray mask plate to form the figure that comprises data line, drain electrode, source electrode, TFT channel region and storage electrode through composition technology;
Wherein, said employing shadow tone or gray mask plate form through composition technology and comprise that the figure of data line, drain electrode, source electrode, TFT channel region and storage electrode comprises:
Leak coating one deck photoresist on the metallic film in said source;
Adopt the exposure of shadow tone or gray mask plate, make photoresist form photoresist and remove zone, the complete reserve area of photoresist and photoresist half reserve area fully; The complete reserve area of photoresist is corresponding to data line, source electrode and drain electrode figure region, and photoresist half reserve area is corresponding to storage electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed fully, and the photoresist thickness of photoresist half reserve area reduces;
Through the first time etching technics etch away photoresist fully and remove the source in zone fully and leak metallic film and transparent conductive film; Form data line, source electrode and drain electrode figure; Wherein, the doped semiconductor films between source electrode and the drain electrode is etched away fully, and etches away the semiconductive thin film of segment thickness; This regional semiconductive thin film is come out, form TFT channel region figure;
Photoresist through cineration technics removal photoresist half reserve area exposes this regional source and leaks metallic film;
Metallic film is leaked in source through the second time, etching technics etched away photoresist half reserve area fully, forms the storage electrode figure;
Peel off remaining photoresist.
10. TFT-LCD manufacturing method of array base plate according to claim 9 is characterized in that, said step 3 comprises:
Deposit passivation layer on the substrate of completing steps 2; Form the figure that comprises passivation layer first via hole and passivation layer second via hole through composition technology; At least one said passivation layer first via hole is positioned at the top of said drain electrode, and at least two said passivation layer second via holes lay respectively at the edge of said storage electrode both sides; Afterwards; Deposit transparent conductive film on the substrate of accomplishing abovementioned steps; Form the figure that comprises pixel electrode and connection electrode through composition technology; Said pixel electrode is connected with drain electrode through passivation layer first via hole, and said connection electrode interconnects the storage electrode in the adjacent pixel regions through passivation layer second via hole.
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| CN102455555B (en) * | 2010-10-28 | 2014-12-10 | 京东方科技集团股份有限公司 | TFT-LCD (Thin Film Transistor-Liquid Crystal Display) and driving method thereof as well as manufacturing method of array substrate |
| CN102651340B (en) | 2011-12-31 | 2014-11-19 | 京东方科技集团股份有限公司 | Manufacturing method of TFT (Thin Film Transistor) array substrate |
| CN103594245A (en) * | 2013-11-08 | 2014-02-19 | 溧阳市江大技术转移中心有限公司 | Method for manufacturing transparent capacitor with roughened surfaces |
| CN103839973B (en) | 2014-02-24 | 2016-05-04 | 京东方科技集团股份有限公司 | Active matrix organic light-emitting diode array base palte and preparation method and display unit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1932624A (en) * | 2005-08-16 | 2007-03-21 | 三星电子株式会社 | Thin film transistor display plate and liquid crystal display having the same |
| CN1964056A (en) * | 2005-11-09 | 2007-05-16 | Lg.菲利浦Lcd株式会社 | Array substrate for liquid crystal display device and method of fabricating the same |
| CN101106142A (en) * | 2006-06-09 | 2008-01-16 | 三星电子株式会社 | Display substrate, method of manufacturing thereof and display apparatus having the same |
-
2009
- 2009-02-26 CN CN 200910078374 patent/CN101819361B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1932624A (en) * | 2005-08-16 | 2007-03-21 | 三星电子株式会社 | Thin film transistor display plate and liquid crystal display having the same |
| CN1964056A (en) * | 2005-11-09 | 2007-05-16 | Lg.菲利浦Lcd株式会社 | Array substrate for liquid crystal display device and method of fabricating the same |
| CN101106142A (en) * | 2006-06-09 | 2008-01-16 | 三星电子株式会社 | Display substrate, method of manufacturing thereof and display apparatus having the same |
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| CN101819361A (en) | 2010-09-01 |
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