CN101807053A - Structure of multi-channel high-speed pulse counting for industrial control touch screen - Google Patents
Structure of multi-channel high-speed pulse counting for industrial control touch screen Download PDFInfo
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- CN101807053A CN101807053A CN201010112450A CN201010112450A CN101807053A CN 101807053 A CN101807053 A CN 101807053A CN 201010112450 A CN201010112450 A CN 201010112450A CN 201010112450 A CN201010112450 A CN 201010112450A CN 101807053 A CN101807053 A CN 101807053A
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Abstract
A structure of multi-channel high-speed pulse counting for a industrial control touch screen comprises an LCD screen graphical display control unit, a main controller unit, an input channel unit and an output channel unit, wherein the LCD screen graphical display control unit is connected with the main controller unit which is connected with the input channel unit and the output channel unit, the input channel unit is connected with the output channel, the main controller unit comprises a singlechip and a CPLD ( a complex programmable logic device), and a singlechip is connected with the CPLD. The technical scheme of the invention adopts the touch screen, so that industrial control touch screen can carry out the counting of high-speed pulse, at the same time, the plurality of the counting channels can be realized, and thus the application range of the industrial control touch screen can be expanded.
Description
Technical field
A kind of structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen of the present invention is to belong to the industrial control equipment field, when the industrial control touch screen need be to multichannel (greater than 4 tunnel) when high-speed pulse be counted, adopt single CPLD (CPLD) to make up the ancillary hardware logic for the single-chip microcomputer of the master controller part of industrial control touch screen, add software programming, realize the multi-channel high-speed pulse counting function.
Background technology
At present the industrial control touch display with the TFT LCD (true color liquid crystal) of band touch function as demonstration and operation interface, display industry control flow and current state of a control intuitively, have small size and low in power consumption simultaneously, obtained application more and more widely.Continuous expansion along with application, functional requirement to the industrial control touch display is also more and more, some industrial control touch display screen even the compound function of PLC (Programmable Logic Controller), can handle simulation or digital pulse signal, provide corresponding output control signal according to the Industry Control flow process then from the sensor at Industry Control scene.
Along with the development of industrial control technology, the feedback signal of Industry Control object and operative sensor signal, the form with high-speed pulse offers opertaing device often, and often is that a plurality of signals all are the high-speed pulse types.Like this, in the design industrial control touch display screen, a plurality of high-speed pulse counting passages certainly will to be supported.But the master controller part of existing industrial control touch display screen, generally be to adopt the single-chip microcomputer design, the counter in the single-chip microcomputer limited often individual (being less than 4) carries out high-speed pulse counting with single-chip microcomputer, owing to can't carry out more multichannel step-by-step counting.Simultaneously, counter speed is limited by the restriction of single-chip system clock on the single-chip microcomputer, can't guarantee precision to high-speed pulse counting.As:
Chinese invention patent application number 200910059310.X discloses a kind of touch operation control device, has had the display screen and the method for touch function, and the display screen with touch function comprises display screen, touch operation control device, single-chip microcomputer.
China utility model patent ZL 200820079975.8 discloses a kind of combined intelligent dried bean curd press, and the touch-screen control device of its use is that PLC combines with single-chip microcomputer.
China utility model patent ZL 200820025784.3 discloses a kind of oil well operation RHVC in PLC control, it is to be core and to connect successively with PLC controller, single-chip microcomputer, frequency converter, be connected with touch-screen, action button at PLC controller input end, weigh testing circuit and running speed signal testing circuit, the PLC controller output end is connected with overweight switching loop circuit; The single-chip microcomputer output terminal is connected to the operation detecting circuit input end.
In order to solve the above-mentioned technical matters of existing industrial control touch display screen, the invention provides a kind of can solving the problems of the technologies described above fully.
Summary of the invention
The objective of the invention is to solve problem set forth above, a kind of structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen is provided, solve touch display screen high-speed pulse is counted, and can't carry out the more technical matters of hyperchannel counting.
Technical scheme of the present invention is such:
A kind of structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen, comprise LCD screen graphics display control unit, Main Control Unit, input channel unit, output channel unit, described LCD screen graphics display control unit links to each other with Main Control Unit, Main Control Unit links to each other with input channel unit, output channel unit, the input channel unit links to each other with the output channel unit, described Main Control Unit comprises single-chip microcomputer, CPLD (but complexity editorial logic device), and described single-chip microcomputer links to each other with CPLD.
As preferably, hardware logic partly is structured among the CPLD, comprise data bus buffer, read-write steering logic, control register, counter, internal bus, described data bus buffer and read-write steering logic, data bus buffer, control register, counter link to each other with internal bus.
As preferably, in described CPLD, make up the counter of at least more than one passage.
As preferably, the clock of described counter and the clock of single-chip microcomputer are separated, and are independent of the clock of single-chip microcomputer.
As preferably, the clock frequency of described counter is higher than the clock frequency of single-chip microcomputer.
As preferably, described data bus buffer is a two-way three-state.
As preferably, control the work of described read-write steering logic by sheet choosing, read/write signal, address signal.
As preferably, described CPLD is connected with single-chip microcomputer in the master controller in the self-defined bus mode with I/O.
As preferably, the CPLD logic module constitutes a self-defined bus and links to each other with single-chip microcomputer by data bus, address bus, sheet choosing, write signal, read signal, look-at-me, the zero clearing of counter overflow indicator, reset signal.
As preferably, described CPLD adopts interrupt mode in conjunction with the software steps programming of single-chip microcomputer in the software, realize the multi-channel high-speed tally function.
Beneficial effect of the present invention is as follows:
Adopt the touch display screen of technical solution of the present invention, make industrial control touch display screen to count, realize a plurality of such counting channels simultaneously, thereby enlarged the range of application of industrial control touch display screen high-speed pulse.
Description of drawings
Fig. 1 is the structural representation of typical industrial control touch display screen;
Fig. 2 is the theory diagram of Main Control Unit of the present invention;
Fig. 3 is a hardware logic block diagram of the present invention;
Fig. 4 is the EDA schematic diagram of counter of the present invention;
Fig. 5 is the EDA schematic diagram of count value register of the present invention;
Fig. 6 is the preferred operations sequential synoptic diagram of count value register of the present invention;
Fig. 7 is the EDA schematic diagram of input counting channel mask register of the present invention;
Fig. 8 is the preferred operations sequential synoptic diagram of input counting channel mask register of the present invention;
Fig. 9 is the EDA schematic diagram of carry interrupt request register of the present invention;
Figure 10 is the EDA schematic diagram of input IO register of the present invention;
Figure 11 is the EDA schematic diagram of expansion output register of the present invention;
Figure 12 is the EDA schematic diagram of expansion input register of the present invention.
Specific implementation method
Below in conjunction with accompanying drawing embodiments of the invention are further elaborated:
The described structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen, comprise LCD screen graphics display control unit, Main Control Unit, input channel unit, output channel unit, described LCD screen graphics display control unit links to each other with Main Control Unit, Main Control Unit links to each other with input channel unit, output channel unit, the input channel unit links to each other with the output channel unit, described Main Control Unit comprises single-chip microcomputer, CPLD (but complexity editorial logic device), and described single-chip microcomputer links to each other with CPLD.
Hardware logic partly is structured among the CPLD, comprise data bus buffer, read-write steering logic, control register, counter, internal bus, described data bus buffer and read-write steering logic, data bus buffer, control register, counter link to each other with internal bus.
In described CPLD, make up the counter of at least more than one passage.
The clock of described counter and the clock of single-chip microcomputer are separated, and are independent of the clock of single-chip microcomputer.
The clock frequency of described counter is higher than the clock frequency of single-chip microcomputer.
Described data bus buffer is a two-way three-state.
Control the work of described read-write steering logic by sheet choosing, read/write signal, address signal.
Described CPLD is connected with single-chip microcomputer in the master controller in the self-defined bus mode with I/O.
The CPLD logic module constitutes a self-defined bus and links to each other with single-chip microcomputer by data bus, address bus, sheet choosing, write signal, read signal, look-at-me, the zero clearing of counter overflow indicator, reset signal.
Described CPLD adopts interrupt mode in conjunction with the software steps programming of single-chip microcomputer in the software, realize the multi-channel high-speed tally function.
Typical case's formation of industrial control touch display screen shown in Figure 1 is divided into following four parts:
1, LCD screen graphics display control unit, band touches control.
2, the master controller part mainly is made of single-chip microcomputer, is the control core of total system.
3, the input channel part contains Signal Pretreatment, analog to digital conversion, the input of light-coupled isolation pulse signal.
4, output channel part contains digital-to-analog conversion, signal output driving, relay output.
Because above-mentioned master controller part adopts the single-chip microcomputer of counting resource-constrained, brings foregoing technical matters.
The theory diagram of Main Control Unit of the present invention as shown in Figure 2, hardware logic part of the present invention, revise Main Control Unit exactly, add CPLD (CPLD), in CPLD, make up the counter of a plurality of passages, and be connected with single-chip microcomputer in the mode of self-defined bus with I/O, in conjunction with the interruption of single-chip microcomputer, realize the multi-channel high-speed tally function.
CPLD is a kind of programmable logic device (PLD), under the situation that the CPLD internal resource allows, can make up self-defining Digital Logic, partly is structured among the CPLD at hardware logic of the present invention.
Hardware logic block diagram of the present invention shown in Figure 3 comprises with lower module:
1, data bus buffer
This impact damper is a two-way three-state, can directly be mounted on 8 bit data bus, can allow single-chip microcomputer by writing output data, also can read count value by it, and control word is also delivered to the control word register by this impact damper in addition.
2, read-write steering logic
By sheet choosing (CS), read/write signal (WE, OE), the address signal (A0～A3) work of the whole logic of control.
3, control register
The zero clearing that resets, powers on, the counter of control internal register start, interrupt request singal are provided, and counter gate signal is provided simultaneously.
4, counter (n)
N counter is separate, and identical, and each counter has an input end of clock IN, a gate input control (from control register), a carry output (spill over).Counting mode is that scale-of-two adds up.The number of counter is n, and n number of active lanes is as required come fixed, generally greater than 4, has adopted 8 counters in the present embodiment.The figure place of counter is the m position, is decided by counting clock frequency and counting precision.
5, internal bus
Connect each logical gate in the CPLD, do the data exchange.
Whole C PLD logic module constitutes a self-defined bus by D0～D8 (8 bit data bus), A0～A3 (4 bit address bus), CS (sheet choosing), WE (write signal), OE (read signal), IRQ (look-at-me), MR (zero clearing of counter overflow indicator), NRST (reset signal) and links to each other with single-chip microcomputer.
The counting clock of counter and single-chip microcomputer clock are separated, and are independent of the single-chip microcomputer clock, can add the clock higher than single-chip microcomputer, to improve the counting rate of counter.
It is the CPLD of EPM240 that the CPLD of present embodiment adopts the model of altera corp, can make up self-defining Digital Logic, partly is structured among the CPLD at hardware logic of the present invention.In the hardware logic block diagram as shown in Figure 3:
The EDA schematic diagram of enter counter shown in Figure 4: 8 road count signals are at first imported 8 counters, and each counter is 8, have that counting enables, the output of asynchronous resetting, carry, terminal count output mouth.
Count pulse input CNTx_IN: the place counts at rising edge.
Counting enables CNTx_EN: asynchronous enable signal, and by the control of input counting channel mask register.
Counting zero clearing CNTx_ACLR: asynchronous resetting, by MR and NRST control.MR draws high or NRST is dragged down (electrification reset) and causes asynchronous resetting.
Count value output Q[7..0]: when the CS rising edge, be latched into count value register.
Counting carry output CNTx_OUT: carry output causes the CROUT signal, and puts carry interrupt request register corresponding positions.
The EDA schematic diagram of count value register shown in Figure 5: the count value register when the CS rising edge with the counter output latch.Totally 8, each 8 bit data.Can pass through ADDR[3..0] and the OE signal read-only.
Address: 0x1～0x8, corresponding 8 tunnel count values.
Data: 8 bit data, read operation are asynchronous.
The preferred operations sequential is as shown in Figure 6: draw high the CS data earlier and go out to latch at the CS rising edge, the output of ADDR address pin selects to read counter.Draw high OE, from DATA data bus reading of data.
The EDA schematic diagram of input counting channel mask register shown in Figure 7: lead to 8 bit data in order to select enabling corresponding input counting.
Address: 0b1001 or 0x9.
Data: write 1 operation to a corresponding position bit (x) and count/write 0 and forbid counting.Write operation is asynchronous.
The preferred operations sequential is as shown in Figure 8: in DATA data bus input data, enable WE again, at last at address bus write address 0x9 earlier.
The EDA schematic diagram of carry interrupt request register shown in Figure 9: high speed photo coupling two-way carry look-at-me is directly given the single-chip microcomputer keyboard interrupt, and rising edge triggers.
6 road low speed optocoupler signals pass through or operation, the output look-at-me.Specifically be which passage, determine by the value of reading carry interrupt request register 0x0.Write 0x0 with the interrupt request register zero clearing to interrupt request register.
The EDA schematic diagram of input IO register shown in Figure 10: directly read input IO value, read-only.By reading to import the value of IO register 0x9, import 8 paths values.
The EDA schematic diagram of expansion output register of the present invention shown in Figure 11:
Address: 0b1010 or 0xA.
Data: to a corresponding position bit (x) write 1 corresponding position output " 1 " (OC)/write 0 output " 0 " (high resistant), write operation is asynchronous.
The EDA schematic diagram of expansion input register shown in Figure 12:
Address: 0xA0xB.
Data: read register 0xA value is the value of input channel PPEX9～PPEX16.
Read register 0xB value, Gao Siwei is " 0 ", low four is the value of input channel PPEX17～PPEX20.
Read register 0xC value is constant 0x5F.
Above-described only is preferred implementation of the present invention; should be pointed out that for the heavy those of ordinary skill in present technique field, under the prerequisite that does not break away from core technology feature of the present invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (10)
1. structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen, comprise LCD screen graphics display control unit, Main Control Unit, input channel unit, output channel unit, described LCD screen graphics display control unit links to each other with Main Control Unit, Main Control Unit links to each other with input channel unit, output channel unit, the input channel unit links to each other with the output channel unit, it is characterized in that, described Main Control Unit comprises single-chip microcomputer, CPLD (but complexity editorial logic device), and described single-chip microcomputer links to each other with CPLD.
2. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 1, it is characterized in that, hardware logic partly is structured among the CPLD, comprise data bus buffer, read-write steering logic, control register, counter, internal bus, described data bus buffer and read-write steering logic, data bus buffer, control register, counter link to each other with internal bus.
3. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 2 is characterized in that, makes up the counter of at least more than one passage in described CPLD.
4. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 3 is characterized in that, the clock of described counter and the clock of single-chip microcomputer are separated, and are independent of the clock of single-chip microcomputer.
5. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 4 is characterized in that, the clock frequency of described counter is higher than the clock frequency of single-chip microcomputer.
6. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 2 is characterized in that, described data bus buffer is a two-way three-state.
7. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 2 is characterized in that, is controlled the work of described read-write steering logic by sheet choosing, read/write signal, address signal.
8. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 1 is characterized in that, described CPLD is connected with single-chip microcomputer in the master controller in the self-defined bus mode with I/O.
9. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 8, it is characterized in that, the CPLD logic module constitutes a self-defined bus and links to each other with single-chip microcomputer by data bus, address bus, sheet choosing, write signal, read signal, look-at-me, the zero clearing of counter overflow indicator, reset signal.
10. the structure that is used for the multi-channel high-speed pulse counting of industrial control touch display screen according to claim 1, it is characterized in that, described CPLD adopts interrupt mode in conjunction with the software steps programming of single-chip microcomputer in the software, realize the multi-channel high-speed tally function.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102495225A (en) * | 2011-12-14 | 2012-06-13 | 南京科远自动化集团股份有限公司 | Device and method for measuring rotating speed of steam turbine |
| CN103532527A (en) * | 2013-07-15 | 2014-01-22 | 北京航天自动控制研究所 | Real-time and reliable inertia measuring device information recording system |
| CN103699031A (en) * | 2013-12-06 | 2014-04-02 | 杭州电子科技大学 | IO (Input-Output) processing dynamic reconstitution system and method used in touch display industrial controller |
| CN104142651A (en) * | 2014-07-21 | 2014-11-12 | 北京宇航系统工程研究所 | Switch gate signal measuring circuit |
| CN104570882A (en) * | 2015-01-22 | 2015-04-29 | 北华航天工业学院 | High-precision synchronous pulse counting circuit based on PCI |
| CN105404204A (en) * | 2015-12-05 | 2016-03-16 | 中国航空工业集团公司洛阳电光设备研究所 | Control circuit of starting board of avionic device |
| CN109919290A (en) * | 2019-02-21 | 2019-06-21 | 国网山东省电力公司临沂供电公司 | Multichannel warehouse counting device and method |
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| CN110161946A (en) * | 2018-12-29 | 2019-08-23 | 大连佳林设备制造有限公司 | Multi-channel high-speed counting control system |
| CN112859786A (en) * | 2021-01-20 | 2021-05-28 | 西安热工研究院有限公司 | Automatic resetting control system and method for PI card of thermal power plant |
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| CN102495225A (en) * | 2011-12-14 | 2012-06-13 | 南京科远自动化集团股份有限公司 | Device and method for measuring rotating speed of steam turbine |
| CN102495225B (en) * | 2011-12-14 | 2013-06-19 | 南京科远自动化集团股份有限公司 | Device and method for measuring rotating speed of steam turbine |
| CN103532527A (en) * | 2013-07-15 | 2014-01-22 | 北京航天自动控制研究所 | Real-time and reliable inertia measuring device information recording system |
| CN103699031A (en) * | 2013-12-06 | 2014-04-02 | 杭州电子科技大学 | IO (Input-Output) processing dynamic reconstitution system and method used in touch display industrial controller |
| CN104142651A (en) * | 2014-07-21 | 2014-11-12 | 北京宇航系统工程研究所 | Switch gate signal measuring circuit |
| CN104570882A (en) * | 2015-01-22 | 2015-04-29 | 北华航天工业学院 | High-precision synchronous pulse counting circuit based on PCI |
| CN105404204A (en) * | 2015-12-05 | 2016-03-16 | 中国航空工业集团公司洛阳电光设备研究所 | Control circuit of starting board of avionic device |
| CN109976301A (en) * | 2017-12-28 | 2019-07-05 | 汕头比亚迪实业有限公司 | Multi-channel high-speed signal interruption tester |
| CN110161946A (en) * | 2018-12-29 | 2019-08-23 | 大连佳林设备制造有限公司 | Multi-channel high-speed counting control system |
| CN109919290A (en) * | 2019-02-21 | 2019-06-21 | 国网山东省电力公司临沂供电公司 | Multichannel warehouse counting device and method |
| CN109919290B (en) * | 2019-02-21 | 2023-09-08 | 国网山东省电力公司临沂供电公司 | Multi-channel warehouse counting device and method |
| CN112859786A (en) * | 2021-01-20 | 2021-05-28 | 西安热工研究院有限公司 | Automatic resetting control system and method for PI card of thermal power plant |
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