CN101800169A - Method for manufacturing composite trapping layer - Google Patents
Method for manufacturing composite trapping layer Download PDFInfo
- Publication number
- CN101800169A CN101800169A CN200910077676A CN200910077676A CN101800169A CN 101800169 A CN101800169 A CN 101800169A CN 200910077676 A CN200910077676 A CN 200910077676A CN 200910077676 A CN200910077676 A CN 200910077676A CN 101800169 A CN101800169 A CN 101800169A
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- Prior art keywords
- layer
- metal silicide
- capture layer
- nanocrystalline
- silicon nitride
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- 238000000034 method Methods 0.000 title claims abstract description 29
- 239000002131 composite material Substances 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title abstract description 7
- 239000002184 metal Substances 0.000 claims abstract description 51
- 229910052751 metal Inorganic materials 0.000 claims abstract description 51
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 42
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 42
- 238000003860 storage Methods 0.000 claims abstract description 30
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 26
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 22
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 14
- 238000005546 reactive sputtering Methods 0.000 claims abstract description 13
- 230000005641 tunneling Effects 0.000 claims abstract description 11
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 10
- 230000008569 process Effects 0.000 claims abstract description 7
- 238000004151 rapid thermal annealing Methods 0.000 claims abstract description 5
- 238000005516 engineering process Methods 0.000 claims description 12
- 238000000137 annealing Methods 0.000 claims description 8
- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 150000004767 nitrides Chemical class 0.000 claims description 6
- 229910052715 tantalum Inorganic materials 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 230000009286 beneficial effect Effects 0.000 abstract description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- 239000010703 silicon Substances 0.000 abstract description 4
- 230000007246 mechanism Effects 0.000 abstract description 3
- 238000000151 deposition Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 8
- 150000001875 compounds Chemical class 0.000 description 5
- 239000013078 crystal Substances 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000007669 thermal treatment Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000011712 cell development Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000008187 granular material Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000007334 memory performance Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002159 nanocrystal Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
The invention discloses a method for manufacturing a composite trapping layer with a silicon nitride charge trapping layer and a nanocrystalline charge storage layer, which is suitable for manufacturing a floating gate type memory with a composite charge trapping mechanism, and comprises the following steps: A. depositing a metal silicide film containing nitrogen on the tunneling dielectric layer by adopting a reactive sputtering mode; B. and carrying out rapid thermal annealing treatment on the metal silicide film containing nitrogen to form a composite trapping layer which has both a silicon nitride charge trapping layer and a nanocrystalline charge storage layer. The method has the advantages of simplicity, compatibility of the process with the traditional CMOS silicon plane process and the like, and is beneficial to popularization and application.
Description
Technical field
The present invention relates to microelectronics technology, be specifically related to the method that a kind of making has the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, be applicable to the floating boom formula memory of making compound electric charge capture mechanism.
Background technology
Floating boom formula nonvolatile storage is to be used and universally recognized main flow nonvolatile storage type by a large amount of at present, is widely used in electronics and computer industry.Traditional floating gate structure memory cell is because the restriction of structure and material, causes between the requirement of quick write/erase operation and the demand of storing steady in a long-term and produced serious contradiction.And along with dwindling of characteristic size, this contradiction is more remarkable.
Along with characteristic size is advanced into nanoscale, when dwindling memory cell, improving storage density, improve the storage reading and writing data, wipe and keep performance, become the key issue that present floating gate memory cell development faces.This just requires on material and structure traditional floating gate memory cell to be improved.
The nano-crystal floating gate nonvolatile memory cell is utilized nanocrystalline as charge storage media, and each nano-crystalline granule is with crystal grain insulation on every side and only store a little charge, thereby realizes discrete charge storage.Even the defective on the tunneling medium layer forms fatal discharge channel, only can cause local electric charge on nanocrystalline to leak and very little to the overall storage influence, the maintenance of electric charge is more stable.Except adopting the traditional continuous floating gate layer of nanocrystalline replacement, adopting new charge-storage mechanism also is an approach that improves the floating-gate memory performance.Utilizing the trap level trap-charge in the silicon nitride is exactly a kind of more common method.
The compound formula floating-gate memory (HybirdTrapping Floating-Gate Nonvolatile Memory) of capturing of combining nano crystalline substance and silicon nitride electric charge capture layer, its charge storage can obtain bigger memory window in the composite capture layer that " trapping medium/nanometer crystal layer/trapping medium " piles up; Trap level effectively improves the data retention characteristics of device to the binding energy of electric charge; Simultaneously can also suppress the wiping phenomenon, reduce operating voltage, comprehensively improve device performance.Composite capture layer in the device takes multistep technology to pile up making more at present, and complicated, wayward consistency is unfavorable for large-scale application.
Summary of the invention
(1) technical problem that will solve
At the deficiency on the composite capture layer manufacture method in the above-mentioned current floating gate type nonvolatile memory, main purpose of the present invention is to propose a kind of manufacture method of simpler, the composite capture layer that has silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently that cost is lower.
(2) technical scheme
For achieving the above object, the invention provides the method that a kind of making has the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, this method comprises:
The mode of A, employing reactive sputtering deposits the metal silicide film that contains nitrogen on tunneling medium layer;
B, the metal silicide film that contains nitrogen is carried out quick thermal annealing process, form the composite capture layer that has silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently.
In the such scheme, the metal silicide described in the steps A in the metal silicide film comprises the silicide Ti of common metal in the CMOS technology
xSi
y, Ni
xSi
y, W
xSi
y, Ta
xSi
y, Mo
xSi
yAnd Ni
xSi
y, wherein subscript x and y represent metal and the shared atomic percent of Si, and x＜0.4, y＞0.6.
In the such scheme, the thickness of the metal silicide film described in the steps A is 8nm to 15nm.
In the such scheme, adopt the mode of reactive sputtering on tunneling medium layer, to deposit the metal silicide film that contains nitrogen described in the steps A, comprise and adopt metallic target and Si target at N
2With react cosputtering in the Ar atmosphere, perhaps adopt metal silicide target (single target) at N
2With reactive sputtering in the Ar atmosphere.
In the such scheme, the nanocrystalline charge storage layer described in the step B is certain metal silicide, or the nitride of certain metal, or certain metal silicide and nitride thereof both have nanocrystalline being embedded in the silicon nitride layer concurrently.
In the such scheme, described metal silicide comprises the silicide Ti of common metal in the CMOS technology
xSi
y, Ni
xSi
y, W
xSi
y, Ta
xSi
y, Mo
xSi
yAnd Ni
xSi
y, wherein subscript x and y represent metal and the shared atomic percent of Si, and x＜0.4, y＞0.6.
In the such scheme, described in the step B metal silicide film that contains nitrogen being carried out quick thermal annealing process, is at N
2Rapid thermal annealing is 100 seconds in the atmosphere, 600 degrees centigrade of annealing temperatures.
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
(1) technologies such as sputter of the present invention and rapid thermal treatment are with CMOS traditional handicraft compatibility.
(2) the present invention has simplified the processing step of preparation composite capture layer, has reduced cost of manufacture.
(3) to have method simple and easy in the present invention, and advantages such as technology and traditional cmos silicon planner technology compatibility are beneficial to and apply.
Description of drawings
Fig. 1 is compound basic structure schematic diagram of capturing floating gate type nonvolatile memory; S, D represent the source respectively and leak conduction region among the figure.
The making that Fig. 2 proposes for the present invention has the method flow diagram of the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently;
Fig. 3-1 is for adopting the mode of reactive sputtering, at N
2In Ar atmosphere, deposition contains the schematic diagram of the metal silicide film of N on tunneling medium layer; The 301st, silicon substrate, the 302nd, tunneling medium layer, the 303rd, contain the metal silicide film of N
Fig. 3-2 is a rapid thermal treatment under appropriate condition, forms to have SiN concurrently
xThe schematic diagram of the compound electric charge capture layer of electric charge capture layer and nanocrystalline charge storage layer; 304 is compound electric charge capture layer.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
As shown in Figure 2, the making that Fig. 2 proposes for the present invention has the method flow diagram of the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, and this method comprises:
Step 201: adopt the mode of reactive sputtering on tunneling medium layer, to deposit the metal silicide film that contains nitrogen;
Step 202: the metal silicide film that contains nitrogen is carried out quick thermal annealing process, form the composite capture layer that has silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently.
Metal silicide described in the above-mentioned steps 201 in the metal silicide film comprises the silicide Ti of common metal in the CMOS technology
xSi
y, Ni
xSi
y, W
xSi
y, Ta
xSi
y, Mo
xSi
yAnd Ni
xSi
y, wherein subscript x and y represent metal and the shared atomic percent of Si, and x＜0.4, y＞0.6.The thickness of metal silicide film is 8nm to 15nm.
Adopt the mode of reactive sputtering on tunneling medium layer, to deposit the metal silicide film that contains nitrogen described in the above-mentioned steps 201, comprise and adopt metallic target and Si target at N
2With react cosputtering in the Ar atmosphere, perhaps adopt metal silicide target (single target) at N
2With reactive sputtering in the Ar atmosphere.
Nanocrystalline charge storage layer described in the above-mentioned steps 202 is certain metal silicide, or the nitride of certain metal, or certain metal silicide and nitride thereof both have nanocrystalline being embedded in the silicon nitride layer concurrently.Metal silicide comprises the silicide Ti of common metal in the CMOS technology
xSi
y, Ni
xSi
y, W
xSi
y, Ta
xSi
y, Mo
xSi
yAnd Ni
xSi
y, wherein subscript x and y represent metal and the shared atomic percent of Si, and x＜0.4, y＞0.6.
In one embodiment of the invention, the thick SiO of hot dry-oxygen oxidation growth one deck 4nm on (100) crystal face of p type low-resistance silicon substrate of elder generation
2As tunneling medium layer.Then at Ar and N
2Flow-rate ratio is the Ni of reactive sputtering one deck 8nm thickness in 2: 1, the atmosphere of air pressure 0.6Pa
0.3Si
0.7Film.After sputter is finished, at N
2Rapid thermal annealing is 100 seconds in the atmosphere, and 600 degrees centigrade of annealing temperatures are finished the preparation of composite capture layer.
Fig. 3-1 is used to illustrate the schematic diagram of one embodiment of the present of invention to Fig. 3-the 2nd.Fig. 3-the 1st illustrates in one embodiment of the present of invention, uses the Ni of reactive sputtering one deck 8nm thickness
0.3Si
0.7The schematic diagram of film.Fig. 3-the 2nd illustrates in one embodiment of the present of invention, at N
2RTA rapid thermal annealing 100s in the atmosphere, 600 degrees centigrade finishes the schematic diagram of the preparation of composite capture layer.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (7)
1. a making has the method for the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, it is characterized in that this method comprises:
The mode of A, employing reactive sputtering deposits the metal silicide film that contains nitrogen on tunneling medium layer;
B, the metal silicide film that contains nitrogen is carried out quick thermal annealing process, form the composite capture layer that has silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently.
2. making according to claim 1 has the method for the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, it is characterized in that, metal silicide described in the steps A in the metal silicide film comprises the silicide Ti of common metal in the CMOS technology
xSi
y, Ni
xSi
y, W
xSi
y, Ta
xSi
y, Mo
xSi
yAnd Ni
xSi
y, wherein subscript x and y represent metal and the shared atomic percent of Si, and x＜0.4, y＞0.6.
3. making according to claim 1 has the method for the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, it is characterized in that, the thickness of the metal silicide film described in the steps A is 8nm to 15nm.
4. making according to claim 1 has the method for the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, it is characterized in that, adopt the mode of reactive sputtering on tunneling medium layer, to deposit the metal silicide film that contains nitrogen described in the steps A, comprise and adopt metallic target and Si target at N
2With react cosputtering in the Ar atmosphere, perhaps adopt metal silicide target (single target) at N
2With reactive sputtering in the Ar atmosphere.
5. making according to claim 1 has the method for the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, it is characterized in that, nanocrystalline charge storage layer described in the step B is certain metal silicide, or the nitride of certain metal, or certain metal silicide and nitride thereof both have nanocrystalline being embedded in the silicon nitride layer concurrently.
6. making according to claim 5 has the method for the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, it is characterized in that, described metal silicide comprises the silicide Ti of common metal in the CMOS technology
xSi
y, Ni
xSi
y, W
xSi
y, Ta
xSi
y, Mo
xSi
yAnd Ni
xSi
y, wherein subscript x and y represent metal and the shared atomic percent of Si, and x＜0.4, y＞0.6.
7. making according to claim 1 has the method for the composite capture layer of silicon nitride electric charge capture layer and nanocrystalline charge storage layer concurrently, it is characterized in that, described in the step B metal silicide film that contains nitrogen is carried out quick thermal annealing process, is at N
2Rapid thermal annealing is 100 seconds in the atmosphere, 600 degrees centigrade of annealing temperatures.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910077676A CN101800169A (en) | 2009-02-11 | 2009-02-11 | Method for manufacturing composite trapping layer |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910077676A CN101800169A (en) | 2009-02-11 | 2009-02-11 | Method for manufacturing composite trapping layer |
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| Publication Number | Publication Date |
|---|---|
| CN101800169A true CN101800169A (en) | 2010-08-11 |
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|---|---|---|---|
| CN200910077676A Pending CN101800169A (en) | 2009-02-11 | 2009-02-11 | Method for manufacturing composite trapping layer |
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| Country | Link |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109904167A (en) * | 2019-03-04 | 2019-06-18 | 安阳师范学院 | Based on Si3N4The preparation method of the nanocrystalline charge storage device of coated metal oxide |
| CN112301317A (en) * | 2020-10-30 | 2021-02-02 | 连云港恒顺工业科技有限公司 | Surface treatment process for claw type vacuum pump rotor |
-
2009
- 2009-02-11 CN CN200910077676A patent/CN101800169A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109904167A (en) * | 2019-03-04 | 2019-06-18 | 安阳师范学院 | Based on Si3N4The preparation method of the nanocrystalline charge storage device of coated metal oxide |
| CN109904167B (en) * | 2019-03-04 | 2020-10-27 | 安阳师范学院 | Based on Si3N4Preparation method of charge storage device coated with metal oxide nanocrystalline |
| CN112301317A (en) * | 2020-10-30 | 2021-02-02 | 连云港恒顺工业科技有限公司 | Surface treatment process for claw type vacuum pump rotor |
| CN112301317B (en) * | 2020-10-30 | 2021-05-18 | 连云港恒顺工业科技有限公司 | Surface treatment process for claw type vacuum pump rotor |
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| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Open date: 20100811 |