CN101790730B - 用于设计多路转换器的方法和设备 - Google Patents

用于设计多路转换器的方法和设备 Download PDF

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Publication number
CN101790730B
CN101790730B CN2008800181264A CN200880018126A CN101790730B CN 101790730 B CN101790730 B CN 101790730B CN 2008800181264 A CN2008800181264 A CN 2008800181264A CN 200880018126 A CN200880018126 A CN 200880018126A CN 101790730 B CN101790730 B CN 101790730B
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CN101790730A (zh
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K·S·麦克尔文
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Synopsys Inc
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Synopsys Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/327—Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • G06F30/343—Logical level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1737—Controllable logic circuits using multiplexers

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Architecture (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
CN2008800181264A 2007-05-31 2008-05-30 用于设计多路转换器的方法和设备 Active CN101790730B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/809,613 2007-05-31
US11/809,613 US7730438B2 (en) 2007-05-31 2007-05-31 Methods and apparatuses for designing multiplexers
PCT/US2008/006831 WO2008150435A1 (en) 2007-05-31 2008-05-30 Methods and apparatuses for designing multiplexers

Publications (2)

Publication Number Publication Date
CN101790730A CN101790730A (zh) 2010-07-28
CN101790730B true CN101790730B (zh) 2013-10-23

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CN2008800181264A Active CN101790730B (zh) 2007-05-31 2008-05-30 用于设计多路转换器的方法和设备

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US (1) US7730438B2 (enExample)
EP (1) EP2153360A1 (enExample)
JP (1) JP5384483B2 (enExample)
CN (1) CN101790730B (enExample)
WO (1) WO2008150435A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8751986B2 (en) * 2010-08-06 2014-06-10 Synopsys, Inc. Method and apparatus for automatic relative placement rule generation
JP6127807B2 (ja) * 2013-07-26 2017-05-17 富士通株式会社 送信回路、通信システム及び通信方法
US9361417B2 (en) 2014-02-07 2016-06-07 Synopsys, Inc. Placement of single-bit and multi-bit flip-flops
JP6735095B2 (ja) * 2015-12-25 2020-08-05 ザインエレクトロニクス株式会社 信号多重化装置
US10528692B1 (en) 2017-11-07 2020-01-07 Synopsis, Inc. Cell-aware defect characterization for multibit cells
US12387022B2 (en) * 2022-03-02 2025-08-12 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method of optimizing an integrated circuit design

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6438735B1 (en) * 1999-05-17 2002-08-20 Synplicity, Inc. Methods and apparatuses for designing integrated circuits

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1462964A3 (en) * 1988-10-05 2006-06-07 Quickturn Design Systems, Inc. Method for stimulating functional logic circuit with logical stimulus
US6505337B1 (en) * 1998-11-24 2003-01-07 Xilinx, Inc. Method for implementing large multiplexers with FPGA lookup tables
US6449762B1 (en) * 1999-10-07 2002-09-10 Synplicity, Inc. Maintaining correspondence between text and schematic representations of circuit elements in circuit synthesis
US6711729B1 (en) * 2000-12-05 2004-03-23 Synplicity, Inc. Methods and apparatuses for designing integrated circuits using automatic reallocation techniques
US6973632B1 (en) * 2002-06-11 2005-12-06 Synplicity, Inc. Method and apparatus to estimate delay for logic circuit optimization
US7506278B1 (en) * 2005-03-08 2009-03-17 Xilinx, Inc. Method and apparatus for improving multiplexer implementation on integrated circuits

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6438735B1 (en) * 1999-05-17 2002-08-20 Synplicity, Inc. Methods and apparatuses for designing integrated circuits

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
CORSONELLO P ET AL.Design of 3:1 multiplexer standard.《ELECTRONICS LETTERS, IEE STEVENAGE.GB》.2000,第36卷1994-1995. *
CORSONELLOPETAL.Designof3：1multiplexerstandard.《ELECTRONICSLETTERS IEE STEVENAGE.GB》.2000

Also Published As

Publication number Publication date
US20080301608A1 (en) 2008-12-04
JP5384483B2 (ja) 2014-01-08
JP2010530660A (ja) 2010-09-09
EP2153360A1 (en) 2010-02-17
CN101790730A (zh) 2010-07-28
US7730438B2 (en) 2010-06-01
WO2008150435A1 (en) 2008-12-11

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