CN101783313B - Shallow groove, manufacturing method thereof and shallow groove isolation structure - Google Patents
Shallow groove, manufacturing method thereof and shallow groove isolation structure Download PDFInfo
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- CN101783313B CN101783313B CN2009100459774A CN200910045977A CN101783313B CN 101783313 B CN101783313 B CN 101783313B CN 2009100459774 A CN2009100459774 A CN 2009100459774A CN 200910045977 A CN200910045977 A CN 200910045977A CN 101783313 B CN101783313 B CN 101783313B
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Abstract
The invention relates to a shallow groove, a manufacturing method thereof and a shallow groove isolation structure, wherein the manufacturing method of the shallow groove comprises the following steps of: providing a semiconductor substrate provided with a mask layer; etching the mask layer to ensure that the cross section of the mask layer in the direction parallel to the width of the shallow groove is rectangular or square; and taking the mask layer as a mask to form the shallow groove on the semiconductor substrate by using halogen-containing plasma, wherein the cross section of side wall of the shallow groove in the width direction is concave. Compared with the prior art, the shallow groove structure with the concave side wall is more convenient for filling the shallow groove. Besides, because the mask layer of which the cross section is rectangular or square is used as the mask for etching the shallow groove, the deviation between the original design size and the actual manufacturing size of the shallow groove is uniform.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to shallow trench and manufacturing approach thereof and fleet plough groove isolation structure.
Background technology
The developing direction of semiconductor integrated circuit is for increasing density and dwindling element.In production of integrated circuits, isolation structure is a kind of important technology, be formed on the silicon base element must with other element separation.Along with the progress of semiconductor fabrication techniques, shallow trench isolation from (Shallow Trench Isolation, STI) technology replaced gradually conventional semiconductor devices make adopted wait other partition methods like localized oxidation of silicon method (LOCOS).
The manufacture method of existing fleet plough groove isolation structure generally comprises: silica wafer in the high-temperature oxydation boiler tube; On silicon substrate, form cushion oxide layer (Pad Oxide) and silicon nitride layer (Nitride); Carry out the shallow trench etching again; Bottom and sidewall at shallow trench forms interior lining oxide layer (Liner) with thermal oxidation technology afterwards, and on said substrate oxide layer, is formed for filling the filling oxide layer of shallow trench with for example low-pressure chemical vapor phase deposition (LPCVD) technology or high concentration plasma-chemical vapour deposition (CVD) (HDP-CVD) technology, then removes the material that the surface has more with cmp (CMP) technology; And with silicon nitride layer as grinding stop layer; Stay a smooth surface, again silicon nitride layer and cushion oxide layer are removed at last, for the making of subsequent technique.About the manufacturing of fleet plough groove isolation structure, can also in No. the 98115052.7th, Chinese invention patent, find more.
In order to prevent the cavity when filling shallow trench, to occur; Usually need be when carrying out the HDP-CVD filling; One side fill oxide in shallow trench; The oxide of while etching shallow trench opening place accumulation prevents that oxide from sealing the opening of shallow trench in the accumulation of shallow trench opening part, thereby avoids the appearance in cavity again.Can know from foregoing description,, need to use comparatively complicated technology for fill oxide layer in shallow trench preferably.
And, utilize the shallow trench of prior art manufacturing, the deviation between its size and the original design size is inhomogeneous; For example, when design size was 70nm, the shallow trench of manufacturing was of a size of 56nm; Its dimensional discrepancy is 14nm, and when design size was 60nm, the shallow trench size of manufacturing still was 56nm; Its dimensional discrepancy is 4nm, and this causes the size of semiconductor device of manufacturing to depart from expection, further can influence the performance of semiconductor device.
Summary of the invention
Technical problem to be solved by this invention is: how to form the even and shallow trench that fill easily of dimensional discrepancy.
For addressing the above problem, the present invention provides a kind of manufacturing approach of shallow trench, comprises step: the Semiconductor substrate with mask layer is provided; The said mask layer of etching makes that said mask layer is rectangle or square in the cross section that is parallel on the shallow trench Width; With said mask layer is mask, utilizes halogen-containing plasma on Semiconductor substrate, to form shallow trench, and the sidewall of said shallow trench is indent on the cross section of its Width.
Alternatively, said halogen is fluorine or chlorine or bromine.
Alternatively, said halogen comprises and only comprises fluorine, chlorine and bromine.
Alternatively, said halogen-containing plasma is formed through the mist of ionization hydrogen bromide, chlorine and difluoromethane.
Alternatively, the source power of ionization is 800W to 1200W.
Alternatively, be 150W to 200W to containing the offset power that oxygen plasma applies.
Alternatively, the material that forms said mask layer is a silicon nitride.
Alternatively, the gas of the plasma of the said mask layer of formation etching is the mist of fluoroform and argon gas.
According to a further aspect in the invention, also carry a kind of shallow trench that semiconductor device is isolated that is used for, the sidewall of said shallow trench is indent on the cross section of said shallow trench Width.
According to another aspect of the invention, also carry a kind of fleet plough groove isolation structure, comprise shallow trench and the oxide that is filled in the said shallow trench, the sidewall of said shallow trench is indent on the cross section of said shallow trench Width.
Compared with prior art, the present invention forms the shallow ditch groove structure of concave side wall, the filling of more convenient shallow trench.And, utilize the cross section to be rectangle or foursquare mask layer mask as the etching shallow trench, can be so that the deviation homogeneous between the original design size of shallow trench and the actual manufacturing dimension.
Description of drawings
Fig. 1 is the sketch map of one embodiment of the invention shallow ditch groove structure;
Fig. 2 makes the flow chart of fleet plough groove isolation structure for one embodiment of the invention;
Fig. 3 to Fig. 6 is a sketch map of making fleet plough groove isolation structure according to flow process shown in Figure 2;
Fig. 7 is the sem photograph according to the shallow trench of one embodiment of the invention manufacturing.
Embodiment
Inventor of the present invention finds; When making fleet plough groove isolation structure; As shown in Figure 1, if when the cross sectional shape of shallow trench 101 on its Width is inverted " vase " shape, can makes things convenient for oxide to insert among the shallow trench 101 and be unlikely to stop up the opening of shallow trench 101.Here so-called inverted " vase " shape, promptly the inwall of shallow trench 101 concaves on the cross section on its Width shown in Figure 1, makes the width of shallow trench 101 from the opening to the bottom non-linearly reduce.Therefore, according to an aspect of the present invention, a kind of shallow trench that semiconductor device is isolated that is used for is provided, the sidewall of shallow trench is indent on the cross section of its Width.Certainly, the present invention also provides a kind of fleet plough groove isolation structure that semiconductor device is isolated that is used for, and comprises shallow trench and the oxide that is filled in the said shallow trench, and wherein, the sidewall of shallow trench is indent on the cross section of its Width.
The inventor also finds; In the manufacture process of shallow trench; If being used for the mask of etching shallow trench is rectangle or square in the cross section that is parallel on the shallow trench Width; Both can further produce the shallow trench of above-mentioned inversion " vase " shape again so that the deviation homogeneous between the original design size of shallow trench and the actual manufacturing dimension.
Thereby inventor of the present invention designs a kind of manufacturing approach of shallow trench, and is as shown in Figure 2, comprises step:
S201 forms mask layer, organic bottom antireflective layer, siliceous bottom anti-reflection layer and photoresist layer successively on Semiconductor substrate;
S202, graphical successively photoresist layer, siliceous bottom anti-reflection layer and organic bottom antireflective layer are also removed photoresist layer;
S203, it is rectangle or foursquare mask layer that etching forms the cross section;
S204 utilizes halogen-containing plasma on Semiconductor substrate, to form shallow trench.
Below in conjunction with accompanying drawing content of the present invention is elaborated.
At first execution in step S201 forms mask layer 302, organic bottom antireflective layer 303, siliceous bottom anti-reflection layer 304 and photoresist layer 305 successively on Semiconductor substrate 301, promptly forms structure as shown in Figure 3.
On Semiconductor substrate 301, form mask layer 302 earlier.The material of formation mask layer 302 has multiple, and one of them example is a silicon nitride.The method that forms mask layer 302 with silicon nitride can be plasma reinforced chemical vapour deposition (Plasma Enhanced Chemical Vapor Deposition, method PECVD).The PECVD method is known by this area skill personnel, repeats no more at this.
On mask layer 302, be formed with motor spindle anti-reflecting layer 303 again.Organic bottom antireflective layer 303 can be formed on the mode of spin coating on the mask layer 302; Being about to liquid organic antireflecting material instils on the Semiconductor substrate 301 of rotation; Through centrifugal phenomenon the organic antireflecting material of liquid state is uniformly coated on Semiconductor substrate 302 top layers, forms the uniform organic bottom antireflective layer 303 of thickness through heating, drying again.The thickness of organic bottom antireflective layer 303 can be 100nm to 300nm, and preferred thickness is 200nm.In order to the material that is formed with motor spindle anti-reflecting layer 303 can for example be that Japanese SHIN-ETSU HANTOTAI (Shin_Etsu) trade mark that company produced is the organic antireflecting material of ODL63.
And then on organic bottom antireflective layer 303, form the siliceous bottom anti-reflection layer 304 of one deck.The method that forms siliceous bottom anti-reflection layer 304 specifically can be the method for following the tracks of spin coating (Tracker Spin On), and the concrete steps of this method are well known to those skilled in the art, repeat no more at this.The thickness that forms siliceous bottom anti-reflection layer 304 can be 50nm to 100nm, and preferred thickness is 80nm.The material that forms siliceous bottom anti-reflection layer 304 can be that the trade mark that company of Japanese SHIN-ETSU HANTOTAI (Shin_Etsu) produces is the siliceous antireflection material of SHB-A629.
On siliceous bottom anti-reflection layer 306, form photoresist layer 307 at last again, form structure as shown in Figure 8.The method that forms photoresist layer 307 can be field of semiconductor manufacture common spin-coating method.The thickness of the photoresist layer 307 that spin coating forms can be 150nm to 200nm, and the thickness of preferred photoresist layer 307 is 176nm.
Certainly, between Semiconductor substrate 301 and mask layer 302, can also form pad oxide layer (figure does not show).Because the material and the formation method of pad oxide layer are well known to those skilled in the art, repeat no more at this.
Graphical successively then photoresist layer 305, siliceous bottom anti-reflection layer 304 and organic bottom antireflective layer 303 form structure as shown in Figure 4.Specifically, be earlier graphical photoresist layer 305.The concrete grammar of graphical photoresist layer 305 can be the method for photoetching; Comprise the method for dry lithography and the method for liquid immersion lithography; Promptly predetermined figure is made public on photoresist and wet etching through mask aligner, with predetermined figure transfer to photoresist layer 305.
Be mask then with the photoresist layer 305 after graphical, graphical siliceous bottom anti-reflection layer 304.The concrete grammar of graphical siliceous bottom anti-reflection layer 304 can be the method for plasma dry etching; Specifically; Be to be the plasma etching of gas source with the difluoromethane, wherein the flow of difluoromethane is 30 to 50sccm/min, concrete example such as 35sccm/min; The ambient pressure that forms plasma is 2mT to 100mT, concrete example such as 8mT; Make the source power (Source Power) of gas plasmaization be 200W to 500W, concrete example such as 450W; Make the offset power (Bias Power) of the siliceous bottom anti-reflection layer 306 of plasma bombardment be 50W to 100W, concrete example such as 60V; The time of handling is 15 to 100 seconds, and concrete example was as 48 seconds.Compare with the plasma that uses other gas ionizations to form, use the plasma that forms by difluoromethane ionization to come the siliceous bottom anti-reflection layer 304 of etching can guarantee preferably that the figure on the photoresist layer 305 can accurately transfer to problems such as can not producing the sidewall erosion on the siliceous bottom anti-reflection layer 304.
Use the plasma or the brominated and plasma etching organic bottom antireflective layer 305 oxygen of sulfur-bearing and oxygen then.The concrete grammar that is etched with motor spindle anti-reflecting layer 305 can be the plasma etching that comprises the mist of hydrogen bromide and oxygen with ionization; Wherein the flow of hydrogen bromide is 10sccm/min to 50sccm/min; Concrete example such as 30sccm/min; And the flow of oxygen is 40sccm/min to 50sccm/min, concrete example such as 45sccm/min; The ambient pressure that forms plasma is 5mT to 50mT, concrete example such as 8mT; The source power that makes gas plasmaization is 300W to 800W, concrete example such as 500W; The offset power that the article on plasma body applies is 50W to 100W, concrete example such as 70W; The time of plasma etching is 50 seconds to 100 seconds, and concrete example was as 70 seconds.
Then remove again after the photoresist layer 305, just accomplished step S202.Utilize siliceous bottom anti-reflection layer 304 of above-mentioned technology etching and organic bottom antireflective layer 303; On can guaranteeing that figure is accurately transferred to siliceous bottom anti-reflection layer 304 and organic bottom antireflective layer 303 from photoresist layer 305; Thereby when guaranteeing that follow-up formation cross section is rectangle or foursquare mask layer 302; The change of graphics shape does not take place, and has promptly guaranteed the quality of follow-up mask layer 302 etchings yet.
Execution in step S203 then, it is rectangle or foursquare mask layer 302 that etching forms the cross section, forms structure as shown in Figure 5.Here said cross section is rectangle or square, is meant that mask layer 302 is rectangle or square in the cross section that is parallel on shallow trench 306 Widths.
Specifically; Step S203 is the plasma etching that comprises the mist of fluoroform and argon gas with ionization; Wherein the flow of fluoroform is 10sccm/min to 50sccm/min; Concrete example such as 25sccm/min, and the flow of argon gas is 50sccm/min to 150sccm/min, concrete example such as 100sccm/min; The ambient pressure that forms plasma is 70mT to 100mT, concrete example such as 80mT; The source power that makes gas plasmaization is 100W to 500W, concrete example such as 300W; The offset power that the article on plasma body applies is 200W to 400W, concrete example such as 300W; The time of plasma etching is 80 seconds to 120 seconds, and concrete example was as 100 seconds.
In step S203, the gas source that forms the plasma of etch mask layer 302 is the mist of fluoroform and argon gas.Wherein fluoroform promptly has higher fluorine/hydrogen ratio, still comprises hydrogen plasma again and exists, and does not have hydrogen plasma unlike ionization tetrafluoromethane that kind.Use the plasma that has high fluorine/hydrogen ratio like this; The mask layer 302 that can guarantee to be etched is in that to be parallel to profile on shallow trench 306 Widths straight and corner is sharp keen, thereby can be so that the mask layer that etches 302 is rectangle or square in the cross section that is parallel on shallow trench 306 Widths.And the existence of argon gas is in order to obtain the argon plasma of higher atomic mass, thereby improves etch rate.
Certainly; Those skilled in the art will know that; In step S203, the siliceous bottom anti-reflection layer 304 on the mask layer 302 all might receive plasma attack with organic bottom antireflective layer 303, and particularly siliceous bottom anti-reflection layer 304 might be etched away fully.But this does not influence this step cross section is rectangle or foursquare mask layer 302.
Execution in step S204 utilizes halogen-containing plasma on Semiconductor substrate 301, to form shallow trench 306 again, promptly forms structure as shown in Figure 6.
Specifically; Step S204 comprises the plasma etching that the formed plasma of mist of hydrogen bromide, chlorine and difluoromethane carries out with ionization, and wherein the flow of hydrogen bromide is 10sccm/min to 50sccm/min, concrete example such as 30sccm/min; The flow of chlorine is 10sccm/min to 30sccm/min; Concrete example such as 20sccm/min, and the flow of difluoromethane is 5sccm/min to 10sccm/min, concrete example such as 7sccm/min; The ambient pressure that forms plasma is 20mT to 40mT, concrete example such as 30mT; The source power that makes gas plasmaization is 800W to 1500W, concrete example such as 1000W; The offset power that the article on plasma body applies is 100W to 200W, concrete example such as 170W; The time of plasma etching is 80 seconds to 120 seconds, and concrete example was as 105 seconds.
Among the step S204, cooperate etching semiconductor substrate 301, can duplicate the figure on other coating on the Semiconductor substrate 301 preferably in the starting stage of etching by the formed plasma of the mist of hydrogen bromide, chlorine and difluoromethane.And proceeding along with etching; Plasma descends to the etch rate near the semi-conducting material of side-walls to some extent; That is to say, along with the increase of shallow trench 306 degree of depth, near the etch rate of shallow trench 306 centers greater than etch rate near shallow trench 306 side-walls; Finally just formed the shallow trench 306 of aforesaid inverted " vase " shape, its sem photograph is as shown in Figure 7.
Certainly, the gas source of the halogen-containing plasma of above-mentioned formation only is an example, one skilled in the art will appreciate that the combination of gases of other compositions and ratio also can be used for the described plasma etching of step S204.
Remove other remaining on Semiconductor substrate coating at last, just formed structure as shown in Figure 1.And then the method for being known by one of skill in the art fill oxide in shallow trench 306, just can process required fleet plough groove isolation structure.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting claim; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (8)
1. the manufacturing approach of a shallow trench is characterized in that, comprises step:
Semiconductor substrate with mask layer is provided, and said mask layer surface is formed with organic bottom antireflective layer, siliceous bottom anti-reflection layer and photoresist layer successively;
Graphical successively photoresist layer, siliceous bottom anti-reflection layer and organic bottom antireflective layer are also removed photoresist layer; Wherein, Graphical siliceous bottom anti-reflection layer is to be the plasma etching of gas source with the difluoromethane, and graphical organic bottom antireflective layer is the plasma etching that comprises the mist of hydrogen bromide and oxygen with ionization;
With graphical siliceous bottom anti-reflection layer and organic bottom antireflective layer is mask, and the said mask layer of etching makes that said mask layer is rectangle or square in the cross section that is parallel on the shallow trench Width;
With said mask layer is mask, utilizes halogen-containing plasma on Semiconductor substrate, to form shallow trench, and the sidewall of said shallow trench is indent on the cross section of said shallow trench Width.
2. the manufacturing approach of shallow trench as claimed in claim 1, it is characterized in that: said halogen is fluorine, chlorine or bromine.
3. the manufacturing approach of shallow trench as claimed in claim 1, it is characterized in that: said halogen comprises and only comprises fluorine, chlorine and bromine.
4. the manufacturing approach of shallow trench as claimed in claim 3, it is characterized in that: said halogen-containing plasma is formed through the mist of ionization hydrogen bromide, chlorine and difluoromethane.
5. the manufacturing approach of shallow trench as claimed in claim 4, it is characterized in that: the source power of the mist of said ionization hydrogen bromide, chlorine and difluoromethane is 800W to 1200W.
6. the manufacturing approach of shallow trench as claimed in claim 4 is characterized in that: to the brominated offset power that applies with oxygen plasma is 50W to 100W.
7. the manufacturing approach of shallow trench as claimed in claim 1, it is characterized in that: the material that forms said mask layer is a silicon nitride.
8. the manufacturing approach of shallow trench as claimed in claim 7 is characterized in that: the gas that forms the plasma of the said mask layer of etching is the mist of fluoroform and argon gas.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6245685B1 (en) * | 1999-09-01 | 2001-06-12 | Taiwan Semiconductor Manufacturing Company | Method for forming a square oxide structure or a square floating gate structure without rounding effect |
| US6828248B1 (en) * | 2003-08-08 | 2004-12-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of pull back for forming shallow trench isolation |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6245685B1 (en) * | 1999-09-01 | 2001-06-12 | Taiwan Semiconductor Manufacturing Company | Method for forming a square oxide structure or a square floating gate structure without rounding effect |
| US6828248B1 (en) * | 2003-08-08 | 2004-12-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of pull back for forming shallow trench isolation |
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