CN101706520A - Digital storage oscilloscope with function of gain calibration - Google Patents
Digital storage oscilloscope with function of gain calibration Download PDFInfo
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- CN101706520A CN101706520A CN200910216206A CN200910216206A CN101706520A CN 101706520 A CN101706520 A CN 101706520A CN 200910216206 A CN200910216206 A CN 200910216206A CN 200910216206 A CN200910216206 A CN 200910216206A CN 101706520 A CN101706520 A CN 101706520A
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Abstract
The invention discloses a digital storage oscilloscope with a function of gain calibration, which is characterized by comprising a DAC, wherein the DAC receives gain control words output by a processor, converts the gain control words into voltage, and outputs the voltage to a parallel comparison type ADC serving as the reference voltage of analog-digital conversion. During calibration, the gain control words are changed, so that the reference voltage of the analog-digital conversion of the parallel comparison type ADC is changed, and the quantized value of sampled data is adjusted, and the gain control words are updated until the difference between an actual amplitude quantized value and a theoretical amplitude quantized value is not more than a stated range; and in normal use, the gain control words are sent to the DAC and are converted into the voltage which serves as the reference voltage of the analog-digital conversion, acquisition data output by the analog-digital conversion is sent into a data storage device for storage, and then the acquisition data is read out by the processor for processing and displaying. The invention provides a scheme for adjusting the reference voltage of the analog-digital conversion to perform gain control, which can perform continuous adjustment on gains so as to improve the accuracy of the gain control and effectively achieve the calibration of the digital storage oscilloscope.
Description
Technical field
The present invention relates to the digital storage oscilloscope technical field, specifically, relate to a kind of digital storage oscilloscope with function of gain calibration.
Background technology
In the digital storage oscilloscope, because the input range of analog to digital converter (ADC) is all smaller, usually about 1Vpp, it is little of several millivolts, the big input range of hectovolt on tens to satisfy oscillograph, so must carry out distortionless conditioning to simulating signal by modelled signal conditioning passage, as small-signal is amplified, large-signal is decayed.
Along with environment for use, as variation of temperature, wearing out of gain amplifier, signal attenuation network and other components and parts can make digital storage oscilloscope gain deviation occur, cause bigger measuring error, this just need proofread and correct the gain of digital storage oscilloscope.Normally the range value mode consistent with the reference value of the standard analog signal of input that measure realize by regulating the gain of gain amplifier, making in the correction of gain.
The adjusting of gain amplifier generally has two kinds of schemes:
(1), voltage control Amplifier
Processor produces the gain control word, digital to analog converter (DAC) produces gain-controlled voltage according to this gain control word and gives voltage control Amplifier then, and then regulate the amplitude of importing simulating signal, the numerical value that quantizes through ADC that makes processor read returns within effective numerical range.
Though voltage control Amplifier can be by the aanalogvoltage of DAC generation, realization is to the continuous adjusting of the amplitude of simulating signal, but the effective bandwidth of such voltage control Amplifier can only reach about 100M usually usually, and the digital storage oscilloscope for high bandwidth more requires then can't meet the demands.
(2), numerical control variable gain amplifier
Produce the gain control word by processor, and then regulate the gain of input simulating signal.Though the numerical control variable gain amplifier can be operated in the higher bandwidth range, but because the limited length of gain control word, the step-length of gain-adjusted is often bigger, common 0.5dB～2dB, can not realize continuous adjusting, the gain control precision is low, so the effect of gain control is often not ideal.
Summary of the invention
The objective of the invention is to overcome the low deficiency of gain accuracy in the prior art digital storage oscilloscope gain calibration process, provide a kind of gain control precision high digital storage oscilloscope, thereby realized the correction of digital storage oscilloscope effectively.
For achieving the above object, digital storage oscilloscope with function of gain calibration of the present invention, comprise signal condition passage, parallel comparison A/D C, data-carrier store and processor, it is characterized in that, also comprise a DAC, processor is received in the input of DAC, and output is connected to parallel comparison A/D C reference voltage input terminal, be used for the gain control word of receiving processor output, and convert voltage to and output to parallel comparison A/D C as analog-to-digital reference voltage;
At timing, the input canonical reference simulating signal of a certain vertical gear correspondence is to the signal condition passage, the canonical reference simulating signal outputs to after the signal condition passage is nursed one's health among the parallel comparison A/D C carries out analog to digital conversion, and the image data after the conversion outputs in the data-carrier store; Image data in the processor reading of data storer calculates the actual quantization range value, and compares with theory quantification range value; If both differences have surpassed the scope of regulation, then change the gain control word, thereby change the parallel analog-to-digital reference voltage of comparison A/D C, regulate the quantized value of parallel comparison A/D C sampled data, until making the actual quantization range value that calculates according to image data and the theoretical difference that quantizes range value be no more than the scope of regulation, gain control word in the update processor gain control word memory withdraws from the correction of proofreading and correct or carrying out next vertical gear; If both differences have not surpassed the scope of regulation, then directly withdraw from the correction of proofreading and correct or carrying out next vertical gear;
When normal the use, processor reads the gain control word in the gain control word memory, and send to described DAC, convert voltage to and export to parallel comparison A/D C as analog-to-digital reference voltage, parallel comparison A/D C carries out analog to digital conversion according to the analog-to-digital reference voltage of input, the image data of conversion output is sent in the data-carrier store and is stored, and is read out by processor then and handles and show.
Goal of the invention of the present invention is achieved in that
The present invention has proposed a kind of new gain control scheme according to the principle of parallel comparison A/D C itself, can carry out continuous adjusting to gain, thereby improve the gain control precision, has realized the correction of digital storage oscilloscope effectively.
ADC is one of core devices of digital storage oscilloscope, and ADC can be divided into direct conversion hysteria and indirect conversion type according to the relation classification of switching signal.And, can be divided into parallel relatively type, classification type, successive approximation, count tracking type, integral form, voltage-frequency conversion hysteria and ∑-Δ type again according to converting circuit structure and principle of work classification.Wherein parallel comparison A/D C switching rate is the fastest, and sampling rate can reach more than the 1GSPS, can satisfy the requirement of digital storage oscilloscope high-speed signal acquisition, so the inner structure of digital storage oscilloscope high-speed ADC adopts parallel comparison A/D C mostly.
Parallel comparison A/D C belongs to direct conversion hysteria, adopts 2
n-1 voltage comparator is only done once relatively to carry out conversion, claims FLash (fast) type again.In this ADC, the conversion of n position needs 2
nIndividual accurate divider resistance, 2
n-1 voltage comparator, 2
n-1 latch and a scrambler.
As shown in Figure 1, reference voltage V
RefThrough 2
nIndividual accurate divider resistance, promptly resistance be respectively 3R, 2R, 2R ..., 2R, 2R, 1R resistance series connection dividing potential drop obtain voltage V
O1, V
O2... V
O2 n -2, V
O2 n -1, be added to the reference edge of voltage comparator 101, analog signal voltage V then respectively
InBe added to the more intense input end of these voltages simultaneously, input terminal voltage be higher than reference voltage terminal then voltage comparator 101 be output as 1, otherwise be 0.The output state C of voltage comparator 101
O1, C
O2... C
O2 n -2n, C
O2 n -1By latch 102 storages, CP is the Enable Pin of latch 102.The output valve Q of 103 pairs of latchs 102 of scrambler
O1, Q
O2... Q
O2 n -2, Q
O2 n -1Behind the coding, output converting digital amount D
0, D
1... D
N-1, D
nBecause the voltage comparator among the ADC is concurrent working, so be referred to as parallel comparison A/D C.
Conventional digital storage oscilloscope gain calibration mode is by realization is regulated in the gain of gain amplifier in the signal condition passage.Because the influence of factor such as lack of resolution, can cause simulating signal after the conditioning of signal condition passage output to be compared usually and deviation occur with theoretical value.At parallel comparison A/D C reference voltage V
RefBe fixed value, be generally under the situation of 1V that parallel comparison A/D C actual quantization value can not accurately reflect original input simulating signal.
Therefore, after processor reads sampled data,, then have if come the remove quantization deviation by software:
N′*P
adj＝N
P
adj＝N/N′
Wherein, N is parallel comparison A/D C actual quantization value, P for the theoretical quantized value of parallel comparison A/D C, N '
AdjBe correction coefficient.Under the high speed acquisition state, the method need be handled a large amount of sampled datas, will inevitably increase the weight of the burden of processor, and real-time is not high, has reduced the efficient of system, so realize poor effect.
And by the parallel comparison A/D C principle of preceding surface analysis as can be known, parallel comparison A/D C external reference voltage can be regulated within the specific limits, range of adjustment generally can reach 0.75V～1.5V, range of adjustment surpasses ± 2dB (so-2.4dB～3.5dB). at the signal condition channel resolution often is under the situation of 2dB, the present invention is by regulating the parallel comparison A/D C reference voltage Vref of control, input simulating signal quantized values is realized regulating continuously, realize the correction of digital storage oscilloscope gain, not only eliminated the deviation of the parallel comparison A/D C quantized value that factors such as signal condition channel resolution deficiency bring, and the continuous adjusting of realization gain, the real-time of gain control precision and system has obtained improving greatly.
Description of drawings
Fig. 1 is the schematic diagram of parallel comparison A/D C;
Fig. 2 is a kind of embodiment theory diagram of digital storage oscilloscope that the present invention has function of gain calibration.
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the present invention is described, so that understand the present invention better.What need point out especially is that in the following description, when perhaps the detailed description that adopts known function and design can desalinate main contents of the present invention, these were described in here and will be left in the basket.
Embodiment
Fig. 2 is a kind of embodiment theory diagram of digital storage oscilloscope that the present invention has function of gain calibration.
As shown in Figure 2, in the present embodiment, the present invention has the digital storage oscilloscope of function of gain calibration, comprises signal condition passage 2, parallel comparison A/D C 1, data-carrier store 3, processor 4, DAC 5, impact damper 6 and LCD display 7.In the present embodiment, data-carrier store 3 adopts a slice FPGA to realize that processor 4 is DSP.
In the present embodiment, DAC 5 is the high-precision high precision digital-to-analog converter of 12bit, and processor 4 is received in the input of DAC 5, and output is connected to parallel comparison A/D C 1 reference voltage input terminal V
Ref, be used for the 12bit gain control word of receiving processor 4 output, and convert voltage to and output to parallel comparison A/D C as analog-to-digital reference voltage V
RefIn the present embodiment, the output voltage of DAC 5 outputs to parallel comparison A/D C 1 reference voltage input terminal V through impact damper 6
RefIn addition, parallel comparison A/D C 1 reference voltage input terminal V
RefAlso be parallel to two 0.01u on ground and the low-and high-frequency filter capacitor of 1000p.
At timing, the input canonical reference simulating signal of a certain vertical gear correspondence is to signal condition passage 2, and the canonical reference simulating signal outputs to the input end V of parallel comparison A/D C 1 after signal condition passage 2 is nursed one's health
In, in parallel comparison A/D C 1, carry out analog to digital conversion, the 8bit image data after the conversion outputs to data-carrier store 3, promptly among the FPGA; Processor 4 reading of data storeies 3, promptly the 8bit image data among the FPGA calculates the actual quantization range value, and compares with theory quantification range value; If both differences have surpassed the scope of regulation, then change the gain control word of 12bit, thereby change the parallel analog-to-digital reference voltage V of comparison A/D C1
RefRegulate the quantized value of parallel comparison A/D C 1 sampled data, until making the actual quantization range value that calculates according to the 8bit image data and the theoretical difference that quantizes range value be no more than the scope of regulation, processor 4 upgrades gain control word in the gain control word memory, withdraws from the correction of proofreading and correct or carrying out next vertical gear; If both differences have not surpassed the scope of regulation, then directly withdraw from the correction of proofreading and correct or carrying out next vertical gear;
When normal the use, processor 4 reads the gain control word of 12 bits in the gain control word memory, and send to described DAC 5, convert voltage to and export to parallel comparison A/D C 1 as analog-to-digital reference voltage Vref, parallel comparison A/D C 1 carries out analog to digital conversion according to the analog-to-digital reference voltage Vref of input, the 8bit image data of conversion output is sent into data-carrier store 3, be to store among the FPGA, read out by processor 4 then and handle, and show by LCD display 7.
From Fig. 2, as can be seen, among the present invention, the gain control of digital storage oscilloscope mainly is made up of two-stage.The first order: 2 pairs of inputs of signal condition passage simulating signal is carried out coarse adjustment, and the signal after the coarse adjustment is inputed to the parallel comparison A/D C 1 of adjusting; The second level, processor 4, promptly DSP changes the reference voltage level of parallel comparison A/D C 1 by control DAC 5 output voltages, and then parallel comparison A/D C 1 output quantized value is carried out fine tuning, finishes the correction of gain.
Example
With digital storage oscilloscope 20mv/div shelves is example, the tentative standard reference analog signal is 60mVpp, promptly should be 3 lattice, do not having under the situation of channel error, the signal theory range value of signal condition passage 2 outputs is 300mVpp, parallel comparison A/D C 1 theoretical quantification range value is 75, because digital storage oscilloscope is generally 25 pixels of every lattice, so 3 lattice quantized values are 75.Two kinds of gain-adjusted modes of digital storage oscilloscope comparing result is as shown in table 1:
Table 1
Can draw by table 1, adopt two-stage gain control mode of the present invention, eliminated the deviation of not enough caused parallel comparison A/D C actual quantization value of channel resolution and theoretical quantized value, significantly improved the gain control precision, avoid back level to carry out the work that mass data is handled, promoted digital storage oscilloscope real-time response ability.
Although above the illustrative embodiment of the present invention is described; so that the technician of present technique neck understands the present invention; but should be clear; the invention is not restricted to the scope of embodiment; to those skilled in the art; as long as various variations appended claim limit and the spirit and scope of the present invention determined in, these variations are conspicuous, all utilize innovation and creation that the present invention conceives all at the row of protection.
Claims (2)
1. digital storage oscilloscope with function of gain calibration, comprise signal condition passage, parallel comparison A/D C, data-carrier store and processor, it is characterized in that, also comprise a DAC, processor is received in the input of DAC, output is connected to parallel comparison A/D C reference voltage input terminal, is used for the gain control word of receiving processor output, and converts voltage to and output to parallel comparison A/D C as analog-to-digital reference voltage;
At timing, the input canonical reference simulating signal of a certain vertical gear correspondence is to the signal condition passage, the canonical reference simulating signal outputs to after the signal condition passage is nursed one's health among the parallel comparison A/D C carries out analog to digital conversion, and the image data after the conversion outputs in the data-carrier store; Image data in the processor reading of data storer calculates the actual margin quantized value, and compares with theoretical amplitude quantizing value; If both differences have surpassed the scope of regulation, then change the gain control word, thereby change the parallel analog-to-digital reference voltage of comparison A/D C, regulate the quantized value of parallel comparison A/D C sampled data, be no more than the scope of regulation until the difference that makes the actual margin quantized value that calculates according to image data and theoretical amplitude quantizing value, gain control word in the update processor gain control word memory withdraws from the correction of proofreading and correct or carrying out next vertical gear; If both differences have not surpassed the scope of regulation, then directly withdraw from the correction of proofreading and correct or carrying out next vertical gear;
When normal the use, processor reads the gain control word in the gain control word memory, and send to described DAC, convert the parallel comparison A/D C of voltage output to as analog-to-digital reference voltage, parallel comparison A/D C carries out analog to digital conversion according to the analog-to-digital reference voltage of input, the image data of conversion output is sent in the data-carrier store and is stored, and is read out by processor then and handles and show.
2. the digital storage oscilloscope with function of gain calibration according to claim 1 is characterized in that, described DAC is the high precision digital-to-analog converter of 12bit.
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| CN106597343A (en) * | 2016-12-29 | 2017-04-26 | 电子科技大学 | Oscilloscope automatic calibration method based on gain judgment |
| CN107179519A (en) * | 2017-06-09 | 2017-09-19 | 中国电子科技集团公司第四十研究所 | A kind of passage calibrating installation and method for digital oscilloscope |
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| US5180971A (en) * | 1990-03-02 | 1993-01-19 | Hewlett-Packard Company | Method and apparatus for increasing throughput in random repetitive digitizing systems |
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| CN101369815A (en) * | 2007-08-15 | 2009-02-18 | 黑龙江大学 | Method for automatically regulating reference voltage and improving analog-to-digital conversion definition |
| CN201177640Y (en) * | 2008-04-02 | 2009-01-07 | 优利德科技(成都)有限公司 | Analogue channel of digital storage oscilloscope |
| CN101694500B (en) * | 2009-10-23 | 2011-08-03 | 青岛汉泰电子有限公司 | Circuit of digital storage oscillograph |
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| CN104267228A (en) * | 2014-09-30 | 2015-01-07 | 中国电子科技集团公司第四十一研究所 | Circuit allowing trigger sensitivity of digital oscilloscope to be continuously adjustable |
| CN105388345A (en) * | 2015-12-24 | 2016-03-09 | 福建利利普光电科技有限公司 | Oscilloscope enabling internal phase to be automatically calibrated |
| CN105871348A (en) * | 2016-05-12 | 2016-08-17 | 中国电子科技集团公司第四十研究所 | Low-noise and wide-pressure audio-signal conditioning circuit based on self-calibration and dynamic gain adjustment |
| CN105871348B (en) * | 2016-05-12 | 2018-11-20 | 中国电子科技集团公司第四十一研究所 | The wide pressure audio signal conditioning circuit of low noise adjusted based on self calibration and dynamic gain |
| DE102016014124A1 (en) * | 2016-11-26 | 2018-05-30 | Leopold Kostal Gmbh & Co. Kg | Method for measuring a capacitance value |
| CN106597343A (en) * | 2016-12-29 | 2017-04-26 | 电子科技大学 | Oscilloscope automatic calibration method based on gain judgment |
| CN107179519A (en) * | 2017-06-09 | 2017-09-19 | 中国电子科技集团公司第四十研究所 | A kind of passage calibrating installation and method for digital oscilloscope |
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