CN107179519A - A kind of passage calibrating installation and method for digital oscilloscope - Google Patents
A kind of passage calibrating installation and method for digital oscilloscope Download PDFInfo
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- CN107179519A CN107179519A CN201710477829.4A CN201710477829A CN107179519A CN 107179519 A CN107179519 A CN 107179519A CN 201710477829 A CN201710477829 A CN 201710477829A CN 107179519 A CN107179519 A CN 107179519A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
- G01R35/005—Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
- G01R35/007—Standards or reference devices, e.g. voltage or resistance standards, "golden references"
Abstract
The present invention proposes a kind of passage calibrating installation for digital oscilloscope, in the front end setting signal selection control circuit of channel of digital oscilloscope circuit, in digital oscilloscope normal work, measured signal is selected as the input signal of channel circuit, when entering row of channels calibration, calibration voltage is selected as the input signal of channel circuit；Also include two-stage structure for amplifying, first order difference amplifier is arranged on after attenuator, for coarse adjustment, one fixed yield value of each range correspondence；Second level programmable gain amplifier is arranged on after difference amplifier, for fine tuning, realizes the calibration to channel gain, the output end connection ADC of programmable gain amplifier.The present invention proposes a kind of passage calibrating installation and method for digital oscilloscope, it is possible to provide the voltage output calibrated for passage, and is automatically performed passage in different input resistance, the calibration of different vertical range by programme-control, substantially increases calibration efficiency.
Description
Technical field
The present invention relates to technical field of measurement and test, more particularly to a kind of passage calibrating installation for digital oscilloscope is also related to
And a kind of channel calibration method for digital oscilloscope.
Background technology
Digital oscilloscope is as a kind of general basic instrument, applied to the signal measurement under a variety of occasions.Existing oscillography
The channel part principle of device is as shown in figure 1, the measured signal of outside input is after impedance is converted, into attenuator, according to working as
Preceding range, selects attenuation multiple, and the corresponding attenuation multiple of different ranges can be that straight-through, 10 times of decay or 100 times are decayed,
Then the signal after decay is sent into difference amplifier, adds and ADC is sent into after offset adjusted signal, carry out the sampling of signal.
Impedance inverter circuit includes the input impedance selection in 50 Europe, 1M Europe.Attenuator is mainly according to current range come really
Surely the attenuation multiple that needs with the difference amplifier of rear stage, it is necessary to consider, so that it is determined that the decay of whole passage or putting
Big multiple.
As a rule, the vertical range of oscillograph is according to 1,2,5 steppings, in 50 ohm input impedance, oscillograph
Maximum perpendicular range can arrive 1V, and minimum range is 1mV.By taking the full width voltage 500mV of ADC as an example, for 1V ranges, 8 are vertically corresponded to
Lattice, then current full scale corresponding voltage amplitude is 8V, attenuator is set into 10 times of decay, then into the letter of difference amplifier
Number it is 800mV, 800mV/500mV=1.6, at this moment requiring difference amplifier further to decay 1.6 times, could to meet ADC defeated
Enter the requirement of voltage.After so, the signal that an amplitude is 8V, by the conditioning of channel circuit, feeding ADC's is exactly one
Amplitude be 500mV signal, corresponded to ADC full width voltage, be eventually displayed on screen be exactly a 8 lattice amplitudes ripple
Shape.So for 1mV range, full scale is 8mV, is at this moment set to attenuator to lead directly to, 500mV/8mV=62.5,
At this moment the requirement of ADC input voltages could be met by requiring the amplification that carry out 62.5 times of difference amplifier.It follows that for
Different range, it is desirable to which channel circuit carries out amplification or attenuation processing accordingly, so as to meet the requirement of ADC inputs.
In channel circuit design, substantially stationary attenuator is that straight-through, 10 times of decay or 100 are decayed, due to different ranges
It is required that the decay of whole passage, multiplication factor are different, therefore difference amplifier typically uses numerical control variable gain amplifier,
By the adjustment to difference amplifier, required with meeting the final decay of whole passage, amplification, so as to realize to the accurate of signal
Measurement.
But in use, because of the difference of use environment, there is certain difference in the working characteristics of oscillograph internal circuit
It is different, and with the increase of use time, because of reasons such as device agings, also the working characteristics of circuit can be caused to change, because
This is the accuracy for ensureing measurement, it is necessary to be calibrated to the passage of oscillograph.
The passage calibration of oscillograph includes zero point correction, offset calibration and gain calibration.Zero point correction is without input letter
Number when, the baseline for making oscillograph by the control of the voltage of offset adjusted is located at the corresponding dead-center position of screen center.Offset calibration
It is, in the corresponding positive full width DC voltage of the current range of input, DC waveform to be shown by the voltage control of offset adjusted
In screen center.Gain calibration is, in the corresponding positive three lattice amplitude DC voltage of the current range of input, to pass through difference amplifier
Gain-adjusted, DC voltage waveform is shown in the position of positive three lattice of screen.
And entered using above-mentioned circuit design when row of channels is calibrated, it is necessary to which external calibration signal source, goes back in different ranges
Need adjust signal source amplitude output signal, due to the passage of oscillograph typically have 50 Europe, the two kinds of impedances in 1M Europe input side
Therefore formula, range calibration one by one is exported using this manual Regulate signal including multiple vertical ranges again under same input impedance
Method, it is not only complicated but also time-consuming, substantially reduce ground calibration efficiency.
The content of the invention
To solve above-mentioned the deficiencies in the prior art, the present invention propose a kind of passage calibrating installation for digital oscilloscope and
Method, it is possible to provide for passage calibrate voltage output, and by programme-control be automatically performed passage in different input resistance, no
With the calibration of vertical range, calibration efficiency is improved, is that the use of user offers convenience, and further improves the property of product
Energy.
The technical proposal of the invention is realized in this way：
A kind of passage calibrating installation for digital oscilloscope, in the front end setting signal choosing of channel of digital oscilloscope circuit
Select control circuit, in digital oscilloscope normal work, selection measured signal as channel circuit input signal, when being led to
When road is calibrated, calibration voltage is selected as the input signal of channel circuit；
Also include two-stage structure for amplifying, first order difference amplifier is arranged on after attenuator, for coarse adjustment, each range pair
Answer a fixed yield value；Second level programmable gain amplifier is arranged on after difference amplifier, for fine tuning, is realized to logical
The calibration of road gain, the output end connection ADC of programmable gain amplifier.
Alternatively, the calibration voltage is realized by the design of DAC and operational amplifier.
Alternatively, the DAC chip of 16 accesses 4.096V reference voltage, by writing hexadecimal 0~ffff scopes
Numerical value, export the DC voltage of 0~4.096V scopes, output voltage calculation formula is：
V2600=K/216*4.096V
Wherein, K is write-in DAC numerical value, and scope is 0~ffff of hexadecimal values；
DAC chip output voltage accesses the anode of operational amplifier, and the output voltage of operational amplifier is：
V8513=(V2600*(R2+R3)-4.096*R3)/R2
CPU is by setting the control of the write-in Numerical Implementation op-amp output voltage of DAC chip, and operational amplifier is defeated
Go out the signal behavior input that voltage is output to channel circuit as alignment of waveforms.
Based on said apparatus, the invention also provides a kind of channel calibration method, comprise the following steps：
Step 1: selection calibration voltage is input signal；
Step 2: channel circuit zero point correction, calibration voltage output is set to 0V；
Step 3: CPU reads ADC gathered datas, its average value is calculated, if more than 0V, reducing the output of offset voltage；
If less than 0V, increasing the output of offset voltage, it is 0V finally to make average value, and the offset voltage of record now is passage zero point
Calibration value；
Step 4: channel gain is calibrated, calibration voltage exports+3 lattice voltages for being set to current range；
Step 5: CPU reads ADC gathered datas, its average value is calculated, if more than+3 lattice voltages of range, reduction can
Programmed gain value；If less than+3 lattice voltages of range, increasing programmable-gain value, finally making average value and range corresponding+3
Lattice magnitude of voltage is equal, and the programmable-gain value of record now is the calibration value of channel gain；
Step 6: channel offset is calibrated, calibration voltage exports+4 lattice voltages for being set to current range；
Step 7: CPU reads ADC gathered datas, its average value is calculated, if more than 0, reducing the output of offset voltage；
If less than 0, increasing the output of offset voltage, it is 0V finally to make average value, and the offset voltage of record now is channel offset
Calibration value；
Step 8: CPU controls channel oscilloscope circuit, 50 Europe, the input impedance of 1M Europe of each passage are realized, and each
Vertical range completes above-mentioned calibration, and records corresponding calibration data.
The beneficial effects of the invention are as follows：
The voltage output of passage calibration is can provide for, and passage is automatically performed in different input resistances by programme-control
The anti-, calibration of different vertical range, substantially increases calibration efficiency.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is existing channel oscilloscope theory diagram；
Fig. 2 is the channel of digital oscilloscope theory diagram with passage calibrating installation of the present invention；
Fig. 3 is calibration voltage generation circuit schematic diagram of the invention；
Fig. 4 is the flow chart of the passage calibration process of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
The passage calibration of oscillograph includes zero point correction, offset calibration and gain calibration.The passage of oscillograph typically has 50
Europe, the input mode of the two kinds of impedances in 1M Europe, again including multiple vertical ranges, the passage calibration work of oscillograph under same input impedance
Make complicated and time-consuming, therefore the passage calibration efficiency of raising oscillograph will offer convenience for the use of user, and can be further
Lift the performance of product.
It is an object of the invention to propose a kind of passage calibrating installation and method for digital oscilloscope, it is possible to provide be used for
The voltage output of passage calibration, and passage is automatically performed in different input resistance, the school of different vertical range by programme-control
Standard, substantially increases calibration efficiency.
As shown in Fig. 2 to realize that the passage of oscillograph is calibrated, signal behavior control electricity is added in the front end of channel circuit
Road, in oscillograph normal work, selection measured signal, when entering row of channels calibration, is selected as the input signal of channel circuit
Calibration voltage is selected as the input signal of channel circuit；While the range accuracy in order to improve oscillograph, in difference amplifier
Part has carried out two-stage design, and the first order is equivalent to coarse adjustment, one fixed yield value of each range correspondence, the second level equivalent to
Fine tuning, have selected the programmable gain amplifier of a small gain step size, realize the calibration to channel gain.
As shown in figure 3, calibration voltage is realized by the design of DAC and operational amplifier.The DAC chip of 16
LTC2600, accesses 4.096V reference voltage, by writing the numerical value of hexadecimal 0~ffff scopes, exportable 0~
4.096V the DC voltage of scope.Output voltage calculation formula is：
V2600=K/216*4.096V
Wherein, K is write-in DAC numerical value, and scope is 0~ffff of hexadecimal values.
Operational amplifier accesses the anode of operational amplifier using chip AD8513, the voltage of LTC2600 outputs, and computing is put
The output voltage of big device is：
V8513=(V2600*(R2+R3)-4.096*R3)/R2
The input resistance R2 and feedback resistance R3 of operational amplifier are equal situation in Fig. 3, and now operational amplifier is defeated
Going out voltage is：
V8513=2*V2600-4.096
CPU is by setting LTC2600 write-in numerical value that the control of op-amp output voltage can be achieved.With 600mV
Exemplified by amplitude, numerical value 37568 is write to LTC2600, you can control AD8513 exports 600mV voltage, defeated as alignment of waveforms
Go out the signal behavior input to channel circuit.
As shown in figure 4, the present invention passage calibration realize that step is as follows：
Step 1: selection calibration voltage is input signal；
Step 2: channel circuit zero point correction, calibration voltage output is set to 0V；
Step 3: CPU reads ADC gathered datas, its average value is calculated, if more than 0V, reducing the output of offset voltage；
If less than 0V, increasing the output of offset voltage, it is 0V finally to make average value.The offset voltage of record now is passage zero point
Calibration value.
Step 4: channel gain is calibrated, calibration voltage exports+3 lattice voltages for being set to current range；
Step 5: CPU reads ADC gathered datas, its average value is calculated, if more than+3 lattice voltages of range, reduction can
Programmed gain value；If less than+3 lattice voltages of range, increasing programmable-gain value, finally making average value and range corresponding+3
Lattice magnitude of voltage is equal, and the programmable-gain value of record now is the calibration value of channel gain.
Step 6: channel offset is calibrated, calibration voltage exports+4 lattice voltages for being set to current range；
Step 7: CPU reads ADC gathered datas, its average value is calculated, if more than 0, reducing the output of offset voltage；
If less than 0, increasing the output of offset voltage, it is 0V finally to make average value.The offset voltage of record now is channel offset
Calibration value.
Step 8: CPU control passage circuits, realize 50 Europe, the input impedance of 1M Europe of each passage, and each vertical amount
Journey completes above-mentioned calibration, and records corresponding calibration data.
The present invention proposes a kind of passage calibrating installation and method for digital oscilloscope, it is possible to provide for passage calibration
Voltage output, and passage is automatically performed in different input resistance, the calibration of different vertical range by programme-control, carried significantly
High calibration efficiency.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
God is with principle, and any modification, equivalent substitution and improvements made etc. should be included in the scope of the protection.
Claims (4)
1. a kind of passage calibrating installation for digital oscilloscope, it is characterised in that in the front end of channel of digital oscilloscope circuit
Setting signal selection control circuit, in digital oscilloscope normal work, selection measured signal is believed as the input of channel circuit
Number, when entering row of channels calibration, calibration voltage is selected as the input signal of channel circuit；
Also include two-stage structure for amplifying, first order difference amplifier is arranged on after attenuator, for coarse adjustment, each range correspondence one
The yield value of individual fixation；Second level programmable gain amplifier is arranged on after difference amplifier, for fine tuning, realizes and passage is increased
The calibration of benefit, the output end connection ADC of programmable gain amplifier.
2. a kind of passage calibrating installation for digital oscilloscope as claimed in claim 1, it is characterised in that
The calibration voltage is realized by the design of DAC and operational amplifier.
3. a kind of passage calibrating installation for digital oscilloscope as claimed in claim 2, it is characterised in that
The DAC chip of 16 accesses 4.096V reference voltage, by writing the numerical value of hexadecimal 0~ffff scopes, output 0
The DC voltage of~4.096V scopes, output voltage calculation formula is：
V2600=K/216*4.096V
Wherein, K is write-in DAC numerical value, and scope is 0~ffff of hexadecimal values；
DAC chip output voltage accesses the anode of operational amplifier, and the output voltage of operational amplifier is：
V8513=(V2600*(R2+R3)-4.096*R3)/R2
CPU is by setting the control of the write-in Numerical Implementation op-amp output voltage of DAC chip, operational amplifier output electricity
Pressure is output to the signal behavior input of channel circuit as alignment of waveforms.
4. a kind of channel calibration method based on any one of claims 1 to 3 described device, it is characterised in that including following step
Suddenly：
Step 1: selection calibration voltage is input signal；
Step 2: channel circuit zero point correction, calibration voltage output is set to 0V；
Step 3: CPU reads ADC gathered datas, its average value is calculated, if more than 0V, reducing the output of offset voltage；If small
In 0V, then increase the output of offset voltage, it is 0V finally to make average value, the offset voltage of record now is the calibration of passage zero point
Value；
Step 4: channel gain is calibrated, calibration voltage exports+3 lattice voltages for being set to current range；
Step 5: CPU reads ADC gathered datas, its average value is calculated, if more than+3 lattice voltages of range, reducing programmable
Yield value；If less than+3 lattice voltages of range, increasing programmable-gain value, finally make average value+3 lattice electricity corresponding with range
Pressure value is equal, and the programmable-gain value of record now is the calibration value of channel gain；
Step 6: channel offset is calibrated, calibration voltage exports+4 lattice voltages for being set to current range；
Step 7: CPU reads ADC gathered datas, its average value is calculated, if more than 0, reducing the output of offset voltage；If small
In 0, then increase the output of offset voltage, it is 0V finally to make average value, the offset voltage of record now is the calibration of channel offset
Value；
Step 8: CPU controls channel oscilloscope circuit, 50 Europe, the input impedance of 1M Europe of each passage are realized, and it is each vertical
Range completes above-mentioned calibration, and records corresponding calibration data.
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Cited By (5)
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| CN112285629A (en) * | 2020-10-21 | 2021-01-29 | 福建利利普光电科技有限公司 | Method and device for zero point fast self calibration of digital oscilloscope |
| CN112904258A (en) * | 2021-02-08 | 2021-06-04 | 优利德科技(中国)股份有限公司 | Multi-stage bias correction method and device based on dynamic target value evaluation |
| CN113252956A (en) * | 2021-04-08 | 2021-08-13 | 广州致远电子有限公司 | Oscilloscope with ADC linear calibration function |
| CN113295901A (en) * | 2021-07-28 | 2021-08-24 | 佛山市联动科技股份有限公司 | Front end adjusting circuit of digital oscilloscope and digital oscilloscope |
| CN113484806A (en) * | 2021-07-14 | 2021-10-08 | 中国电子科技集团公司第九研究所 | High-precision reproduction device and reproduction method for weak magnetic field |
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| CN113484806A (en) * | 2021-07-14 | 2021-10-08 | 中国电子科技集团公司第九研究所 | High-precision reproduction device and reproduction method for weak magnetic field |
| CN113484806B (en) * | 2021-07-14 | 2024-03-22 | 中国电子科技集团公司第九研究所 | High-precision reproduction device and reproduction method for weak magnetic field |
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Application publication date: 20170919 |