CN101673887B - Improved matched-impedance surface-mount technology footprints - Google Patents

Improved matched-impedance surface-mount technology footprints Download PDF

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Publication number
CN101673887B
CN101673887B CN2009102040712A CN200910204071A CN101673887B CN 101673887 B CN101673887 B CN 101673887B CN 2009102040712 A CN2009102040712 A CN 2009102040712A CN 200910204071 A CN200910204071 A CN 200910204071A CN 101673887 B CN101673887 B CN 101673887B
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China
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via hole
row
pad
signal
arrangement
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CN101673887A (en
Inventor
D·莫利昂
S·H·J·塞尔屈
W·海伊维特
J·德格斯特
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FCI SA
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FCI SA
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/646Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
    • H01R13/6461Means for preventing cross-talk
    • H01R13/6471Means for preventing cross-talk by special arrangement of ground and signal conductors, e.g. GSGS [Ground-Signal-Ground-Signal]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/646Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
    • H01R13/6473Impedance matching
    • H01R13/6477Impedance matching by variation of dielectric properties
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3405Edge mounted components, e.g. terminals
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/09163Slotted edge
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/0919Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09845Stepped hole, via, edge, bump or conductor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10287Metal wires as connectors or conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/1034Edge terminals, i.e. separate pieces of metal attached to the edge of the PCB

Abstract

Disclosed are methodologies for defining matched-impedance surface-mount technology footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads (P) and an arrangement of electrically-conductive vias (V). The via arrangement may differ from the pad arrangement. The vias (V) may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias (G) and signal vias (S) may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component. The via arrangement may be also be altered to limit cross-talk among neighboring signal conductors. Thus, the via arrangement may be defined to balance the impedance, cross-talk, and routing density requirements of the system.

Description

Improved matched-impedance surface-mount technology footprints
Present patent application is to be on November 28th, 2005 applying date, application number is 200580047301.9 (PCT/EP2005/012691), priority date the earliest is on November 29th, 2004, and denomination of invention is divided an application for the Chinese patent application of " improved matched-impedance surface-mount technology footprints ".
The cross reference of related application
According to 35U.S.C. § 119 (e), the application requires in the interim U.S. Patent application no.60/631 of submission on November 29th, 2004,545, the interim U.S. Patent application no.60/631 that submits on November 29th, 2004,499, the interim U.S. Patent application no.60/686 that submits on June 1st, 2005,514 priority.
The application relates to U.S. Patent application no.[attorney docket FCI-2877 (C3632)], it is submitted to therewith same date, be entitled as " High-Frequency, High-Signal-Density, Surface-Mount Technology Footprint Definitions ".
The content of above referenced each U.S. Patent application is incorporated herein by reference.
Invention field
Generally, the present invention relates to electric connector/circuit board systems.More specifically, the present invention relates to for the method that forms the basal surface (footprint) of surface mounting technology at the sort circuit plate, wherein, with the via arrangement different from the pad arrangement mode via hole of having arranged respect to one another, and the wiring density in the conducting wire that substrate is arranged that via hole provides is arranged the wiring density that circuit board has in the identical situation greater than arranging with signal pad in signal via.
Background technology
Usually, electric assembly, for example electric connector can comprise a plurality of conductive contacts, its end points part for example can be arranged with the matrix of row and column.Contact L can be signal conductor or earthing conductor, and can arrange along row in the mode of signal-signal-ground.Although signal contact can be single-ended signal conductor, adjacent signal contact also can consist of differential wave pair.This assembly can comprise differential wave to any combination of single-ended signal conductor.
The end points part of contact can be admitted by substrate (for example base plate or printed circuit board (PCB)).In the plate end stage, contact lead can be located to stop at electroplating ventilating hole (PTH).The PTH technology is a kind of PCB manufacture method, thereby the circuit on one deck can be used electro-plating method, and the through hole by preboring is electrically connected to the circuit on another layer.When using the PTH technology, basal surface or arrays of openings must be aimed at the arrangement of lead-in wire end points part, so that lead-in wire end points part can be held by corresponding through hole on the substrate.
Yet electroplating ventilating hole has limited wiring density (that is, can be arranged in the lip-deep circuit number of flaggy).Therefore electroplating ventilating hole tends to increase provides required wiring necessary flaggy number.Yet, increase the number of plies and increased plate thickness and manufacturing cost.Owing to increased the ground wire number of plies, it has also increased electric capacity.Increase electric capacity and reduced impedance.Therefore, meeting is lower than the assembly impedance so that plate resistance is anti-, and this has produced undesired discontinuous between the anti-and assembly impedance in plate resistance.What wish is the anti-as much as possible coupling of assembly impedance and plate resistance, with the signal reflex of avoiding occurring owing to impedance discontinuity.This reflection has produced unnecessary noise, and it can reduce signal integrity.
Optionally, can (SMT) electric assembly be installed on the circuit board with surface mounting technology (surface mount technology).SMT comprises by each contactor end is electrically connected to and being positioned on the substrate surface on the corresponding SMT pad, and contactor end is electrically connected to substrate surface.The end of contact can comprise conductive weld, and it is welded on the pad usually.On multi-layer sheet, the SMT pad is electrically connected to via hole usually, and via hole extends between the layer of plate, and the line electricity on SMT pad or the layer is connected to the circuit of another layer.
Fig. 1 shows typical SMT connector basal surface, comprises a plurality of SMT pad P and a plurality of via hole V that are arranged in the via arrangement during being arranged in pad arranges.Each via hole V is electrically connected to a corresponding SMT pad P.As shown, SMT pad P and via hole V can arrange in so-called " dog bone shape (dog-bone) " mode.As inserting as shown in the figure, should " dog bone shape " can comprise SMT pad P, via hole V, via pad VP and conductive via circuit VT, conductive via circuit VT is electrically connected via pad and SMT pad.Yet should understand that via hole and SMT pad are not to arrange in this dog bone shape mode.Optionally, the SMT pad can be partly or entirely overlapping with corresponding via pad, thereby so that directly be connected between SMT pad and via pad.This structure is commonly referred to " via hole (via-in-pad) in the pad ".
SMT pad and via hole can be arranged as row and column.As shown in Figure 1, the row along continuous straight runs extends, and E is vertical with panel edges.Row vertically extends, and E is parallel with panel edges.Spacing between the adjacent lines center line can be called line space P RSpacing between the adjacent column center line can be called column pitch P C
SMT pad P and via hole V can be earthing conductor or signal conductor.Signal conductor can be used for single-ended or differential signal transmission.(namely greater than 1GHz) connector is generally signal transmission and uses differential wave pair at a high speed.In differential signal transmission, each signal conductor can match with adjacent signal conductor.Corresponding earthing conductor can be arranged in adjacent signal conductor between.In some connector systems, can comprise earthing conductor, reducing crosstalking between signal conductor, and improve impedance matching.
Pad shown in Figure 1 arrange can with want surface mount assembly onboard in Pin arrangement identical.For example, the SMT pad can be arranged as row and column, as lead terminal partly is arranged as row and column.In addition, the line space P of pad arrangement RWith column pitch P CCan be identical with line space and the column pitch of Pin arrangement.
Similarly, via arrangement can be arranged identical with pad.In other words, for example, via hole V can be arranged as row and column, as SMT pad P is arranged as row and column.In addition, the line space P of via arrangement VRWith column pitch P VCThe line space P that can arrange with pad RWith column pitch P CIdentical.
As mentioned above, can expect to reduce the number of plies of plate, to reduce as possible between connector and plate and the electric discontinuity between the different layers in the plate.A kind of method that realizes this purpose is the wiring density that increases on each layer of plate.Yet, via arrangement is connected to pad arranges the ability that the confinement plate designer improves wiring density that tends to.
For example, in having the typical connector of 2mm column pitch, the width of horizontal wiring passage (that is, the distance between plates between adjacent column) only can comprise a pair of circuit.Width with typical connector of 3mm column pitch can comprise two pairs of circuits.Similarly, in having the typical connector of 1.4mm line space, the width of vertical routing channel (that is, the distance between plates between adjacent lines) only can comprise an independent circuit.Therefore, in order to make signal " vertically " connected connector, the first circuit must be arranged between first pair of row, and the second circuit must be arranged between the different a pair of row.Yet, usually wish as far as possible closely to arrange and the circuit of signal to being associated each other.
Summary of the invention
A kind of method has been described, has been used to for example substrate regulation surface mounting technology (SMT) the connector basal surface such as printed circuit board (PCB).Substrate can be any substrate, and it is suitable for holding and has the electric assembly that end leads part (being the lead terminal part) is arranged.This basal surface can comprise the arrangement of conduction SMT pad.Corresponding SMT pad can partly link to each other with each end leads.The SMT pad can be arranged in the arrangement corresponding with Pin arrangement (being the arrangement of end leads part).Basal surface can also comprise the arrangement of conductive via.Each via hole can be electrically connected to a corresponding SMT pad.Via hole can be arranged in from pad and arrange (and therefore different with Pin arrangement) in the different arrangements.Can with any via hole of arranging in the several different methods of the wiring density that has increased the circuit on the substrate, be limited in simultaneously crosstalking in the signal conductor, and between connector and substrate, provide matched impedance.
Can change via arrangement, that is, via hole can move relative to each other, to obtain the wiring density of expection at one deck of plate.Increase wiring density and can reduce the flaggy number, reduce thus electric capacity and increase impedance.In addition, can be with the mode that can affect impedance and crosstalk ground connection via hole and the signal via of arranging respect to one another.Distance between paired signal conductor can affect the impedance between it.This on relevant earthing conductor between distance also can affect impedance.Can also change via arrangement, with crosstalking of acceptable degree between the acquisition adjacent signal conductor.Therefore, according to the present invention, can change via arrangement, be implemented in wiring density, impedance matching and crosstalk between desirable balance.
The row of adjacent S MT pad can be signal-signal-ground structure.For example, this arrangement is suitable for the application of edge card (edge card).Pad can be couple to be listed as corresponding via hole or the electroplating ventilating hole of arrangement.Yet the adjacent column of via hole or electroplating ventilating hole can be interlocked, thereby so that signal via or the electroplating ventilating hole of the ground connection via hole of row or through hole and adjacent column are adjacent.By this way, for example the staggered horizontal line of SMT pad can isolate the staggered vertical row of via hole or electroplating ventilating hole.
Therefore, circuit board can comprise substrate, be arranged in line a plurality of conductive welding disks on substrate, be arranged in the first ground connection via hole and first signal via hole in the first row, and being arranged in the second ground connection via hole and secondary signal via hole in the secondary series, secondary series and first row are adjacent.Each via hole of the first and second row can be electrically connected in the row in a plurality of pads corresponding one.The first ground connection via hole can be adjacent with the secondary signal via hole.
In the first and second ground connection via holes each can be electroplating ventilating hole.In the first and second signal via each can be electroplating ventilating hole.Described a plurality of pad can be arranged with three pad cell on the signal that repeats, signal, ground.During the first grounding contact and the second grounding contact can be listed as with respect to first and second at least one consists of the first diagonal.During first signal contact and secondary signal contact can be listed as with respect to first and second at least one consists of the second diagonal.The first diagonal can be adjacent with the second diagonal.
The electrical property of SMT connector basal surface (that is, impedance, crosstalk and insertion loss) can be optimized by some parameter that changes basal surface.The example of this type of parameter comprises the relative position of signal and the perforate of ground connection via hole, the size of boring, the size of pad etc.Disclosed is for the variety of option with respect to the via hole perforate of SMT pad location, in order to optimize electrical property.Wiring density also can be optimised, to remove the layer (improve impedance matching and reduce manufacturing cost) among the PCB.Reduce the via hole bore size and increased available wiring channel bandwidth, it can be used for the more or wider circuit of cloth.
SMT connector basal surface can be designed as for any application of using high speed, high density SMT connector (for example, SATA, SAS, DDR, PCI-Express, base plate etc.).In case selected connector, and determined that bore dia and signal/ground structure, a plurality of parameters just keep optimised, so that the basal surface performance reaches best.These parameters comprise via pad size, the anti-pad of via hole (anti-pad) size and dimension and via hole counterfoil (via stub) length.
Description of drawings
Fig. 1 shows has substrate disposed thereon, typical SMT connector basal surface;
Fig. 2 A and 2B have illustrated according to the present invention the modification that can make the basal surface of Fig. 1;
Fig. 3 A and 3B have illustrated according to the present invention the modification that can make the basal surface of Fig. 1;
Fig. 4 A shows the partial view of the example embodiment of prior art SMT connector basal surface;
Fig. 4 B-4D shows the partial view according to the example embodiment of SMT connector basal surface of the present invention, with the distance between the via hole of display column spacing and adjacent lines, and in row and the optimal cases of rotation of the via hole between the row;
Fig. 5 A and 5B show the example of connector basal surface;
Fig. 6 A and 6B show a kind of basal surface, and wherein the via arrangement shown in Fig. 5 A and the 5B is changed in row;
Fig. 7 A and 7B show a kind of basal surface, and the pad that wherein is listed as from different pads is couple to the via hole in identical via hole row;
Fig. 8 A and 8B show the example of connector basal surface;
Fig. 9 A and 9B show a kind of basal surface, and wherein the via arrangement shown in Fig. 8 A and the 8B is changed in row;
Figure 10 A and 10B show a kind of basal surface, and wherein the via arrangement shown in Fig. 8 A and the 8B is changed, so that the via hole column pitch reduces by half;
Figure 11 A and 11B show a kind of basal surface, and the pad that wherein is listed as from different pads is couple to the via hole in the identical via hole row;
Figure 12 A and 12B show a kind of basal surface, its with separation signal to the wiring of double density is provided;
Figure 13 A and 13B show a kind of basal surface, and it provides the wiring of double density, and need not separation signal pair;
Figure 14 A and 14B show a kind of basal surface, and wherein two row pads are couple to a row via hole;
Figure 15 A and 15B show a kind of basal surface, and wherein two row pads are couple to a row via hole, need not separation signal pair;
Figure 16 A and 16B show a kind of basal surface, and it provides 2.5 times of wiring densities;
Figure 17-21 has illustrated the modification example that can make via arrangement according to of the present invention;
Figure 22 A and 22B show a kind of example of basal surface;
Figure 23 A-C shows a kind of basal surface, has the signal pair of the via hole in the different lines of being redirected to;
Figure 24 A and 24B show a kind of basal surface, and it provides the wiring of two double densities;
Figure 25 A and 25B show a kind of basal surface, and it provides 1.5 times of wiring densities;
Figure 26 A and 26B show a kind of basal surface, and it provides 1.5 times of wiring densities;
Figure 27 A and 27B show a kind of basal surface, and it provides crooked wiring;
Figure 28 A and 28B show a kind of basal surface, and it provides the wiring of two double densities;
Figure 28 C shows a kind of basal surface, and it provides 2.5 times of wiring densities;
Figure 29 shows a basal surface example, and wherein pad is arranged with row, and corresponding via hole is arranged with staggered row;
Figure 30 A and 30B have illustrated the various ground connection via hole bore size that are used for the signal conductor via arrangement;
Figure 31 A and 31B have illustrated the various ground connection via hole bore size that are used for another kind of signal conductor via arrangement; And
The curve chart example that Figure 32 A and 32B provide respectively differential impedance and crosstalked for various ground connection via hole bore size.
Embodiment
Fig. 2 A and 2B show the partial view according to the example embodiment of the SMT connector basal surface of one aspect of the invention.Via arrangement shown in Fig. 1 can be revised according to Fig. 2 A and 2B illustrated embodiment, with increase wiring density, matched impedance, and the electrical property of improvement system.
Fig. 2 A shows the first and second earthing conductor via hole G that arrange with linear array (for example column or row) 1And G 2, and the first and second signal conductor via hole S 1And S 2Signal conductor via hole S 1And S 2Can be used for single-ended or differential signal transmission.According to the embodiment shown in Fig. 2 A, at adjacent signal conductor via hole S 1And S 2Between spacing A can be less than at signal conductor via hole S 1With with signal conductor via hole S 1Adjacent earthing conductor via hole G 1Between spacing A 1At adjacent signal conductor via hole S 1And S 2Between spacing A can be less than at signal conductor via hole S 2With with signal conductor via hole S 2Adjacent earthing conductor via hole G 2Between spacing A 2Spacing A 1Can with spacing A 2Identical, also can be different.Can select actual distance A, A 1And A 2With by better impedance matching with crosstalk and reduce to realize the wiring density of expecting and/or optimize signal transmission performance.
Fig. 2 B shows the first and second signal conductor via hole S that arrange with linear array (for example column or row) 1, S 2And single earthing conductor via hole G 3Signal conductor via hole S 1, S 2Can be used for single-ended or differential signal transmission.According to the embodiment shown in Fig. 2 B, at adjacent signal conductor via hole S 1And S 2Between spacing A can be less than at signal conductor via hole S 1With with signal conductor via hole S 1Spacing A between the adjacent earthing conductor via hole G3 3Can select actual distance A and A 3With by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, and optimize simultaneously signal transmission performance.
Fig. 3 A and 3B show the partial view according to the example embodiment of the SMT connector basal surface of one aspect of the invention.Via arrangement shown in Fig. 1 can be made amendment according to Fig. 3 A and 3B illustrated embodiment, to improve wiring density and/or the electrical property of system.
Fig. 3 A shows the first and second earthing conductor via hole G 1And G 2And the first and second signal conductor via hole S 1And S 2Signal conductor via hole S 1And S 2Can be used for single-ended or differential signal transmission.As shown in Figure 3A, signal conductor via hole S 1And S 2Can be interlocked with respect to center line C, wherein via hole is arranged along center line C.In other words, signal conductor via hole S 1Can be with respect to center line C offset distance B on first direction 1, and signal conductor via hole S 2Can be with respect to center line C offset distance B on second direction 2Second direction can be opposite with first direction, and as shown in Figure 3A, perhaps two signal via can be offset with respect to center line C in the same direction.
Side-play amount B1 can with side-play amount B 2Identical or different.As shown, earthing conductor via hole G 1And G 2Can be positioned on the center line C.Like this, signal conductor via hole S 1And S 2Can come in such a way to interlock toward each other: with respect to earthing conductor via hole G 1And G 2Symmetry, earthing conductor via hole G 1And G 2Respectively with signal conductor via hole S 1And S 2Adjacent.Can select actual in B 1And B 2With by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, and optimize simultaneously signal transmission performance.
At adjacent signal conductor via hole S 1And S 2Between space D (C obtains along center line) can be less than at signal conductor via hole S 1With with signal conductor via hole S 1Adjacent earthing conductor via hole G 1Between space D 1Space D can be less than at signal conductor via hole S 2With with signal conductor via hole S 2Adjacent earthing conductor via hole G 2Between space D 2Space D 1Can with space D 2Identical, also can be different.Can select actual distance B, D 1And D 2With by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, and optimize simultaneously signal transmission performance.
Fig. 3 B shows the first and second signal conductor via hole S 1, S 2And single earthing conductor via hole G 3Shown in Fig. 3 B, signal conductor via hole S 1Can be with respect to center line C offset distance B on first direction 1, and signal conductor via hole S 2Can be with respect to center line C offset distance B on second direction 2Second direction can be opposite with first direction, and shown in Fig. 3 B, perhaps two signal via can be offset with respect to center line C in the same direction.Side-play amount B 1Can with side-play amount B 2Identical or different.As shown, earthing conductor via hole G 3Can be positioned on the center line C.
At adjacent signal conductor via hole S 1And S 2Between space D (C obtains along center line) can be less than at signal conductor via hole S 1With with signal conductor via hole S 1Adjacent earthing conductor via hole G 3Between space D 3Can select actual distance B and D 3With by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, and optimize simultaneously signal transmission performance.
Fig. 4 A shows has the fixedly via arrangement of column pitch y.In other words, adjacent column with distance y apart from one another by.Each row comprises a plurality of via holes of arranging with the linear array of ground connection-signal-signal structure.Can be mutually equidistant spaced apart of via hole.In other words, the signal via spacing distance d that each ground connection via hole can be adjacent, and adjacent signal via also can each interval apart from d.As shown, adjacent column can be interlocked toward each other.In other words, one row can with the adjacent column relativity shift apart from e.As shown, offset distance e can identical with distance d (that is a, line space).Yet should be understood that side-play amount can be greater than or less than a line space (that is, offset distance e need not identical with distance d).
Fig. 4 B shows the optimal cases of column pitch distance and the distance between the via hole of adjacent lines.Should be appreciated that method of the present invention can be used for be optimized signal integrity and wiring density, even the two neither one is always best.
By the via arrangement shown in Fig. 4 B is compared with the via arrangement shown in Fig. 4 A, visible signal conductor via hole is along center line move relative to each other (for example, as in above explanation in conjunction with Fig. 2 A and 2B).The nearlyer wiring density that increases between the adjacent lines that provides is provided to get via hole each other.Can select D 1, D 2And D 3Value with the wiring density between optimize row, these values can be same to each other or different to each other.The signal conductor via hole can also be with respect to its separately disalignment (for example, as in above explanation in conjunction with Fig. 3 A and 3B).Can select B 1And B 2Value to realize the expection restriction to crosstalking, these values can be same to each other or different to each other.
Adjacent column can be moved more approachingly together.In other words, can be greater than the distance y between the row center line shown in Fig. 4 A in the distance Y between the row center line shown in Fig. 4 B.This provides the increase of wiring density between adjacent column by widening the wiring channel that is present in via arrangement left side and right side (shown in Fig. 4 B).In other words, the distance, delta shown in Fig. 4 A 1Can be greater than the distance, delta shown in Fig. 4 B 2Can select the value of Y and Y1, and the relative displacement E between adjacent column, with the impedance of balance sysmte, crosstalk and routing density requirements.Shown in Fig. 4 B, for example, two adjacent ground connection via holes, such as the ground connection via hole of around setting-out, the single ground connection via hole (shown in broken lines) that can be positioned at (for example, at intermediate point) between this adjacent ground connection via hole replaces.
Fig. 4 C and 4D show the rotation at Lie Nei and the via hole between it.Shown in Fig. 4 C, each signal conductor via hole can be with respect to its disalignment separately, and the offset direction is opposite with its offset direction in the arrangement shown in Fig. 4 B.Change another kind of mode, compare with the arrangement shown in Fig. 4 B, each signal is to centering on its central point half-twist.Fig. 4 D shows a kind of arrangement, wherein only has some to being rotated with respect to the arrangement shown in Fig. 4 B.The arrangement of ground connection via hole is identical with the arrangement of the ground connection via hole shown in Fig. 4 A and the 4B.
Fig. 5 A and 5B show the example of connector basal surface.Fig. 5 A shows top level structure, comprises via hole V and the pad P of two row dog bone shape structures.As shown, the line space P of via arrangement VRLine space P with the arrangement of SMT pad RIdentical.The column pitch P of via arrangement VCColumn pitch P with the arrangement of SMT pad CIdentical.Relative displacement Q between the via hole adjacent column VCAnd the relative displacement O between SMT pad adjacent column CIdentical.In this basal surface, column pitch P CCan be about 2mm.Therefore, via arrangement is arranged identical with pad.Fig. 5 B shows the arrangement of the via hole V on internal layer, comprises the example alignment of the anti-pad AP of via hole.Shown in Fig. 5 B, a pair of circuit T can connect up along the wiring channel between adjacent column.The anti-pad of via hole will be disposed on the ground plane, with this circuit not on same layer.
Fig. 6 A and 6B show a kind of basal surface, wherein with as above-mentioned in conjunction with the mode in the explanation of Fig. 2 A and 2B, have changed the via arrangement shown in Fig. 5 A and 5B in row.Pad shown in Fig. 6 A is arranged and is arranged identical with the pad shown in Fig. 5 A.The adjacent column of SMT pad is each other with distance O CRelativity shift.Via hole column pitch P VCWith SMT pad column pitch P CIdentical.Yet via arrangement is changed, thereby so that can be greater than the spacing A between signal conductor via hole and adjacent earthing conductor via hole at the spacing A between the adjacent signal conductor via hole 1, A 2Even wiring density does not change, expect that also the arrangement shown in Fig. 6 A and 6B can produce higher impedance, and therefore obtain such as the better impedance matching of arrangement shown in Fig. 5 A and the 5B.In addition, the distance A between adjacent vias can be greater than pad rows spacing P RTherefore, because one or more circuit T VCan as directedly be arranged between the adjacent lines, wiring density can improve.
Fig. 7 A and 7B show a kind of basal surface, wherein, according to an aspect of the present invention, have changed the via arrangement shown in Fig. 5 A and 5B.Pad shown in Fig. 7 A is arranged and is arranged identical with the pad shown in Fig. 5 A.Via hole column pitch P VCWith pad column pitch P CIdentical.Yet basal surface is changed, thereby so that the pad P that is arranged in the different lines is couple to the via hole V that arranges along row.For example, shown in Fig. 7 A, a pair of signal conductor pad P in the first pad row (the pad row for example) 1, P 2Can be connected to first couple of signal conductor via hole V in via hole row (for example, middle via hole row) 1, V 2, be listed as simultaneously a pair of signal conductor pad P in (for example, following pad row) at the second pad 3, P 4Can be connected to second couple of signal conductor via hole V in identical via hole row 3, V 4
Even wiring density does not change, expect that also the arrangement shown in Fig. 7 A and 7B produces lower crosstalking such as the arrangement shown in Fig. 5 A and the 5B.As everyone knows, differential crosstalk be adjacent differential wave between the function of the sum of crosstalking.Also well-known, contrary sign between crosstalk can less than same-sign between crosstalk, other is all identical.In other words, when of adjacent pairs is signal projector pair, and another phase adjacency pair be signal receiver to the time, crosstalking between the phase adjacency pair can be less.According to an aspect of the present invention, can select the phase adjacency pair, with by routing to adjacent vias pair to the pad that is associated with the signal with contrary sign, will crosstalk is reduced to minimum.
Fig. 8 A and 8B show a kind of connector basal surface example.Fig. 8 A shows via hole V and the pad P of two row dog bone shape structures.Fig. 8 B shows the arrangement of the via hole V on internal layer, comprises the example alignment of the anti-pad AP of via hole.As shown, the line space P of via arrangement VRLine space P with the arrangement of SMT pad RIdentical.The column pitch P of via arrangement VCColumn pitch P with the arrangement of SMT pad CIdentical.Alternating quantity O between the via hole adjacent column VCAnd the relative displacement O between the adjacent column of SMT pad CIdentical.Therefore, via arrangement is arranged identical with the SMT pad.Shown in Fig. 8 B, two couples of circuit T can connect up along the wiring channel between adjacent column.In this basal surface, column pitch P CCan be about 3mm.
Fig. 9 A and 9B show a kind of basal surface, wherein, with as above in conjunction with the mode in the explanation of Fig. 2 A and 2B, have changed the via arrangement shown in Fig. 8 A and 8B in row.As shown, the spacing A between the adjacent signal conductor via hole in row can be greater than the spacing A between signal conductor via hole and adjacent earthing conductor via hole 1, A 2Attention can be less than at the anti-pad shown in Fig. 5 B, 6B and the 7B at the anti-pad shown in Fig. 8 B, 9B, 10B and the 11B.Therefore, can be contemplated that the signal integrity that uses basal surface shown in Fig. 9 A and 9B is good not as use signal integrity of basal surface shown in Fig. 6 A and 6B.Yet, a pair of circuit T VCan along shown in each this kind wiring channel connect up.As mentioned above, increase wiring density and can increase impedance by the number of plies that reduces plate.Therefore, the basal surface shown in Fig. 9 A and the 9B provides trading off between signal integrity and impedance matching.
Figure 10 A and 10B show a kind of basal surface, and wherein the via arrangement shown in Fig. 9 A and 9B is further changed so that the via hole column pitch is reduced by half.In other words, at the via hole column pitch P shown in Figure 10 A and the 10B VCBe about the via hole column pitch P shown in Fig. 9 A and the 9B VCHalf (therefore, be about SMT pad column pitch P CHalf).Therefore, the width of the wiring channel between the adjacent vias row also is halved.Yet, because double row are arranged, thus double wiring channel is arranged, therefore on wiring density, do not reduce.Yet, by with via arrangement four row in, rather than two row in, signal via is far apart each other, this helps to improve signal integrity.
Figure 11 A and 11B show a kind of basal surface, wherein with as above-mentioned in conjunction with the mode in the explanation of Fig. 2 A and 2B, have changed the via arrangement shown in Fig. 8 A and 8B, thereby so that the pad that is arranged in the different lines is couple to the via hole of arranging along single via hole row.Figure 11 A arranges with the pad shown in the 11B and arranges identical with the pad shown in Fig. 8 A and the 8B.Via hole column pitch P shown in Figure 11 A and the 11B VCWith the via hole column pitch P shown in Fig. 8 A and the 8B VCIdentical.
Yet shown in Figure 11 A, the spacing A between the adjacent signal conductor via hole in row can be greater than the spacing A between signal conductor via hole and adjacent earthing conductor via hole 1, A 2In addition, a pair of signal conductor SMT pad P in the first pad row (the pad row above for example shown in Figure 11 A) at via hole row (for example can be connected to, middle via hole row) first couple of signal conductor via hole V in, a pair of signal conductor SMT pad P in the second pad row (the pad row for example) can be connected to second couple of signal conductor via hole V in these via hole row simultaneously.As described above with reference to Fig 7A and 7B, even wiring density does not change, can expect that also the arrangement shown in Figure 11 A and the 11B can produce than lower the crosstalking of arrangement shown in Fig. 8 A and the 8B.Notice that in the basal surface shown in Figure 11 A and the 11B, the wiring channel between being expert at provides relatively straight circuit T V, rather than the circuit of the bending shown in Fig. 9 A and the 9B.
Figure 12 A and 12B show a kind of basal surface, wherein, have changed the via arrangement shown in Fig. 8 A and 8B, so that the wiring of double density to be provided between adjacent lines, keep simultaneously the wiring (for example, four pairs rather than two pairs) of double density between adjacent column.Although four row pads have been shown among Figure 12 A, the pad shown in Figure 12 A is arranged and is arranged identical with the pad shown in Fig. 8 A.Visible as being perfectly clear in Figure 12 B, signal is to being separated.For example, signal conductor 1 and 3 can consist of first pair, and synchronous signal conductor 2 and 4 consists of second pair.In other words, via hole can be arranged as so that adjacent signal conductor via hole and different differential wave to being associated.For example, can as directedly arrange via hole, thereby so that via hole 2 between via hole 1 and 3.Like this, the differential wave that is made of signal conductor via hole 1 and 3 is to can " being separated ".Should be understood that being increased in the distance that consists of between the right conductor has increased impedance.
In addition, as mentioned above, the adjacent vias distance that can be separated from each other, this is apart from allowing in the wiring that consists of the circuit between the right via hole.As shown, two pairs of circuits can be routed in and consist of between the right via hole.This arrangement also allows two ground pads, for example AP 1And AP 2Be couple to same ground connection via hole G.Therefore, can delete a plurality of ground connection via holes.
Can change via arrangement to obtain the differential crosstalk of acceptable degree.As everyone knows, the differential crosstalk in row is the function of the single sum of crosstalking.For example, in arranging shown in Figure 12 B from several the 3rd row, can by will signal conductor 1 and 2,2 and 3,3 and 4, and the single phase Calais of crosstalking between 1 and 4 calculate differential crosstalk.Via arrangement can be changed, and for example via hole can relative to each other move around, until whole single sums of crosstalking is near 0 (or being lower than at least acceptable degree).
Figure 13 A and 13B show another kind of basal surface, and it provides the wiring of double density, and need not separation signal pair.Pad shown in Figure 13 A is arranged and is arranged identical with the pad shown in Figure 12 A.Figure 13 A and 13B explanation also can be used between the row such as the principle that equally is used in the row in conjunction with the description of arranging shown in Figure 12 A and the 12B.In other words, via hole can move around toward each other, until differential crosstalk is lower than acceptable degree.
Shown in Figure 13 B, adjacent signals is separated from each other 3,4 and 5,6, but signal is to by separately (in other words, each signal conductor and adjacent with a pair of another signal conductor of its formation).Therefore, adjacent vias is to being separated from each other a distance, and this distance allows to connect up betwixt.As shown, the four pairs of circuits can be routed in via hole between 3,4 and 5,6.
Can by the summation of crosstalking single between the signal conductor is calculated between differential crosstalk.For example, can by in signal conductor 1 and 3,2 and 3,2 and 4, and the single summation of crosstalking between 1 and 4, calculate the differential crosstalk between to 1,2 and 3,4.Via hole can move around, until differential crosstalk is lower than acceptable degree.
Figure 14 A and 14B show a kind of basal surface, and wherein two row pads are couple to a row via hole.As shown, via hole column pitch P VCCan be solder pad space length P CTwice.Therefore, in the internal layer of plate, the wiring channel between the adjacent vias row can be that twice is wide, although the quantity of this wiring channel may only have half.As shown, four to can being routed in the passage, rather than two of wirings are right in each of two passages.Via hole line space P VRCan be pad rows spacing P RHalf.Yet signal is to being separated, to improve signal integrity.In other words, the adjacent signal conductor via hole in via hole row can belong to unlike signal pair.For example, signal conductor via hole 1 and 3 can consist of first pair, and signal conductor via hole 2 and 4 can consist of second pair.As shown, two signals are to can be disposed adjacent one another, and need not to insert betwixt ground connection.Because two ground pads can be couple to a ground connection via hole, therefore can delete a plurality of ground connection via holes.
Figure 15 A and 15B show a kind of basal surface, and wherein two row pads are couple to a row via hole, and need not separation signal pair.As shown, via hole column pitch P VCCan be pad column pitch P CTwice.Like this, the wiring channel between the adjacent vias row can be that twice is wide, although this wiring channel quantity may only have half.As shown, four to can being routed in the passage, rather than two of wirings are right in each of two passages.Because two ground pads can be couple to a ground connection via hole, therefore can delete a plurality of ground connection via holes.Via hole line space P VRCan be pad rows spacing P RTwice.Signal is to can be along line interlacing.In other words, adjacent signal conductor can belong to a pair of that (for example, via hole 1 and 2 can consist of first pair; Via hole 3 and 4 can consist of second pair), and two signals can be disposed adjacent one another to (for example, 1,2 and 3,4), and need not to insert betwixt ground connection.
Figure 16 A and 16B show a kind of basal surface, and it provides 2.5 times of wiring densities.Although do not show separation signal pair at the basal surface shown in Figure 16 A and the 16B, should understand signal to can be separated.Notice that the wiring channel shown in Figure 16 B is identical with the wiring channel shown in Figure 15 B.Yet the basal surface shown in Figure 16 B is that with the basal surface difference shown in Figure 15 B the circuit shown in Figure 16 B can be narrower than the circuit shown in Figure 15 B.
Use narrower circuit to increase wiring density in the wiring channel of given width.Wider circuit is favourable, reduces because insertion loss increases with line width.Circuit can have the width in about 100-300 mu m range, preferably in the scope of about 100-200 μ m.
In the example shown in Figure 16 B, five pairs of circuits can be routed between the adjacent vias row.In the conductor examples with four row, wherein each shows five signals pair, and increasing by 25% (that is, per four have a pair of extra wiring route) meaning person at wiring density only needs two flaggies, rather than three.As mentioned above, reduce flaggy quantity and help to reduce capacitance, thereby increase impedance.Reduce the needs that flaggy quantity can also reduce or eliminate the back drill of via hole.
According to the present invention, can revise according to the embodiment shown in Figure 17-21 in any via arrangement shown in Figure 14 B, 15B and the 16B, with wiring density and the electrical property that improves connector/substrate system.
Figure 17 shows a kind of partial view of connector basal surface, and it comprises first couple of signal conductor via hole S 1And S 2, and second couple of signal conductor via hole S 3And S 4Via hole S 1And S 2Can consist of the first differential wave pair, signal conductor via hole S 3And S 4Can consist of the second differential wave pair.As shown, via hole can be arranged in the linear array.
At signal conductor via hole S 1And S 2Between spacing E 1And at signal conductor via hole S 3And S 4Between spacing E 3Each can be less than at signal conductor via hole S 2And S 3Between spacing E 2Same, at signal conductor via hole S 1With earthing conductor via hole G 1Between spacing E, and at signal conductor via hole S 4With earthing conductor G 2Between spacing E 4Can be less than spacing E 2Usually, spacing E, E 1, E 3And E 4Can be same to each other or different to each other.Can select actual range E, E 1, E 2, E 3And E 4, with by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, optimize simultaneously signal transmission performance.
Figure 18 shows the partial view of a kind of optional embodiment of connector basal surface, and it comprises two earthing conductor via hole G 1And G 2, and four signal conductor via hole S 1, S 2, S 3And S 4As shown in figure 18, signal conductor via hole S 1, S 2, S 3And S 4Can be staggered toward each other along center line C, via hole is arranged along center line.In other words, for example, signal conductor via hole S 1And S 3Can be with respect to center line C offset distance B on first direction 1, signal conductor via hole S 2And S 4Can go up in the opposite direction with respect to center line C offset distance B with first party 2Side-play amount B 1Can with side-play amount B 2Identical or different.As shown, earthing conductor via hole G 1And G 2Can be positioned on the center line C.Therefore, signal conductor via hole S 1, S 2, S 3And S 4Can be come in such a way to interlock toward each other: make its with respect to respectively with signal conductor via hole S 1And S 4Adjacent earthing conductor via hole G 1And G 2Symmetrical.Can select actual range B 1And B 2, with by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, optimize simultaneously signal transmission performance.
Usually, spacing F, F 1, F 2, F 3And F 4Can be same to each other or different to each other.Can select actual pitch F, F 1, F 2, F 3And F 4With by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, optimize simultaneously signal transmission performance.Also desired distance F, F 1, F 2, F 3And F 4Sum can be less than shown in Figure 17 apart from E, E 1, E 2, E 3And E 4Sum is to realize identical electrical property for identical connector Pin arrangement.
Figure 19 shows a kind of partial view of example embodiment of connector basal surface, and it comprises two earthing conductor via hole G 1And G 2, and four signal conductor via hole S 1, S 2, S 3And S 4As shown in figure 19, signal conductor via hole S 1, S 2, S 3And S 4Can be staggered toward each other along center line C, via hole is arranged along center line.In other words, for example, signal conductor via hole S 1And S 3Can be with respect to center line C offset distance B on first direction 1, signal conductor via hole S 2And S 4Can go up in the opposite direction with respect to center line C offset distance B with first party 2Side-play amount B 1Can with side-play amount B 2Identical or different.
Earthing conductor via hole G 1And G 2Also can be offset with respect to center line C.Earthing conductor G 1Can be with respect to center line C offset distance B 3, and can with signal conductor via hole S 2And S 4The offset direction is identical.Earthing conductor G 2Can be with respect to center line C offset distance B 4, and can with signal conductor via hole S 1And S 3The offset direction is identical.Usually, bias B 1, B 2, B 3And B 4Can be same to each other or different to each other.As shown, via hole can be come to interlock toward each other in such a way: make it symmetrical with respect to center line C.Can select actual range B 1, B 2, B 3And B 4, with by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, optimize simultaneously signal transmission performance.
Usually, spacing H, H 1, H 2, H 3And H 4Can be same to each other or different to each other.Can select actual range H, H 1, H 2, H 3And H 4, with by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, optimize simultaneously signal transmission performance.Also desired distance H, H 1, H 2, H 3And H 4Sum can be less than shown in Figure 19 apart from F, F 1, F 2, F 3And F 4Sum is to realize identical electrical property for identical connector Pin arrangement.
Figure 20 shows a kind of partial view of connector basal surface, comprises a plurality of pad P, and it is arranged as corresponding with the arrangement of the end portion (not shown) that will be gone between by the electric connector that substrate holds.Substrate can also comprise a plurality of via hole V that are arranged in two pairs of column units.As shown, each column unit can comprise two couples of signal conductor via hole S, and two earthing conductor via hole G.Each via hole V is electrically connected to pad P separately.Via hole V can be with respect to via hole row center line C skew, such as the explanation in conjunction with Figure 19.
As shown in figure 20, with row in adjacent vias or between spacing compare, the spacing between the adjacent column unit can be larger.Therefore, owing to it allows extra circuit T VBe arranged between the adjacent column unit, therefore connector basal surface shown in Figure 20 can improve wiring density.
Figure 21 illustrates a kind of partial view of example embodiment of connector basal surface, and it comprises two earthing conductor via hole G 1And G 2, and four signal conductor via hole S 1, S 2, S 3And S 4As shown in figure 21, signal conductor via hole S 1, S 2, S 3And S 4Can be staggered with respect to center line C, via hole is arranged along center line C.In other words, signal conductor via hole S for example 1And S 2Can be with respect to center line C offset distance B on first direction 1, signal conductor via hole S 3And S 4Can go up in the opposite direction with respect to center line C offset distance B with first party 2Side-play amount B 1Can with side-play amount B 2Identical or different.As shown, earthing conductor via hole G 1, G 2Can be positioned on the center line C.Therefore, signal conductor via hole S 1, S 2, S 3And S 4Can be come in such a way to be offset toward each other: make it symmetrical with respect to the earthing conductor via hole.
Usually, spacing I, I 1, I 3And I 4Can be same to each other or different to each other.At signal conductor S 1With earthing conductor G 2Between spacing I 4Can be greater than arbitrary spacing I, I 1, I 2And I 3Can select actual range I, I 1, I 2, I 3And I 4, with by better impedance matching with crosstalk and reduce to realize the wiring density of expecting, optimize simultaneously signal transmission performance.
Figure 22 A and 22B show the basal surface of typical prior art, and wherein, via arrangement is arranged identical with pad.In other words, for example via hole V can be arranged as row and column, as SMT pad P being arranged as row and column.In addition, the line space P of via arrangement VRWith column pitch P VCThe line space P that can arrange with pad RWith column pitch P CIdentical.As shown, the adjacent vias row are not interlocked toward each other.
Figure 23 A and 23B show the basal surface shown in Figure 22 A and 22B, but by signal specific is revised redirecting to different via holes.Shown in Figure 23 B, what wiring can be with shown in Figure 22 B is identical, but circuit can send different signals.In the basal surface shown in Figure 23 C, can make circuit enough narrow, so that two pairs of circuits can connect up in the wiring channel between adjacent column, rather than only having shown in Figure 22 B and 23B is a pair of.
Figure 24 A and 24B show a basal surface, and it provides the wiring of double density, and wherein adjacent signals is to being split in the different via hole row.As shown, the via hole row can be the twices of pad row.Via hole line space P VRCan with pad rows spacing P RIdentical, via hole column pitch P VCCan be pad column pitch P CHalf.Therefore, although the wiring channel between the adjacent vias row can only have a half-breadth, this wiring channel of twice quantity can be arranged.Therefore, a pair of circuit T that can in every passage, connect up, rather than quantitatively be interior the wiring two pairs of every passage of half.Therefore, wiring density does not change.Yet, with these to separating to such an extent that fartherly help to improve signal integrity.Optionally, this structure can be regarded as being offset with respect to adjacent lines one or more via holes are capable.Shown in Figure 24 B, for example left several the 4th via hole is capable has been offset pad column pitch P from left several the third lines CHalf.
Figure 25 A and 25B show a kind of basal surface, and it provides 1.5 times wiring density.As shown, the first via hole row (for example, uppermost via hole row shown in Figure 25 B) can separate the first via hole column pitch P with the second via hole row (for example, from upper several second via hole row) V1The direction that the second via hole row can extend along row with respect to the first via hole line skew apart from O VThe second via hole row can separate the second via hole column pitch P with the 3rd via hole row (for example, from upper several the 3rd via hole row) V2, it is greater than the first via hole column pitch P V1Like this, can between the first via hole row and the second via hole row, (have column pitch P by the wiring channel of formation article one relative narrower V1), and can between the second via hole row and the 3rd via hole row, (have column pitch P by the relatively wide wiring channel of formation second V2).Can be along the first wiring channel a pair of circuit T that connects up.Can be along two couples of circuit T of the second wiring channel wiring.Like this, this arrangement provides two adjacent wiring channels, and it combines for three pairs of circuits provides wiring space.
Figure 26 A and 26B show a kind of basal surface, and it provides 1.5 times wiring density.As shown, the first via hole row (for example, uppermost via hole row shown in Figure 26 B) can separate the first via hole column pitch P with the second via hole row (for example, from upper several second via hole row) V1The second via hole row can be with respect to the first via hole line skew apart from O VThe second via hole row can separate the second via hole column pitch P with the 3rd via hole row (for example, from upper several the 3rd via hole row) V2, it is greater than the first via hole column pitch P V1Like this, shown in Figure 26 B, can between the second and the 3rd via hole row, form wiring channel, the wiring of the enough three pairs of circuits of its width.Therefore, replace can both connect up two wiring channels of a pair of circuit of each bar, this arrangement provides single wiring channel, its three pairs of circuits that can connect up.
Figure 27 A and 27B show a kind of basal surface, and it provides crooked wiring.As shown, the first via hole row (for example, uppermost via hole row shown in Figure 27 B) can separate the first via hole column pitch P with the second via hole row (for example, from upper several second via hole row) V1The first via hole capable (for example, the leftmost via hole shown in Figure 27 B is capable) can capable with respect to the second via hole (for example, capable from left several second via hole) distance of skew, as shown, this distance can with via hole column pitch P V1Identical.The second via hole row can separate the second via hole column pitch P with the 3rd via hole row (for example, from upper several the 3rd via hole row) V2, it is greater than the first via hole column pitch P V1Adjacent lines can be interlocked.In other words, the first row can be with respect to adjacent lines offset distance O.As shown, each the third line is offset.Like this, shown in Figure 27 B, can between the second and the 3rd via hole row, form crooked wiring channel.Can arrange along the wiring channel of bending the circuit T of one or more bending.
Figure 28 A and 28B show a kind of basal surface, and it provides the wiring of double density.As shown, (for example be listed as with formation the first pad, uppermost pad row shown in Figure 28 A) the via hole V that SMT pad P is associated, and the second pad row adjacent with the first pad row with formation (for example, from upper several second pad row) the via hole V that is associated of pad P can be arranged in the single via hole row, it can be arranged between the first and second pads row.Therefore, there is not via hole need to be arranged between the second pad row and the 3rd pad row adjacent with the second pad row.
As shown, the pad row can distance of separation P CPad rows can distance of separation P RThe via hole row can distance of separation P VC, it can be approximated to be pad column pitch P CTwice.Via hole is capable can distance of separation P VR, it can be approximated to be pad rows spacing P RHalf.Therefore, shown in Figure 28 B, can between the second and the 3rd via hole row, form wiring channel, the wiring of the enough four pairs of circuits of its width.Therefore, substitute can connect up two wiring channels of a pair of circuit of each bar, the single wiring channel of the four pairs of circuits that can connect up can be provided.
Shown in Figure 28 B, notice every two pairs of signal conductor via holes and can delete a ground connection via hole.Like this, this arrangement provides (comprising an earthing conductor via hole and two pairs of adjacent signal conductor via holes in this each through-hole unit) between adjacent vias unit wiring channel.As shown, the adjacent vias unit can distance of separation P VR2, it can be about via hole line space P VRTwice.
Shown in Figure 28 C, can be so that circuit T be enough narrow, so that five couples of circuit T of wiring in can the wiring channel between the adjacent vias row, rather than shown in Figure 28 B, only have four pairs.Like this, can realize 2.5 times wiring density.
Figure 29 A and 29B show the example of connector basal surface, wherein, and pad P S, P GBe arranged as a plurality of row, via hole V S, V GBe couple to pad P S, P G, and be arranged as a plurality of row.Show two row pad P S, P G, each provisional capital is signal-signal-ground structure.Hatched circle represents ground pad P G, the circle of perforate represents signal pad P SThe signal pad P of delegation SCan with the signal pad P of adjacent lines SAlignment (that is, in same column), but for example also can be offset a position displacement.Equally, the ground pad P of delegation GCan with another row ground pad P GAlignment.Like this, the signal of delegation and ground pad P S, P GCan be respectively and signal and the ground pad P of another row S, P GVertical alignment.
Each pad P S, P GCan be couple to corresponding via hole V by circuit T S, V GVia hole V S, V GCan vertical arrangement, namely be arranged in row.Via hole V S, V GCan be located at two row pad P S, P GBetween interior zone IA in and/or can be arranged in perimeter OA, perimeter OA is in a side relative with the interior zone IA zone adjacent with delegation.Via hole row can stride across this two pad rows and extend, and comprise the via hole that is associated with pad in this two row.Preferably be arranged as a plurality of row side by side, normally parallel with the via hole that pad is associated.The via hole V of each row S, V GIt can be signal-signal-ground structure.Draw hatched via hole and represent ground connection via hole V G, do not have the via hole of hatching to represent signal via V SVia hole V S, V GAdjacent column can interlock so that one row in each ground connection via hole V GAll with adjacent column in signal via V SAdjacent.Like this, each row via hole V S, V GCan be signal-signal-ground structure, but ground connection via hole V GCan be with respect to the ground connection via hole V in the adjacent column GStaggered.Therefore circuit T can connect up in such a way: the ground connection via hole V that will interlock in will being listed as GBe couple to ground pad P not staggered in the row GThe line construction of Figure 29 can be by the not staggered pad P of two row S, P GProduce the staggered via hole V of four row S, V GThis has caused the increase of wiring space between the via hole vertical row.Be appreciated that also and can for single-ended signal transmission designs embodiments of the invention, can correspondingly adjust the arrangement of pad and via hole.
The via structure that it should be noted that Figure 29 has shown the via hole V that is interlocking striding across four row S, V GDiagonal on linearly aligned ground connection via hole V GArrangement.This diagonal is arranged and is represented with dotted line g.At ground connection via hole V GEach diagonal linear array between can be signal via V SDiagonal capable.Signal via V SDiagonal arrange and to represent with dotted line s1 and s2.However, it should be understood that to design to replace and arrange, ground connection via hole V is provided GWith respect to interlocking of adjacent vias row.
Via hole V SAnd V GBeing shown linear array in Figure 29 is a plurality of row, and signal via and ground connection via hole consist of each signal-signal-ground unit, and it is along column direction spaced at equal intervals each other.Yet, for line layout and the electrical characteristics that hope obtains, can arrange according to previous embodiment interval and the relative position of via hole.For example, the relative spacing between the via hole can be as shown in Fig. 2 B, in the distance between the signal via less than the distance between ground connection via hole and next adjacent signals via hole.Similarly, via hole can arranging shown in Fig. 3 B or 4B, and signal via is with respect to row center line lateral shift.
In optional embodiment, pad P S, P GCan couple mutually with the electroplating ventilating hole row, at this, electroplating ventilating hole has and via hole V S, V GThe cross structure of structural similarity.Optionally, signal pad P SCan be couple to signal via V S, ground pad P GCan be couple to the ground connection electroplating ventilating hole, and vice versa.
Figure 29 B shows a kind of like this pad and arranges, and for example it can be suitable for the application of SMT edge card.In the embodiment shown, be suitable for differential edge card connector on the arrangement theory of pad.Two connector ends that transmit differential wave can terminate to adjacent pad P S, these pads are to passing through ground pad P GWith adjacent pad to separating.
Figure 30 A shows two couples of signal conductor via hole S, these between arranged ground connection via hole G SThese are to being differential wave pair.Via hole is arranged as linear array along center line C.Each via hole perforate can be approximately uniform size.Figure 31 B shows two couples of signal conductor via hole S, these between arranged relatively large ground connection via hole G LShown in Figure 30 B, the perforate of ground connection via hole can be greater than any signal via perforate.
Figure 31 A shows two couples of signal conductor via hole S, these between arranged ground connection via hole G SThese are to being differential wave pair.Via arrangement is two adjacent column, and with distance P VCSeparate.These row are each other with distance O VRelativity shift.Shown in Figure 31 A, each via hole perforate can be approximately uniform size.Figure 31 B shows two couples of signal conductor via hole S, these between arranged relatively large ground connection via hole G LShown in Figure 31 B, the perforate of ground connection via hole can be greater than any signal via perforate.
The perforate of ground connection via hole is larger, and crosstalking between the signal conductor via hole is just less.Figure 32 A and 32B provide respectively differential impedance and the curve chart example of crosstalking for various ground connection via hole bore size.Data be for the signal via perforate with about 0.5mm diameter, and about 0.5,0.9 and the basal surface of the ground connection via hole perforate of 1.3mm diameter collect.By Figure 32 A as seen, differential impedance (that is, consist of differential wave on signal via between impedance) impact that not changed by ground connection via hole bore size.Can be by Figure 32 B as seen, along with the increase of ground connection via hole opening diameter, crosstalk performance is significantly improved.
Several embodiment of the basal surface definition that is used for SMT base plate and edge card application like this, have just been described.Should be understood that previous embodiment only for the purpose of explaining provides, is interpreted as restriction of the present invention anything but.For example, although described previous exemplary embodiment in conjunction with comprising the via arrangement of earthing conductor via hole and signal conductor via hole, can anticipate, according to principle of the present invention, the arrangement that can be fit to for the connector design that only has signal contact.Similarly, although right via arrangement has been described previous exemplary embodiment in conjunction with comprising differential wave, but can anticipate, according to principle of the present invention, can be for only having the connector of single-ended signal conductor, and the arrangement that the connector design with the single-ended signal conductor combination is fit to for having differential wave.In addition, it will be appreciated that and to use separately above-mentioned concept, perhaps with above-mentioned arbitrarily another concept is combined uses.

Claims (2)

1. electric connector comprises:
The connector basal surface, described connector basal surface comprises a plurality of end points parts of a plurality of contacts, a plurality of end points parts of described a plurality of contacts are arranged with the matrix of row and column, described a plurality of end points part is admitted by substrate, described substrate comprises two earthing conductor via holes and four signal conductor via holes, and described four signal conductor via holes are staggered toward each other along center line (C).
2. electric connector as claimed in claim 1, wherein said four signal conductor via holes are symmetrical with respect to described two earthing conductor via holes.
CN2009102040712A 2004-11-29 2005-11-28 Improved matched-impedance surface-mount technology footprints Expired - Fee Related CN101673887B (en)

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EP1839466A2 (en) 2007-10-03
CN101112135B (en) 2010-12-29
CN101674707A (en) 2010-03-17
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CN101673885A (en) 2010-03-17
CN101112135A (en) 2008-01-23
WO2006056473A3 (en) 2006-09-08
WO2006056473A2 (en) 2006-06-01
CN101673887A (en) 2010-03-17
CN101673886A (en) 2010-03-17
CN101674707B (en) 2012-02-22

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