CN117440595A - Differential arrangement structure and printed circuit board - Google Patents

Differential arrangement structure and printed circuit board Download PDF

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Publication number
CN117440595A
CN117440595A CN202211186724.0A CN202211186724A CN117440595A CN 117440595 A CN117440595 A CN 117440595A CN 202211186724 A CN202211186724 A CN 202211186724A CN 117440595 A CN117440595 A CN 117440595A
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CN
China
Prior art keywords
differential
unit
differential via
units
arrangement structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211186724.0A
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Chinese (zh)
Inventor
康昕
李金龙
魏仲民
任晓瀛
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Zte Intelligent Technology Nanjing Co ltd
Original Assignee
Zte Intelligent Technology Nanjing Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zte Intelligent Technology Nanjing Co ltd filed Critical Zte Intelligent Technology Nanjing Co ltd
Priority to CN202211186724.0A priority Critical patent/CN117440595A/en
Priority to PCT/CN2023/092227 priority patent/WO2024066356A1/en
Publication of CN117440595A publication Critical patent/CN117440595A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0215Grounding of printed circuits by connection to external grounding means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0228Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The application discloses a differential arrangement structure and a printed circuit board, wherein the differential arrangement structure comprises one or more differential units, the differential units at least comprise a first differential via hole unit and a second differential via hole unit, and the first differential via hole unit and the second differential via hole unit comprise two differential via holes; the differential unit satisfies the following relationship: d, d 1 ≤d≤d 2 The method comprises the steps of carrying out a first treatment on the surface of the Wherein d 1 Distance d of two differential via holes of the first differential via hole unit 2 And d is the distance between the first differential via unit and the second differential via unit. The method and the device are used for reducing electromagnetic coupling of the differential via units, reducing influence of crosstalk and improving system allowance.

Description

Differential arrangement structure and printed circuit board
Technical Field
The application relates to the field of signal transmission, in particular to a differential arrangement structure and a printed circuit board.
Background
With the development of communication technology, the integration level of communication equipment is significantly improved, the signal transmission rate of the communication equipment is also faster and faster, products with the signal transmission rate of 112Gbps are commercialized, and products with the signal transmission rate of 224Gbps are also under development. In system integration (System Integration, abbreviated as SI), differential signal interconnection of components such as high-speed connectors, ball Grid Array (BGA) is often implemented through differential via units on a printed circuit board (Printed Circuit Board, PCB), and the integrity of differential signals transmitted by the differential via units is most affected by crosstalk. The conventional arrangement mode of the differential via units cannot effectively reduce crosstalk generated by high-speed signal transmission, cannot ensure the integrity of differential signals, and limits the further improvement of system margin.
Disclosure of Invention
The main purpose of the embodiment of the application is to provide a differential arrangement structure and a printed circuit board, which are used for reducing crosstalk generated in a signal transmission process of a differential via unit, improving the integrity of differential signals and improving the margin of a system.
To achieve at least the above object, an embodiment of the present application provides a differential arrangement structure, including: the device comprises one or more differential units, at least one first differential via unit and one second differential via unit, wherein the first differential via unit and the second differential via unit comprise two differential vias; the differential unit satisfies the following relationship:
d 1 ≤d≤d 2
wherein d 1 Distance d of two differential via holes of the first differential via hole unit 2 And d is the distance between the first differential via unit and the second differential via unit.
To at least achieve the above object, embodiments of the present application further provide a printed circuit board, which includes the differential arrangement structure as provided in any one of the embodiments of the present application.
The application provides a differential arrangement structure, this differential arrangement structure includes: the device comprises one or more differential units, at least one first differential via unit and one second differential via unit, wherein the first differential via unit and the second differential via unit comprise two differential vias; the differential unit satisfiesThe following relationship: d, d 1 ≤d≤d 2 The method comprises the steps of carrying out a first treatment on the surface of the Wherein d 1 Distance d of two differential via holes of the first differential via hole unit 2 And d is the distance between the first differential via unit and the second differential via unit. In the technical scheme of the application, the distance of the differential via hole units in the differential unit is in the preset range interval, so that the mutual inductance between the first differential via hole unit and the second differential via hole unit can be reduced, the electromagnetic coupling of the differential via hole units is further reduced, the influence of crosstalk is reduced, and the system margin is improved.
Drawings
Fig. 1 is a schematic structural diagram of a differential arrangement structure provided in an embodiment of the present application;
fig. 1a is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 1b is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a conventional differential configuration according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a cross-talk comparison result provided in an embodiment of the present application;
FIG. 4 is a schematic diagram of a cross-talk sum comparison result provided in an embodiment of the present application;
fig. 5 is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 10 is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 11 is a schematic structural diagram of a differential arrangement structure provided in an embodiment of the present application;
fig. 12 is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application;
fig. 13 is a schematic structural diagram of a differential arrangement structure according to an embodiment of the present application.
Reference numerals illustrate: 100. a differential arrangement structure; 10. a differential unit; 11. a first differential via unit; 111. a first differential via; 112. a second differential via; 12. a second differential via unit; 121. a third differential via; 122. a fourth differential via; 20. a ground hole; 30. and an isolation unit.
Detailed Description
In order to enable those skilled in the art to better understand the technical solutions of the present application, the following describes in detail the heat dissipation device and the base station apparatus provided in the present application with reference to the accompanying drawings.
Example embodiments will be described more fully hereinafter with reference to the accompanying drawings, but may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
In the absence of conflict, embodiments and features of embodiments herein may be combined with one another.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and this application and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
As shown in fig. 1, the present application provides a differential arrangement structure 100, where the differential arrangement structure 100 includes at least one differential unit 10, the differential unit 10 includes a first differential via unit 11 and a second differential via unit 12, each of the first differential via unit 11 and the second differential via unit 12 includes two differential vias, specifically, the first differential via unit 11 includes a first differential via 111 and a second differential via 112, and the second differential via unit 12 includes a third differential via 121 and a fourth differential via 122.
The differential unit 10 also satisfies the following relationship:
d 1 ≤d≤d 2
wherein d 1 D is the distance between the first differential via 111 and the second differential via 112 2 D is the distance between the first differential via unit 11 and the second differential via unit 12, which is the distance between the third differential via 121 and the fourth differential via 122.
Exemplary, d 1 The center-to-center spacing between the first differential via 111 and the second differential via 112 is specifically shown in fig. 1. d, d 1 The distance between other reference points at the same position on the first differential via 111 and the second differential via 112, for example, the distance between leftmost reference points of the first differential via 111 and the second differential via 112, as shown in fig. 1 a; or, the distance between the rightmost reference points of the first differential via 111 and the second differential via 112, as shown in fig. 1b, is not limited herein.
Exemplary, correspond to d 2 D is the center-to-center distance of the third differential via 121 and the fourth differential via 122 2 Other on the third differential via 121 and the fourth differential via 122 are also possibleFor example, the distance of the leftmost reference point of the third differential via 121 and the fourth differential via 122, or the distance of the rightmost reference point of the third differential via 121 and the fourth differential via 122, is not limited herein.
Illustratively, d is the center-to-center spacing of the first differential via unit 11 and the second differential via unit 12, as shown in fig. 1; d may also be the distances of other reference points at the same positions on the first differential via unit 11 and the second differential via unit 12, for example, the distances of leftmost reference points of the first differential via 111 and the third differential via unit 121, as shown in fig. 1 a; or, the distance between the rightmost reference points of the first differential via 111 and the third differential via 121, as shown in fig. 1b, is not limited herein.
As shown in fig. 1, the differential arrangement 100 is configured by the mutual inductance between the first differential via unit 11 and the second differential via unit 12The change in crosstalk can be analyzed qualitatively. Calculating the mutual inductance between the first differential via unit 11 and the second differential via unit 12>The formula of (2) is:
wherein M is ji Represents the mutual inductance between two differential vias, where i=1 or i=2, j=3 or j=4, m 31 M is the mutual inductance between the third differential via 121 and the first differential via 111 32 M is the mutual inductance between the third differential via 121 and the second differential via 112 41 M is the mutual inductance between the fourth differential via 122 and the first differential via 111 42 Is the mutual inductance between the fourth differential via 122 and the second differential via 112. Compared with the conventional differential arrangement structure shown in fig. 2, M 31 Reduction, M 32 Increase, M 41 Reduction, M 42 Reduced, wherein M is due to the differential arrangement 100 provided by the embodiment of the application 32 An increased amplitude greater than M 41 The reduced amplitude, therefore, the arrangement 100 as shown in fig. 1 is capable of effectively reducing the mutual inductance between the first differential via unit 11 and the second differential via unit 12And further, the electromagnetic coupling of the differential via units is reduced, the influence of crosstalk is reduced, and the system margin is improved.
Referring to fig. 3 and 4, fig. 3 and 4 show the crosstalk comparison result of the differential arrangement 100 and the conventional scheme in the present application, and the pin pitch (pitch) used in the comparison test is 0.8mm, i.e. the distance between each pair of differential vias is 0.8mm.
As shown in fig. 3, the signal crosstalk of the differential arrangement 100 of the present application is smaller than that of the conventional scheme in the frequency band of the test signal. As shown in fig. 4, the signal crosstalk sum ICN of the differential via units (the first differential via unit 11 or the second differential via unit 12) in the differential arrangement structure 100 of the present application received a round of surrounding differential via units is 4.87MV, and the signal crosstalk sum ICN of the differential via units in the conventional scheme is 6.12MV. Therefore, the signal crosstalk of the differential arrangement structure 100 in each signal frequency band is smaller than that of the conventional scheme, and the sum of the signal crosstalk of the single differential via units is smaller than that of the conventional scheme, so that the differential crosstalk can be effectively inhibited, the system margin is improved, and technical guidance is provided for the PCB differential porous structure based on the differential arrangement structure 100.
The differential arrangement 100 provided in the above embodiments is used to reduce signal crosstalk of differential vias on a printed circuit board. The differential arrangement structure 100 optimizes the arrangement relation between the first differential via units 11 and the second differential via units 12, and reduces mutual inductance generated by the conventional arrangement mode, thereby reducing signal crosstalk. The differential arrangement 100 may be applied to a printed circuit board, where the pin pitch includes, but is not limited to, 1mm and 0.8mm, and as the signal rate on the printed circuit board increases, especially in a 224Gbps system, the pin pitch gradually decreases, possibly even reaches 0.6mm, resulting in significant increase in signal crosstalk of the differential via.
In some embodiments, as shown in fig. 5, the present application provides a differential arrangement structure 100, where the differential arrangement structure 100 includes at least one differential cell 10, the differential cell 10 includes a first differential via cell 11 and a second differential via cell 12, the first differential via cell 11 includes a first differential via 111 and a second differential via 112, and the second differential via cell 12 includes a third differential via 121 and a fourth differential via 122. It is understood that the differential arrangement 100 may further include a plurality of differential units 10, which is not limited herein.
The first differential via 111 and the second differential via 112 are arranged along a first direction, the third differential via 121 and the fourth differential via 122 are arranged along the first direction, and the first differential via unit 11 and the second differential via unit 12 have a preset distance d in a second direction 3 The second direction is perpendicular to the first direction. d, d 3 May be the center-to-center spacing, d, of the first differential via unit 11 and the second differential via unit 12 in the second direction 3 The distance between the reference points of the other identical positions of the first differential via unit 11 and the second differential via unit 12 in the second direction may be, but is not limited herein. d is the center-to-center spacing of the first differential via unit 11 and the second differential via unit 12 in the first direction.
In some embodiments, as shown in fig. 6, the differential arrangement structure 100 further includes a plurality of ground holes 20, the plurality of ground holes 20 are disposed around the first differential via unit 11 and the second differential via unit 12, and the distances between the plurality of ground holes 20 in the first direction and the second direction are d 4
In some embodiments, the individual holes and the distance between the cells may also be arranged to satisfy the following relationship: d=d 1 =d 2 =d 4 The relation is satisfied,such that the plurality of ground vias 20, the first differential via 111, the second differential via 112, the third differential via 121, and the fourth differential via 122 are arranged to form an orthogonal array.
The high-speed connector and the BGA are main sources of signal crosstalk, and the pin arrangement of the high-speed connector and the solder ball array of the BGA are generally orthogonal arrays, so that the differential arrangement structure 100 can adapt to the arrangement of differential signal wires of the high-speed connector and the BGA, and special routing layout is not needed when the differential arrangement structure is used, so that routing difficulty is reduced. The differential signal routing can also be more orderly through the differential arrangement structure 100, which is beneficial to reducing routing cost and simplifying circuit layout.
In some embodiments, as shown in fig. 7, the first differential via 111 and the second differential via 112 are arranged along a first direction, the third differential via 121 and the fourth differential via 122 are arranged along a third direction, and the third direction and the first direction form a preset included angle Y, and the preset included angle Y has a value ranging from 0 ° to 90 °. The first differential via unit 11 and the second differential via unit 12 satisfy the following relationship in the first direction distance d: d, d 1 ≤d≤d 2 The distance d may be a distance, such as a center-to-center distance, of the same-position reference point on the first differential via unit 11 and the second differential via unit 12, which is not limited herein.
In some embodiments, the relationship between the individual holes may also be set to satisfy the following relationship: d, d 1 ≠d 2 Wherein d 1 Can be greater than d 2 ,d 1 Can also be smaller than d 2 And are not limited herein. As shown in fig. 8, the relationship between the individual holes is set to satisfy the following relationship: d, d 1 Greater than d 2 ,d 2 ≤d≤d 1 A distance d between plural sets of adjacent ground holes 20 in the second direction 21 、d 22 、d 23 And d 24 Wherein d 21 、d 22 、d 23 And d 24 The specific distance values are not required, and the specific distance values can be equal or unequal. Likewise, each group of adjacent ground holes 20 in the first direction has a distance d 25 ,d 25 The specific distance values are not required, and the specific distance values can be equal or unequal.
At the satisfaction of d 2 ≤d≤d 1 In the case of the differential arrangement 100 of the present application, the interior of the differential arrangement can be appropriately adjusted to accommodate different layout requirements for application to devices of different specifications.
In some embodiments, as shown in fig. 9, the differential arrangement 100 includes a first differential via unit 11, a second differential via unit 12, and a plurality of ground vias 20, the first differential via unit 11 including a first differential via 111 and a second differential via 112, and the second differential via unit 12 including a third differential via 121 and a fourth differential via 122. The first and second differential vias 111 and 112 are arranged along a first direction, the third and fourth differential vias 121 and 122 are arranged along the first direction, and the plurality of ground vias 20 are arranged along the first direction. The plurality of ground holes 20 are disposed between the first differential via unit 11 and the second differential via unit 12. In this way, the number of ground holes 20 can be reduced, simplifying the layout of the differential arrangement 100.
In some embodiments, as shown in fig. 10, the differential arrangement 100 includes a plurality of differential units 10 and a plurality of ground holes 20, and a common ground hole 20 exists between two differential units 10 adjacent in the first direction or two differential units 10 adjacent in the second direction. Thus, the number of the ground holes 20 required for the differential arrangement 100 can be reduced, the area required for the differential arrangement 100 can be reduced, the circuit layout on the printed circuit board can be further simplified, and the utilization rate of the ground holes 20 can be improved.
In some embodiments, as shown in fig. 11, the differential arrangement 100 further includes isolation units 30, and the isolation units 30 may be slot-type holes. The long sides of the isolation units 30 may be parallel to the first direction. The isolation unit 30 may be disposed between the first differential via unit 11 and the second differential via unit 12 within one differential unit 10, and the isolation unit 30 may also be disposed between two differential units 10 adjacent in the second direction. By providing the isolation unit 30, signal crosstalk between the first differential via unit 11 and the second differential via unit 12 can be further reduced.
In some embodiments, as shown in fig. 12, the isolation unit 30 may also be a separate via. The plurality of isolation units 30 are arranged along a predetermined direction, for example, the predetermined direction is a first direction. The isolation unit 30 may be a circular independent via to facilitate the processing and forming, and the isolation unit 30 may be an independent via of other shapes. The aperture of the isolation unit 30 is not limited to adapt to the process. If the arrangement density of the isolation units 30 in the predetermined direction is increased, the trench type holes as shown in fig. 11 may be formed. The isolation units 30 may also be used with the ground holes 20, and the relative positions and numbers of the isolation units 30 and the ground holes 20 are not limited, for example, one or more ground holes 20 are provided between two isolation units 30, or one or more isolation units 30 are provided between two ground holes 20. Thus, the isolation unit 30 can be molded with different processing capabilities to meet the requirements of circuit layout.
In some embodiments, as shown in fig. 13, the differential arrangement 100 includes a plurality of isolation units 30, where the widths of the plurality of isolation units 30 in the second direction are W1, W2, and W3, respectively, and W1, W2, and W3 may be equal or unequal, and are not limited herein. The isolation units 30 with different widths are arranged according to specific signal crosstalk reduction requirements, so that the isolation units 30 can be used for different circuit layouts, and the application range of the isolation units 30 is widened.
In some embodiments, as shown in fig. 13, the differential arrangement 100 further includes a plurality of isolation cells 30 and a plurality of ground vias 20. The plurality of isolation units 30 and the plurality of ground holes 20 are disposed around the first differential via unit 11 and the second differential via unit 12. For example, one ground hole 20 is provided at both ends of the first differential via unit 11 and the second differential via unit 12 in the first direction, respectively, and the first differential via unit 11 and the second differential via unit 12 are provided between the three isolation units 30. In this way, not only the signal crosstalk between the first differential via unit 11 and the second differential via unit 12 but also the signal crosstalk between the differential units 10 can be reduced.
Based on the differential arrangement structure provided by the embodiment of the application, the differential arrangement structure can be adapted to devices such as BGA, high-speed connector and the like, and can effectively inhibit the influence of differential crosstalk under the condition that the arrangement mode of differential via holes in a pin hole array is not changed, so that the system margin is improved, and the differential arrangement structure is applied to a printed circuit board with higher signal rate.
The present application also provides a printed circuit board on which any of the differential arrangements 100 provided in the embodiments of the present application are included.
The differential arrangement structure 100 is described in detail in the foregoing, and may achieve the same effects as those achieved in the foregoing embodiments, which will not be described herein.
The preferred embodiments of the present application have been described above with reference to the accompanying drawings, and are not thereby limiting the scope of the claims of the present application. Any modifications, equivalent substitutions and improvements made by those skilled in the art without departing from the scope and spirit of the present application shall fall within the scope of the claims of the present application.

Claims (11)

1. The differential arrangement structure is characterized by comprising one or more differential units, wherein the differential units at least comprise a first differential via unit and a second differential via unit, and the first differential via unit and the second differential via unit comprise two differential vias; the differential unit satisfies the following relationship:
d 1 ≤d≤d 2
wherein d 1 Distance d of two differential via holes of the first differential via hole unit 2 And d is the distance between the first differential via unit and the second differential via unit.
2. The differential arrangement according to claim 1, wherein the differential vias Kong Yandi in the first and second differential via units are arranged in a direction, the first and second differential via units having a predetermined distance in a second direction, the second direction being perpendicular to the first direction.
3. The differential arrangement according to claim 1, wherein d =d 1 =d 2
4. The differential arrangement according to claim 2, further comprising a plurality of ground holes.
5. The differential arrangement according to claim 4, wherein a plurality of the ground holes are provided around the first differential via unit and the second differential via unit.
6. The differential arrangement according to claim 4, wherein the first differential via unit comprises a first differential via and a second differential via, the second differential via unit comprises a third differential via and a fourth differential via; the ground hole, the first differential via hole, the second differential via hole, the third differential via hole and the fourth differential via hole are arranged to form an orthogonal array.
7. The differential arrangement according to claim 4, wherein two of the differential units adjacent in the first direction or two of the differential units adjacent in the second direction share the ground hole.
8. The differential arrangement according to claim 1, further comprising an isolation unit disposed between the first differential via unit and the second differential via unit; alternatively, the isolation unit is disposed between two of the differential units adjacent in the second direction.
9. The differential arrangement according to claim 8, wherein different ones of the isolation units have equal or unequal widths in the second direction.
10. The differential arrangement according to claim 1, further comprising an isolation unit and a plurality of ground holes, the plurality of ground holes and the isolation unit being disposed around the first differential via unit and the second differential via unit.
11. A printed circuit board, characterized in that the printed circuit board comprises a differential arrangement as claimed in any one of claims 1-10.
CN202211186724.0A 2022-09-27 2022-09-27 Differential arrangement structure and printed circuit board Pending CN117440595A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202211186724.0A CN117440595A (en) 2022-09-27 2022-09-27 Differential arrangement structure and printed circuit board
PCT/CN2023/092227 WO2024066356A1 (en) 2022-09-27 2023-05-05 Differential arrangement structure and printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211186724.0A CN117440595A (en) 2022-09-27 2022-09-27 Differential arrangement structure and printed circuit board

Publications (1)

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CN117440595A true CN117440595A (en) 2024-01-23

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Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101112135B (en) * 2004-11-29 2010-12-29 Fci公司 Improved matched-impedance surface-mount technology footprints
CN100531511C (en) * 2005-05-28 2009-08-19 鸿富锦精密工业(深圳)有限公司 Printed circuit board with improved differential via
CN105764232A (en) * 2014-12-17 2016-07-13 鸿富锦精密工业(武汉)有限公司 Printed circuit board and electronic device with application of printed circuit board
CN107391854A (en) * 2017-07-26 2017-11-24 郑州云海信息技术有限公司 The method and device of crosstalk between a kind of inspection difference through hole

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