CN101645441B - 具单胞失效自防护功能的多胞连接大功率光电器件 - Google Patents
具单胞失效自防护功能的多胞连接大功率光电器件 Download PDFInfo
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- CN101645441B CN101645441B CN200910027433.5A CN200910027433A CN101645441B CN 101645441 B CN101645441 B CN 101645441B CN 200910027433 A CN200910027433 A CN 200910027433A CN 101645441 B CN101645441 B CN 101645441B
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/24195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
Description
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN200910027433.5A CN101645441B (zh) | 2009-05-06 | 2009-05-06 | 具单胞失效自防护功能的多胞连接大功率光电器件 |
Applications Claiming Priority (1)
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CN200910027433.5A CN101645441B (zh) | 2009-05-06 | 2009-05-06 | 具单胞失效自防护功能的多胞连接大功率光电器件 |
Publications (2)
Publication Number | Publication Date |
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CN101645441A CN101645441A (zh) | 2010-02-10 |
CN101645441B true CN101645441B (zh) | 2014-10-08 |
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CN200910027433.5A Active CN101645441B (zh) | 2009-05-06 | 2009-05-06 | 具单胞失效自防护功能的多胞连接大功率光电器件 |
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CN104241412A (zh) * | 2013-06-17 | 2014-12-24 | 中国科学院苏州纳米技术与纳米仿生研究所 | 一种改善热分布集中的超大功率光电器件 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6078092A (en) * | 1999-10-18 | 2000-06-20 | Harvatek Corporation | Resettable fuse integrated circuit package |
CN1706043A (zh) * | 2002-10-22 | 2005-12-07 | 克里公司 | Ac下工作的led光引擎及其制作方法 |
-
2009
- 2009-05-06 CN CN200910027433.5A patent/CN101645441B/zh active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6078092A (en) * | 1999-10-18 | 2000-06-20 | Harvatek Corporation | Resettable fuse integrated circuit package |
CN1706043A (zh) * | 2002-10-22 | 2005-12-07 | 克里公司 | Ac下工作的led光引擎及其制作方法 |
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Owner name: SUZHOU INSTITUTE OF NANO-TECH AND NANO-BIONICS(SIN Free format text: FORMER OWNER: SUZHOU NANO TECHNIQUE + NANO BIONIC RESEARCH INST. Effective date: 20100907 |
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Free format text: CORRECT: ADDRESS; FROM: 215125 NO.398, RUOSHUI ROAD, GAOJIAO DISTRICT, DUSHUHU, INDUSTRIAL PARK, SUZHOU CITY, JIANGSU PROVINCE TO: 215123 NO.398, RUOSHUI ROAD, INDUSTRIAL PARK, SUZHOU CITY, JIANGSU PROVINCE |
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Effective date of registration: 20100907 Address after: 215123 Suzhou Industrial Park, Jiangsu, if waterway No. 398 Applicant after: Suzhou Institute of Nano-Tech and Bionics (SINANO), Chinese Academy of Sciences Address before: 215125 Jiangsu city of Suzhou province Dushu Lake Industrial Park No. 398 waterway if higher education Applicant before: Suzhou Nano Technique & Nano Bionic Research Inst. |
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Application publication date: 20100210 Assignee: HAIDIKE (NANTONG) PHOTOELECTRIC SCIENCE & TECHNOLOGY CO., LTD. Assignor: Suzhou Institute of Nano-Tech and Bionics (SINANO), Chinese Academy of Sciences Contract record no.: 2015320010048 Denomination of invention: Multi-cell connected high-power photoelectric device with single-cell failure self-protecting function Granted publication date: 20141008 License type: Common License Record date: 20150428 |
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