CN101604252A - Multicomputer system and multicomputer system startup method - Google Patents

Multicomputer system and multicomputer system startup method Download PDF

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CN101604252A
CN101604252A CNA2009101522050A CN200910152205A CN101604252A CN 101604252 A CN101604252 A CN 101604252A CN A2009101522050 A CNA2009101522050 A CN A2009101522050A CN 200910152205 A CN200910152205 A CN 200910152205A CN 101604252 A CN101604252 A CN 101604252A
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processor
program
memory module
multicomputer system
memory
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徐前
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Huawei Device Shenzhen Co Ltd
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Shenzhen Huawei Communication Technologies Co Ltd
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Abstract

The embodiment of the invention provides a kind of multicomputer system and multicomputer system startup method, and multicomputer system comprises the first initialize routine memory module, is used to store first initialize routine; First memory module is used to store second initialize routine, first program and second program; First processor is used for carrying out initialization according to second initialize routine, and obtains first program and second program from described first memory module; Second memory module is used to store first processor and starts described first program and second program that the back obtains from first memory module; Second processor is used for carrying out initialization according to first initialize routine, and carries out second program of storing in second memory module; The embodiment of the invention also provides a kind of multicomputer system startup method.Multicomputer system that the embodiment of the invention provides and multicomputer system startup method can reduce the complexity of multicomputer system.

Description

Multicomputer system and multicomputer system startup method
Technical field
The embodiment of the invention relates to the microprocessing field, particularly a kind of multicomputer system and multicomputer system startup method.
Background technology
In the processor in fields such as multimedia, voice communication, main flow is the ARM chip core at present, general 32 risc microcontrollers of ARM system comprise a plurality of products, the processor of present many ARM kernels, abundant Peripheral Interface and the setting that starts ROM are arranged, processor can have dual mode to start, and is configured to outer Starting mode that outside ROM starts or ROM starts from the sheet interior Starting mode.
Under the Starting mode, ARM is from external program memory (generally being the Flash storer) outside, and application corresponding is carried out in instruction fetch; Under interior Starting mode, start a 128B start-up routine that solidifies among the ROM on the ARM operation sheet, finish the device initialization, the configuration communication interface is stored in user program in the on-chip SRAM, jump to the on-chip SRAM section start then and begin to carry out the user program of download, for further debugging, code are downloaded, started the Flash memory program outward approach is provided.
Start-up code powers on from system and begins to take over CPU, need to be responsible for the stack space of initialization CPU under various patterns successively, set the memory-mapped of CPU, various control registers to system are done initialization, external memory storage to CPU carries out initialization, set the base address of each peripherals, create correct interrupt vector table, for the C code is carried out establishment ZI (zero creates) district, enter into the C code then, in the C code, continue clock, communication port is carried out initialization, the interruption of opening system then allows the position, enter into application code and carry out, the term of execution, responds various look-at-me and calls the interrupt service routine that pre-sets and handle these interruptions.
The Starting mode of multicomputer system is each self-starting respectively at present, communicates by modes such as UART, USB, DPRAM after startup is finished again.With processor one and processor two is example, processor one is carried out application corresponding or is started a start-up routine that solidifies the ROM from external program memory (generally being NAND Flash storer) instruction fetch, finish the device initialization, configuration serial ports or other communication modes receive user program and are stored in the on-chip SRAM, jump to the on-chip SRAM section start then and begin to carry out the user program of download, and then download, start the Flash memory program outward approach is provided for debugging, code.In like manner processor two also is to start according to same order.
Processor one and processor two start finish after, carry out task separately, when carrying out exchanges data or control, needs can pass through UART Universal Asynchronous Receiver Transmitter (Universal AsynchronousReceiver/Transmitter, hereinafter to be referred as: UART) communication, USB (universal serial bus) (UniversalSerial Bus, hereinafter to be referred as: USB) communication or Double Port Random Memory (Dual Port Random AcessMemory, hereinafter to be referred as: DPRAM) communication.
The inventor is being to realize finding in the process of the present invention, there is following technical matters at least in prior art: the mode that a plurality of processors start simultaneously in the multicomputer system of the prior art, need independent program storage (as NAND Flash) be set for each processor, make the complex structure of multicomputer system, the cost height.
Summary of the invention
The embodiment of the invention provides a kind of multicomputer system and multicomputer system startup method, can reduce the complexity of multicomputer system, reduces cost.
The embodiment of the invention provides a kind of multicomputer system, comprising:
The first initialize routine memory module is used to store first initialize routine;
First memory module is used to store second initialize routine, first program and second program;
First processor communicates to connect with described first memory module, is used for carrying out initialization according to described second initialize routine, and obtains described first program and second program from described first memory module;
Second memory module, be used to store first processor start the back from first memory module obtain first program of stating and second program;
Second processor is connected with described first initialize routine memory module and described second memory module, is used for carrying out initialization according to described first initialize routine, and carries out described second program of storing in described second memory module;
Wherein, described first processor also is used for carrying out described first program that described second memory module is stored.
The embodiment of the invention also provides a kind of multicomputer system startup method, comprising:
The first processor and second processor obtain initialize routine and carry out;
First processor obtains first program of described first processor of first memory module storage and second program of described second processor, and with described first program and second procedure stores in second memory module;
The first processor and second processor are carried out first program and second program that is stored in second memory module respectively.
Multicomputer system that the embodiment of the invention provides and multicomputer system startup method, multicomputer system wherein comprises the first processor and second processor, and first memory module that is provided with on first processor stores the initialize routine of first processor, first program of first processor and second program of second processor, and need on second processor, not be provided with the storage second program memory module, can reduce the complexity of multicomputer system, save cost; The embodiment of the invention also provides corresponding multiprocessor startup method, obtains the program of the execution of the first processor and second processor by first processor, is convenient to realize multicomputer system is carried out unified management.
Description of drawings
Fig. 1 is the structural representation of multicomputer system embodiment one of the present invention;
Fig. 2 is the structural representation of multicomputer system embodiment two of the present invention;
Fig. 3 is the structural representation of multicomputer system embodiment three of the present invention;
Fig. 4 is the schematic flow sheet of multicomputer system startup method embodiment of the present invention;
Fig. 5 is the structural representation of the multicomputer system in the present invention's first specific embodiment;
Fig. 6 is the schematic flow sheet of multicomputer system startup method embodiment in the present invention's first specific embodiment;
Fig. 7 is the structural representation of the multicomputer system in the present invention's second specific embodiment;
Fig. 8 is the schematic flow sheet of multicomputer system startup method embodiment in the present invention's second specific embodiment;
Fig. 9 is applied to the structural representation of embodiment on the smart mobile phone for technical solution of the present invention.
Embodiment
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
The embodiment of the invention provides a kind of multicomputer system, Fig. 1 is the structural representation of multicomputer system embodiment one of the present invention, as shown in Figure 1, multicomputer system comprises first processor 11, second processor 12, the first initialize routine memory module 13, first memory module 14 and second memory module 15, and wherein the first initialize routine memory module 13 is used to store first initialize routine; First memory module 14 is used to store second initialize routine, first program and second program; First processor 11 communicates to connect with described first memory module 14, is used for carrying out initialization according to described second initialize routine, and obtains first program and second program from described first memory module 14; Second memory module 15 is used to store first processor 11 and starts first program and second program that the back obtains from first memory module 14; Second processor 12 is connected with the first initialize routine memory module 13 and second memory module 15, is used for carrying out initialization according to described first initialize routine, and carries out described second program of storage in second memory module 15; Wherein first processor 11 also is used for carrying out described first program of second memory module, 15 storages.
The multicomputer system that present embodiment provides, one first memory module is set, this memory module stores the initialize routine of first processor, second program of first program and second processor, and store the memory module of second program from the not independent peripheral hardware of processor, above-mentioned first program and second program can include only system program, also can comprise system program and user program, the program that is about to the first processor and second processor all stores first memory module that is connected with first processor into, rather than be the memory module that each processor all is provided with storage system program and user program, can reduce the complexity of multicomputer system, reduce cost.
As shown in Figure 2, second memory module 15 in the foregoing description can be divided into program storage 151 and arbitration circuit 152, above-mentioned program storage 151 is used to store first processor 11 and starts first program and second program that the back obtains from first memory module 14, i.e. first processor 11 and second processor, 12 shared program storages 151.Arbitration circuit 152 is used to control described first program that first processor 11 is carried out described program storage 151 storages; Control described second processor 12 and carry out described second program of the storage in the described program storage 151.This embodiment can make first processor and the shared program storage of second processor, further reduces system complexity, saves cost.
Also has another embodiment in addition, as shown in Figure 3, second memory module 15 is divided into first program storage 153 and second program storage 154, multicomputer system also comprises communication module 16, the first above-mentioned program storage 153 is connected with described first processor 11, be used to store described first processor 11 and start described first program that the back obtains from first memory module 14, after startup, carry out for described first processor 11; Second program storage 154 is connected with described second processor 12, is used to store described first processor 11 and starts described second program that the back obtains from first memory module 14, carries out after startup for described second processor.
First processor 11 is after second program that gets access to second processor 12 after the startup, send to second program storage 154 by communication module 16, promptly communication module 16 second program that is used for second processor that first processor is obtained sends second processor to store second program storage of second processor into.
Program storage in the present embodiment, first program storage and second program storage can be synchronous DRAM (Synchronization Dynamic RAM, hereinafter to be referred as: SDRAM) or Double Data Rate (Doub1e Data Rate is hereinafter to be referred as DDR) SDRAM.
Above-mentioned communication module can comprise USB interface, UART or DPRAM, when using DPRAM to communicate, can improve message transmission rate, satisfies the requirement of high speed data transfer.
The method corresponding with above-mentioned multicomputer system, that the embodiment of the invention also provides above-mentioned multicomputer system to start.
Fig. 4 as shown in Figure 4, comprises the steps: for the schematic flow sheet of multicomputer system startup method embodiment of the present invention
Step 101, first processor and second processor obtain initialize routine and carry out;
Step 102, first processor obtain first program of described first processor of first memory module storage and second program of described second processor, and with described first program and second procedure stores in second memory module;
Step 103, first processor and second processor are carried out first program and second program that is stored in second memory module respectively.
The multicomputer system startup method that present embodiment provides, obtain first program of the first processor of first memory module storage by first processor, and second program of second processor, above-mentioned first program and second program can be system program, also can be system program and user program, and with above-mentioned first program and second procedure stores in second memory module, carry out first program and second program respectively by the first processor and second processor, can be at the memory module of the program that a storage first processor and second processor only are set in the multicomputer system, and second processor does not need independent peripheral hardware to store the situation of the memory module of second program, a kind of startup method is provided, obtain second program of second processor simultaneously by first processor, can realize unified management system.
In the above-described embodiments, the first processor and second processor obtain initialize routine and carry out and can be specially first processor and obtain initialize routine in ROM (read-only memory) or the external program memory internally and carry out, and second processor obtains initialize routine in ROM (read-only memory) or the external electric Erasable Programmable Read Only Memory EPROM internally and carries out.
Second program that first processor obtains first program of described first processor of first memory module storage and described second processor can be specially first processor and obtain first program of described first processor and second program of described second processor from the external program memory of peripheral hardware, and external memory storage wherein can be NAND Flash.
In the foregoing description first program and second procedure stores are comprised in second memory module: first procedure stores of described first processor in the sheet of first processor in the random access memory, and is sent to second processor with in the random access memory in the sheet that stores second processor into second program of described second processor; Perhaps with second procedure stores of first program of described first processor and described second processor in the shared sheet of first processor and second processor in the random access memory.
And when first processor and shared interior random access memory of second processor, the described first processor and second processor are carried out first program and second program that are stored in second memory module respectively and are comprised: carry out first program in the random access memory in the sheet that is stored in by arbitration circuit control first processor; Control second processor and carry out second program in the random access memory in the sheet that is stored in.Random access memory can be SDRAM or DDR SDRAM in the sheet in the present embodiment.
First processor sends to described second processor with second program of second processor and can be specially first processor and by USB interface, UART or DPRAM second program of second processor is sent to described second processor.
The multicomputer system that the above embodiment of the present invention provides, can include only a memory module that is used for storage system program and user program (first program or second program), this module is connected with first processor, and other second processor is not connected with above-mentioned memory module, after first processor is finished initialization, obtain the system program and the user program of the first processor and second processor, and can store above-mentioned system program and user program into first processor and the shared interior random access memory of sheet of second processor, promptly the first processor and second processor all jump to above-mentioned interior random access memory executive system routine and user program after finishing initialization; Also can be first processor with random access memory in the sheet of the system program of the first processor that obtains and user program storage first processor, and the system program and the user program of second processor sent to second processor with in the random access memory in the sheet that stores its setting into, the first processor and second processor jump in separately the sheet executive system routine and user program in the random access memory respectively subsequently.
The present invention's first specific embodiment comprises the situation in the random access memory in separately the sheet respectively at first processor and second processor, Fig. 5 is the structural representation of the multicomputer system in the present invention's first specific embodiment, as shown in Figure 5, multicomputer system comprises the first processor 21 and second processor 22, wherein first processor 21 is provided with a memory module 23, be NAND Flash, be used to store the initialize routine of primary processor, the system program of system program and user program and second processor and user program, and second processor 22 optionally is provided with an EEPROM24, this EEPROM24 is used to store the initialize routine of second processor 22, also can select to be arranged among the ROM of processor inside for the initialize routine of the above-mentioned first processor and second processor in addition, first interior random access memory 25 and second interior random access memory 26 are set for the first processor and second processor respectively in addition, this on-chip memory can make SDRAM or DDRAM, be used for storing respectively and carrying out the first processor of download and the system program and the user program of second processor, between the first processor and second processor, communication module 27 is set in addition, for example USB interface can be set, the UART serial ports, perhaps as VME, other STD bus such as CompactPCI bus, or utilize shared storage to communicate, be that a plurality of processors data storage that will need to exchange is in the memory bank that can visit, a processor writes data in the memory bank, another processor is read the data time-division, this mode can realize the isolation of processor bus, make a plurality of processors swap data effectively, realize data sharing.Use DPRAM to communicate in the present embodiment, CEL and CER are two chip selection signal interfaces.
Fig. 6 as shown in Figure 6, comprises the steps: for the schematic flow sheet of multicomputer system startup method embodiment in the present invention's first specific embodiment
Step 201, first processor obtain initialize routine and execution from external program memory (as NAND Flash storer), finish the device initialization, configuration interface and related register.Second processor can start a start-up routine that solidifies among the inner ROM, if inside does not have relevant configuration, then can finish the initialization of device by adding EEPROM, stack space under various patterns of configuring external interface, initialization CPU, set the CPU memory-mapped, to the various control registers of system carry out initialization, to the external memory storage of CPU carry out initialization, set a peripherals the base address, create correct interrupt vector table;
Step 202, first processor obtain the system program of first processor and the system program and the user program of the user program and second processor from NAND Flash, and first interior random access memory that the system program and the user program of first processor downloaded to first processor, promptly among SDRAM or the DDRSDRAM; The system program of second processor and user program are sent to second interior random access memory of second processor through UART, USB or DPRAM, promptly among SDRAM or the DDRSDRAM;
Step 203, first processor and second processor finish in startup, finish initial configuration separately, and system program that will be separately and user program download to separately SDRAM or DDR SDRAM in after, the section start that the first processor and second processor jump to SDRAM separately or DDR SDRAM begins to carry out the system program and the user program of download, finish corresponding task, and can carry out data communication by agreements such as UART, USB or DPRAM.
Pass through to reduce the design of a NAND Flash chip in the present embodiment, can reach the purpose of saving cost of products, in addition with respect to traditional Starting mode, can directly control the system program and the user program code of second processor by first processor, and do not need two processors download system program and user program separately, the optimal design that can cooperate hardware system, on data transmission, because the application of DPRAM, message transmission rate increases greatly, can satisfy the requirement of high speed data transfer.
Fig. 7 is the structural representation of the multicomputer system in the present invention's second specific embodiment, as shown in Figure 7, multicomputer system comprises the first processor 31 and second processor 32, wherein first processor 31 is provided with a memory module 33, be NAND Flash, be used to store the initialize routine of first processor, the system program of system program and user program and second processor and user program, and second processor 32 optionally is provided with an EEPROM34, this EEPROM34 is used to store the initialize routine of second processor 32, also can select to be arranged among the ROM of processor inside for the initialize routine of the above-mentioned first processor and second processor in addition, in addition can first processor and the shared sheet of second processor in random access memory 35, this on-chip memory can make SDRAM or DDR SDRAM, also be provided with arbitration circuit 36 in addition, this arbitration circuit is used for controlling first processor and second processor is carried out the personal code work that is stored in random access memory 35 in the sheet separately respectively, between the first processor and second processor, communication module 37 is set in addition, for example USB interface can be set, the UART serial ports, perhaps as VME, other STD bus such as Compact pci bus, or utilize shared storage to communicate, DPRAM for example.
Fig. 8 as shown in Figure 8, comprises the steps: for the schematic flow sheet of multicomputer system startup method embodiment in the present invention's second specific embodiment
Step 301, first processor obtain initialize routine and execution from external program memory (as NAND Flash storer), finish the device initialization, configuration interface and related register.Second processor can start a start-up routine that solidifies among the inner ROM, if inside does not have relevant configuration, then can finish the initialization of device by adding EEPROM, stack space under various patterns of configuring external interface, initialization CPU, set the CPU memory-mapped, to the various control registers of system carry out initialization, to the external memory storage of CPU carry out initialization, set a peripherals the base address, create correct interrupt vector table;
Step 302, first processor obtain the system program of first processor and the system program and the user program of the user program and second processor from NAND Flash, and it is downloaded in the shared sheet of first processor and second processor in the random access memory, promptly among SDRAM or the DDR SDRAM;
Step 303, the first processor and second processor finish in startup, finish initial configuration separately, and after downloading to its system program and user program among same SDRAM or the DDR SDRAM, the first processor and second processor can be carried out among SDRAM or the DDR SDRAM separately system program and user program code by arbitration circuit, finish corresponding task, and can pass through UART, agreement such as USB and DPRAM is carried out data communication, arbitration circuit can switch the switching that chip is finished bus by the data bus of selecting chip manufacturer for use, also can realize by building bus multichannel interface circuit.Pass through to reduce the design of NAND Flash chip and SDRAM/ or DDR SDRAM in the present embodiment, can reach the purpose of saving cost of products, in addition, can directly control the user program code of second processor, share a SDRAM or DDR SDRAM, thereby realize optimization system by arbitration circuit by first processor, on data transmission, because the application of DPRAM, message transmission rate increases greatly, can satisfy the requirement of high speed data transfer.
The multicomputer system that the above embodiment of the present invention provides can be applied on the smart mobile phone, Fig. 9 is applied to the structural representation of embodiment on the smart mobile phone for technical solution of the present invention, as shown in Figure 9, in the design of present smart mobile phone, comprise application processor (AP side) and substrate handler (MODEM side), application processor is mainly finished the execution of application program and the processing of Multimedia Task, for example utilizes GPU control LCD, WiFi, GPS, bluetooth (Bluetooth) and camera application such as (Camera); Substrate handler is mainly finished microphone (Speaker), Headset, keyboard (Key Pad) and radio frequency (RF) communication function.All be provided with on the basis of user program memory module for each processor in the prior art, NAND Flash promptly all is set, and substrate handler is not provided with NAND Flash in the invention process, and only NAND Flash is set for application processor, store the application program of substrate handler and application processor among this NAND Flash, during startup after substrate handler and application processor are all finished initialization, application processor obtains application program from NAND Flash, the user program of application processor is downloaded among the SDRAM of application processor, the user program of substrate handler is downloaded among the SDRAM of substrate handler, and application processor and substrate handler jump to executive utility among separately the SDRAM afterwards.Also can be the shared SDRAM of substrate handler and application processor in addition, come control basal plate processor and application processor execution code separately by arbitration circuit is set.Also can will be arranged on the substrate handler in the foregoing description in addition from NAND Flash.
Mostly be that with the multicomputer system that comprises two processors be example in the foregoing description, i.e. a first processor and one second processor, also can be the situation that comprises second processor more than three or three in addition, only need to select one of them processor as first processor, the user program memory module is set on first processor, during system start-up, obtain the user program of each second processor, and send it to each second processor by first processor.
Multicomputer system that the embodiment of the invention provides and multicomputer system startup method, multicomputer system wherein comprises the first processor and second processor, second processor wherein can be for a plurality of, and the user program memory module only is set on first processor, the user program of the storage first processor and second processor in this module, thereby needn't the user program memory module be set for each processor, can reduce the complexity of multicomputer system, reduce cost, a kind of multiprocessor startup method also is provided simultaneously, this startup method can start at above-mentioned multicomputer system, simultaneously can realize controlling the user program of other second processors, realize unified management by first processor.And further can select to use DPRAM as communication module, can improve message transmission rate, satisfy the requirement of data high-speed transmission.
It should be noted that at last: above embodiment is only in order to technical scheme of the present invention to be described but not limit it, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that: it still can make amendment or be equal to replacement technical scheme of the present invention, and these modifications or be equal to replacement and also can not make amended technical scheme break away from the spirit and scope of technical solution of the present invention.

Claims (12)

1, a kind of multicomputer system is characterized in that, comprising:
The first initialize routine memory module is used to store first initialize routine;
First memory module is used to store second initialize routine, first program and second program;
First processor communicates to connect with described first memory module, is used for carrying out initialization according to described second initialize routine, and obtains described first program and second program from described first memory module;
Second memory module is used to store first processor and starts described first program and second program that the back obtains from first memory module;
Second processor is connected with described first initialize routine memory module and described second memory module, is used for carrying out initialization according to described first initialize routine, and carries out described second program of storing in described second memory module;
Wherein, described first processor also is used for carrying out described first program that described second memory module is stored.
2, multicomputer system according to claim 1 is characterized in that, described second memory module comprises:
Program storage is used to store described first processor and starts first program of the described first processor that the back obtains from described first memory module and second program of described second processor;
Arbitration circuit is used to control described first program that described first processor is carried out described program storage storage; Control described second processor and carry out described second program of the storage in the described program storage.
3, multicomputer system according to claim 1 is characterized in that, described second memory module comprises:
First program storage is connected with described first processor, is used to store described first processor and starts described first program that the back obtains from first memory module, carries out after startup for described first processor;
Second program storage is connected with described second processor, is used to store described first processor and starts described second program that the back obtains from first memory module, carries out after startup for described second processor;
Described multicomputer system also comprises:
Communication module is used for sending described second program that described first processor obtains to described second processor to store described second program storage of described second processor into.
According to claim 2 or 3 described multicomputer systems, it is characterized in that 4, described program storage, first program storage and second program storage are SDRAM or DDR SDRAM.
5, multicomputer system according to claim 3 is characterized in that, described communication module comprises USB interface, UART or DPRAM.
6, multicomputer system according to claim 1 is characterized in that, described first program comprises system program or comprises system program and user program; Described second program comprises system program or comprises system program and user program.
7, a kind of multicomputer system startup method is characterized in that, comprising:
The first processor and second processor obtain initialize routine and carry out;
First processor obtains first program of described first processor of first memory module storage and second program of described second processor, and with described first program and second procedure stores in second memory module;
The first processor and second processor are carried out first program and second program that is stored in second memory module respectively.
8, multicomputer system startup method according to claim 7 is characterized in that, the described first processor and second processor obtain initialize routine and carry out and comprise:
First processor obtains initialize routine in ROM (read-only memory) or the external program memory internally and carries out, and second processor obtains initialize routine in ROM (read-only memory) or the external electric Erasable Programmable Read Only Memory EPROM internally and carries out.
9, multicomputer system startup method according to claim 7 is characterized in that, described first processor obtains first program of described first processor of first memory module storage and second program of described second processor comprises:
First processor obtains first program of described first processor and second program of described second processor from the external program memory of peripheral hardware.
10, multicomputer system startup method according to claim 9 is characterized in that, described first program and second procedure stores is comprised in second memory module:
First procedure stores of described first processor in the sheet of first processor in the random access memory, and is sent to second processor with in the random access memory in the sheet that stores second processor into second program of described second processor; Or
With second procedure stores of first program of described first processor and described second processor in the shared sheet of first processor and second processor in the random access memory.
11, multicomputer system startup method according to claim 10, it is characterized in that, when first processor and shared interior random access memory of second processor, the described first processor and second processor are carried out first program and second program that are stored in second memory module respectively and are comprised:
Carry out first program in the random access memory in the sheet that is stored in by arbitration circuit control first processor; Control second processor and carry out second program in the random access memory in the sheet that is stored in.
12, multicomputer system startup method according to claim 10 is characterized in that, first processor sends to described second processor with second program of second processor and comprises:
First processor sends to described second processor by USB interface, UART or DPRAM with second program of second processor.
CNA2009101522050A 2009-07-10 2009-07-10 Multicomputer system and multicomputer system startup method Pending CN101604252A (en)

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CN107391431A (en) * 2017-06-29 2017-11-24 北京金石智信科技有限公司 A kind of method, apparatus and system of multiple processor share and access memories
CN107533610A (en) * 2015-04-28 2018-01-02 爱特梅尔公司 Secure access in micro controller system
CN108599981A (en) * 2018-03-13 2018-09-28 迈普通信技术股份有限公司 Management method, service card and the communication equipment of service card
CN109508529A (en) * 2018-11-20 2019-03-22 艾体威尔电子技术(北京)有限公司 A kind of implementation method of payment terminal clean boot verification
CN110265029A (en) * 2019-06-21 2019-09-20 百度在线网络技术(北京)有限公司 Speech chip and electronic equipment
CN111541823A (en) * 2020-04-17 2020-08-14 展讯通信(上海)有限公司 Modem and communication device
CN111654300A (en) * 2020-06-19 2020-09-11 展讯通信(上海)有限公司 Electronic device
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CN113641404A (en) * 2021-07-20 2021-11-12 北京百度网讯科技有限公司 Program running method and device, processor chip, electronic device and storage medium

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CN102200950A (en) * 2010-03-24 2011-09-28 原相科技股份有限公司 Universal serial bus controller and execution method thereof
US9003174B2 (en) 2010-03-31 2015-04-07 Wistron Corporation Method for boosting an electronic device with multiple processing units, and electronic device for implementing the same
CN102214105A (en) * 2010-04-08 2011-10-12 纬创资通股份有限公司 Parallel speedy starting method and electronic device having multiple processing units
CN102214105B (en) * 2010-04-08 2017-05-31 纬创资通股份有限公司 Parallelization quick start method and the electronic installation with multiplied unit
CN102646045A (en) * 2012-03-08 2012-08-22 杭州海康威视数字技术股份有限公司 Multiprocessor system and parallel startup method thereof
CN103312933A (en) * 2012-03-13 2013-09-18 株式会社理光 Control apparatus and method of starting control apparatus
CN103312933B (en) * 2012-03-13 2016-04-13 株式会社理光 The method of control appliance and startup control appliance
CN102750256A (en) * 2012-06-12 2012-10-24 福建睿矽微电子科技有限公司 Multiprocessor shared storage implementation technique
CN102750256B (en) * 2012-06-12 2016-09-14 福建睿矽微电子科技有限公司 A kind of multiprocessor is shared storage and is realized technology
CN103678030A (en) * 2012-09-04 2014-03-26 杭州海康威视数字技术股份有限公司 Multi-system equipment start system and method thereof
WO2015014013A1 (en) * 2013-07-30 2015-02-05 宇龙计算机通信科技(深圳)有限公司 Terminal, display control method and display control system for user interface
CN104199699A (en) * 2014-08-29 2014-12-10 北京经纬恒润科技有限公司 Program loading method and device, chip starting method and device and main control equipment
CN104199699B (en) * 2014-08-29 2017-06-16 北京经纬恒润科技有限公司 Program loading method, chip start method, device and main control device
CN107533610A (en) * 2015-04-28 2018-01-02 爱特梅尔公司 Secure access in micro controller system
CN105827909B (en) * 2016-01-25 2017-06-23 维沃移动通信有限公司 A kind of dual camera quick start method and mobile terminal
CN105827909A (en) * 2016-01-25 2016-08-03 维沃移动通信有限公司 Dual-camera quick start method and mobile terminal
CN107391431B (en) * 2017-06-29 2020-05-05 北京金石智信科技有限公司 Method, device and system for sharing access memory by multiple processors
CN107391431A (en) * 2017-06-29 2017-11-24 北京金石智信科技有限公司 A kind of method, apparatus and system of multiple processor share and access memories
CN108599981A (en) * 2018-03-13 2018-09-28 迈普通信技术股份有限公司 Management method, service card and the communication equipment of service card
CN109508529B (en) * 2018-11-20 2021-10-08 艾体威尔电子技术(北京)有限公司 Method for realizing safety starting verification of payment terminal
CN109508529A (en) * 2018-11-20 2019-03-22 艾体威尔电子技术(北京)有限公司 A kind of implementation method of payment terminal clean boot verification
CN110265029A (en) * 2019-06-21 2019-09-20 百度在线网络技术(北京)有限公司 Speech chip and electronic equipment
CN111541823A (en) * 2020-04-17 2020-08-14 展讯通信(上海)有限公司 Modem and communication device
CN111697987A (en) * 2020-06-19 2020-09-22 展讯通信(上海)有限公司 Electronic device
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CN111654300A (en) * 2020-06-19 2020-09-11 展讯通信(上海)有限公司 Electronic device
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CN111740754B (en) * 2020-06-19 2022-05-20 展讯通信(上海)有限公司 Electronic device
CN113641404A (en) * 2021-07-20 2021-11-12 北京百度网讯科技有限公司 Program running method and device, processor chip, electronic device and storage medium

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