CN102214105B - Parallelization quick start method and the electronic installation with multiplied unit - Google Patents
Parallelization quick start method and the electronic installation with multiplied unit Download PDFInfo
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- CN102214105B CN102214105B CN201010141295.6A CN201010141295A CN102214105B CN 102214105 B CN102214105 B CN 102214105B CN 201010141295 A CN201010141295 A CN 201010141295A CN 102214105 B CN102214105 B CN 102214105B
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Abstract
A kind of parallelization quick start method and the electronic installation with multiplied unit.The parallelization quick start method, it is adaptable to the electronic installation with multiplied unit, comprises the steps of：A () makes a first processing units of the electronic installation perform one can initialize the program of computer hardware；When initialization computer hardware is completed, perform (b) first processing units and a random access memory is loaded into by the exclusive chained library for using that calls of a second processing unit of the electronic installation by least one from a store media；And (c) makes the core that second processing unit performs an operating system start shooting, and is then loaded by remaining chained library of itself exclusive calling from the store media.Because first processing units side second processing unit preloads chained library, therefore the startup time can be saved.
Description
Technical field
It is more particularly to a kind of to accelerate tool the present invention relates to a kind of startup method of the electronic installation with multiplied unit
There is the parallelization quick start method of the electronic installation toggle speed of multiplied unit.
Background technology
The portable electric devices such as intelligent mobile phone have the functions such as communication, data transfer and multimedia concurrently, as technology is sent out
Transform into ripe and become increasingly popular.The processor (CPU) of this sorts of electronic devices needs to process extensive application program and multimedia file,
Well-known chip factory strongly develops the CPU architecture of double-core (DualCore) to improve operation efficiency for this in recent years.
For example, QualCom (Qualcomm) wherein a pair of core processor architecture is using a slower process cores
The heart, it is the ARM9 of 256MHz for example to perform clock, communication special purpose operating system and treatment 3G communications protocol is performed, in addition using one
Processing core, for example, perform the ARM11 that clock is 768~1000MHz faster, performs the operating system of application layer (for example
Windows Mobile or Linux).
Refering to Fig. 1, in start, ARM9 performs Boot Loader in the first phase.Boot Loader mainly run
Task includes initialization computer hardware, takes hardware environment to a suitable state.After the completion of the first stage, the sides of ARM9 mono-
Face carries out the loading action of the operating system (abbreviation communication operation system) for processing 3G communications protocol, on the other hand notifies
ARM11 performs the operating system (being illustrated with Linux) of the work-loading application layer of second stage.In second stage treatment
Appearance includes the Linux kernel heart (kernel) start, loading chained library (library) and the initialization on all hardware periphery, about
The time of 20 seconds is needed to complete.Following ARM11 continues executing with the phase III, starts graphical user interface (referred to as
UI).However, the UI designs of grace so that the chained library that ARM11 is loaded needed for the phase III is more and more huger, drags slow start
Time.
Under current start mechanism, because ARM11 process times are longer than the time that ARM9 loads communication operating system,
Even and if communication operating system loads completion already, the situation of completion is not loaded in (SuSE) Linux OS and User's Interface
Under, ARM9 simultaneously cannot enable the related running of communication and the sky etc. that can only leave unused.Due to the user of portable electric device, always wish
Hoping on the portable electric device can use immediately after electricity, and the available machine time of tens of seconds always allows user to feel quite very long.
In order to improve problem long of foregoing available machine time, the processing core for typically changing more efficient energy performs start and makees
Industry, but cost certainly will increase.
The content of the invention
Therefore, the purpose of the present invention, that is, providing a kind of parallelization quick start method, it is adaptable to multiplied unit
Electronic installation, and realized by the rewriting of the program that can initialize computer hardware.
It is another object of the present invention to provide a kind of electronic installation, by the rewriting of the program that can initialize computer hardware
Accelerate starting up speed.
To reach above-mentioned purpose, electronic installation of the present invention can initialize the program and most chains of computer hardware comprising a storage one
Connect store media, a random access memory in storehouse, and a first processing units and a second processing unit.The electronic installation is held
Capable parallelization quick start method is comprised the steps of：
A () makes the first processing units perform one can initialize the program of computer hardware；When initialization computer hardware is completed, perform
Step (b) and (c).
B the () first processing units call the chain for using by least one from a store media by the second processing unit is exclusive
Connect storehouse and be loaded into random access memory.
C () makes the core that the second processing unit performs an operating system start shooting, then from store media loading by it
Remaining chained library of exclusive calling itself.
It is preferred that the chained library of the step (b) loading includes at least part of chained library of an application layer operating system,
Even also include at least part chained library contained by graphical user interface.
It is preferred that the electronic installation is the embedded systems such as a such as intelligent mobile phone, and the journey of computer hardware can be initialized
Sequence refers to Boot Loader.Can also be general computer system but the present invention is not limited with embedded system, by
Bios program initializes computer hardware.
It is preferred that the first processing units be according to one write on Boot Loader default chained library list carry out it is pre-
Carry the work of chained library.
It is preferred that the first processing units and second processing unit are in the middle of a dual core processors or multi-core processor
Two processing cores, or two processors.
Effect of the invention is to rewrite to make first processing units share part second processing unit with program
Loading work, the overall startup time can be shortened without hardware is changed, and shorten user's stand-by period.
Brief description of the drawings
Fig. 1 is the starting procedure schematic diagram of an existing electronic installation with dual core processors, illustrates wherein two treatment
The workflow of core；
Fig. 2 is a device block diagram, illustrates the preferred embodiment of electronic installation of the present invention with multiplied unit；
Fig. 3 is a starting procedure schematic diagram, illustrates the first processing units of the present embodiment and the work of second processing unit
Flow；And
Fig. 4 is chained library loading schematic diagram, illustrates that chained library loads a random access memory from a store media
Corresponding relation.
Reference numeral explanation
1 ... ... ... first processing units
2 ... ... ... second processing units
3 ... ... ... store medias
4……………RAM
10 ... ... virtual memory
20 ... ... virtual memory
100 ... ... electronic installations
S1~S6 ... steps
Specific embodiment
For the present invention foregoing and other technology contents, feature and effect, below in conjunction with one of refer to the attached drawing compared with
In the detailed description of good embodiment, can clearly present.
Refering to Fig. 2, the preferred embodiment of electronic installation of the present invention 100 is an embedded system with multiple processing units
(Embedded system), integrated circuit (IC) initialization by Boot loader utilitys or with identical function sets firmly
It is standby.Aforesaid plurality of processing unit, refers to that electronic installation 100 uses double-core (Dual Core) or multi-core processor (CPU),
Or with more than one CPU.Illustrated with double-core CPU below.
The electronic installation 100 is, for example, flash memory (flash) comprising a first processing units 1, a second processing unit 2,
Nonvolatile storage media 3, an and random access memory (RAM) 4.First, second processing unit 1,2 of the present embodiment is
Two arithmetic cores in the middle of dual core processors, the operational capability of first processing units 1 is relatively low, the work(with data and communication
Can, the operational capability of second processing unit 2 is higher, is used to process various application programs.But the present invention is not limited, can adopt identical
The arithmetic core of efficiency.
Stored in store media 3 a Boot loader utilitys, one mainly for the treatment of 3G communications protocol operation system
System, is claimed with OS_1 generations below, and one be, for example, the application layer such as Linux or Windows Mobile operating system, below with OS_
In 2 generations, claimed.
With reference to refering to Fig. 3 and Fig. 4, when electricity on electronic installation 100, first processing units 1 send out instruction, by this first
The exclusive virtual memory of processing unit 1 (virtual memory) 10 reads the Boot loader utilitys in store media 3
And start to perform.In Boot Loader implementation procedures, computer hardware initialization (step S1) can be completed.
To avoid first processing units 1 from directly starting to load OS_1 after computer hardware initialization has been performed, cause last
The second processing units 2 such as idle sky, the Boot Loader of the present embodiment make first processing units 1 perform computer hardware initialization
Afterwards, not only send signal and notify that second processing unit 2 carries out OS_2 cores (kernel) start (step S4), and the first treatment
Unit 1 itself referring also to default chained library (library) list preload the work (step in OS_2 partial links storehouse
S2).Foregoing " partial link storehouse " refers to the part in the middle of multiple chained libraries of operating system, certainly, can also be designed in implementation
It is the all-links storehouse of preloading operation system.
The present embodiment writes in the middle of Boot loader utilitys default chained library list, when first processing units 1 read
The instruction of chained library is preloaded, is then read chained library specified in the chained library list from store media 3.The link of reading
Storehouse is stored in the first logical address in an exclusive virtual memory of first processing units 1 10, actually loads RAM 4
In can image to first logical address physical address, the physical address again can image to the exclusive void of second processing unit 2
Intend the second logical address in memory 20, the second logical address is available for the calling of second processing unit in future 2 to use.First treatment
The method of chained library loading RAM 4 is included advance reading program (readahead), parsing program file header (parse by unit 1
Header), the mode of function/symbol reset position (function or symbolrelocation).
When the work that first processing units 1 preload chained library is completed, OS_1 loadings action (step S3) is then carried out.
Second processing unit 2 is received after notification instruction execution OS_2 cores start (step S4) of first processing units 1,
Whether the dynamic link library (Shared Library) required for judging has loaded, if being pre-loaded RAM 4,
Can footpath row reprocess next chained library, thus accelerate overall loading velocity (step S5).Certainly, if first processing units 1 are pre-
The all of chained library of OS_2 is carried, second processing unit 2 can then omit step S5, be directly entered step S6 and be patterned and use
The loading work of person's interface (UI).
In implementation, the default chained library list includes that OS_2 is whole or central partial link storehouse, by system developer
Determined according to physical condition.The parameter that determining chained library list must consider includes the effect of first processing units 1 and second processing unit 2
The time required to energy, resource distribution, chained library size, loading etc.；Certainly, it is also contemplated that the load time of OS_1, is opened with doing entirety
The estimation of machine time.It is noted that in addition to the preloading of chained library of OS_2, the present invention can also be designed and make the first treatment
Unit 1 preloads the dynamic link library used required for partial graphical User's Interface.
In sum, the technical scheme for being proposed by the present embodiment, second processing unit 2 loads the time of OS_2 chained libraries
Shorten, and then load the time of User's Interface ahead of time, shorten the overall available machine time, therefore the purpose of the present invention can be reached really.
The above, only presently preferred embodiments of the present invention, and the scope of present invention implementation can not be limited with this, i.e.,
The simple equivalence changes that all claims under this invention and invention description content are made and modification, all still belong to patent of the present invention
In the range of covering.
Claims (11)
1. a kind of parallelization quick start method, it is adaptable to the electronic installation with multiplied unit, comprises the steps of：
A () makes a first processing units of the electronic installation perform one can initialize the program of computer hardware；When initialization computer hardware
Complete, perform step (b) and (c)；
(b) first processing units from a store media by least one by the electronic installation an exclusive calling of second processing unit
The chained library for using is loaded into a random access memory；And
C () makes the core that the second processing unit performs an operating system start shooting, then from store media loading by itself
Remaining chained library of exclusive calling.
2. parallelization quick start method as claimed in claim 1, wherein, the chained library of the step (b) loading includes
At least part of chained library of one application layer operating system.
3. parallelization quick start method as claimed in claim 2, wherein, the chained library of the step (b) loading is also wrapped
Include at least part chained library used required for graphical user interface.
4. parallelization quick start method as claimed in claim 2, wherein, the program that can initialize computer hardware refers to Boot
Loader。
5. parallelization quick start method as claimed in claim 4, wherein, the first processing units are to write on Boot according to one
The default chained library list of Loader preload the work of chained library.
6. a kind of electronic installation with multiplied unit, comprising：
One store media, storage one can initialize the program and most chained libraries of computer hardware；
One random access memory；And
One first processing units and a second processing unit, when electricity on the electronic installation, the first processing units perform this can be just
The program of beginningization computer hardware, and when initialization computer hardware is completed, the first processing units are from the store media by wherein at least
One is loaded onto the random access memory, and the second processing unit by the exclusive chained library for using that calls of the second processing unit
The core start of an operating system is performed, is then loaded by remaining chain of the exclusive calling of second processing unit from the store media
Connect storehouse.
7. the electronic installation with multiplied unit as claimed in claim 6, wherein, the first processing units and second processing
Unit is two processing cores in the middle of a dual core processors or multi-core processor, or two processors.
8. the electronic installation with multiplied unit as claimed in claim 6, wherein, first processing units loading by this
The exclusive chained library for using that calls of second processing unit includes at least part of chained library of an application layer operating system.
9. the electronic installation with multiplied unit as claimed in claim 8, wherein, first processing units loading by this
The exclusive chained library for using that calls of second processing unit also includes at least part chain used required for graphical user interface
Connect storehouse.
10. the electronic installation with multiplied unit as claimed in claim 8, is an embedded system, and this can be initialized
The program of computer hardware refers to Boot Loader.
11. electronic installations with multiplied unit as claimed in claim 10, the first processing units are write on according to one
The default chained library list of Boot Loader preload the work of chained library.
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102929713A (en) * | 2012-10-08 | 2013-02-13 | 清华大学 | Loosely coupled heterogeneous multi-core processing system supporting parallelism of multiple operating systems |
| CN103514024B (en) * | 2013-10-24 | 2016-07-27 | 深圳中微电科技有限公司 | Quickly startup UI system and the quick start method of a kind of electrical equipment |
| CN103955376A (en) * | 2014-02-19 | 2014-07-30 | 熊猫电子集团有限公司 | Method for DSP (Digital Signal Processor) self-start secondary demand loading |
| CN107256143B (en) * | 2017-04-21 | 2023-09-12 | 海信视像科技股份有限公司 | Method for improving starting-up speed of android device and android device |
| US11144326B2 (en) | 2019-02-19 | 2021-10-12 | Cisco Technology, Inc. | System and method of initiating multiple adaptors in parallel |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1567187A (en) * | 2003-06-11 | 2005-01-19 | 华为技术有限公司 | Data processing system and method |
| CN101604252A (en) * | 2009-07-10 | 2009-12-16 | 深圳华为通信技术有限公司 | Multicomputer system and multicomputer system startup method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP4296996B2 (en) * | 2004-06-15 | 2009-07-15 | 富士通株式会社 | Multi-core processor control system |
| JP5028904B2 (en) * | 2006-08-10 | 2012-09-19 | ソニー株式会社 | Electronic device and starting method |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1567187A (en) * | 2003-06-11 | 2005-01-19 | 华为技术有限公司 | Data processing system and method |
| CN101604252A (en) * | 2009-07-10 | 2009-12-16 | 深圳华为通信技术有限公司 | Multicomputer system and multicomputer system startup method |
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