CN101593682B - Ion implantation method and manufacturing method of semiconductor device - Google Patents
Ion implantation method and manufacturing method of semiconductor device Download PDFInfo
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- CN101593682B CN101593682B CN200810112805A CN200810112805A CN101593682B CN 101593682 B CN101593682 B CN 101593682B CN 200810112805 A CN200810112805 A CN 200810112805A CN 200810112805 A CN200810112805 A CN 200810112805A CN 101593682 B CN101593682 B CN 101593682B
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Abstract
An ion implantation method comprising the following steps: providing a semiconductor substrate; forming a photoresist layer on the semiconductor substrate; patterning the photoresist layer to form an opening which is provided with inclined sidewall and used for defining an ion implantation region in the semiconductor substrate; implanting ion on the semiconductor substrate at the bottom of the opening; wherein, the included angel between the sidewall and the surface of the region to be implanted is an obtuse angle. The invention also provides a manufacturing method of semiconductor device and can reduce or eliminate ions implanted in the semiconductor substrate caused by scatting of the photoresist layer of the ion during the ion implantation.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, the manufacturing approach of particularly a kind of ion injection method and semiconductor device.
Background technology
Metal oxide semiconductor device is widely used in fields such as computer, communication, storage owing to its low-power consumption, fast response characteristic.Typical metal oxide semiconductor device comprises grid, source electrode and drain electrode.For improving the performance of metal oxide semiconductor device electricity aspect, the metal oxide semiconductor transistor that has also has drain electrode elongated area (Drain extend region).
Source electrode, drain electrode and above-mentioned drain electrode elongated area generally form through ion implantation technology; Thereby; The electrology characteristic of the source electrode that the process conditions decision of ion injection forms, drain electrode and drain electrode elongated area, and then the electric property of the metal oxide semiconductor device of decision formation.Can adjust the performance of the metal oxide semiconductor device of formation through the process conditions of adjustment ion injection.For example, be US 6,767 in the patent No.; In the United States Patent (USP) of 778 B2, disclose source electrode and the formation method of drain electrode in a kind of metal oxide semiconductor device, formed source electrode and drain electrodes through two step ion implantation technologies; The energy of the second step ion implantation technology is big than the first step, and dosage is less, reduces the ion concentration gradient of source-drain electrode and Semiconductor substrate intersection with this; Thereby reduce the junction capacitance of source electrode and drain electrode, improve the performance of the semiconductor device that forms.
Existing ion implantation technology generally need form litho pattern through photoetching process on semiconductor device, go out to treat injection zone with definition (or qualification), in ion implantation device, carries out ion implantation technology then, in treating injection zone, injects object ion.Fig. 1 to Fig. 3 is the profile of each step corresponding structure of existing a kind of ion implantation technology.
Please refer to Fig. 1, on Semiconductor substrate 10, form photoresist layer 12.
Please refer to Fig. 2, in said photoresist layer 12, form opening 14 through photoetching process, said opening 14 bottoms are for treating injection zone, and this zone can be used to form source electrode, drain electrode or well region etc.
Please refer to Fig. 3, said Semiconductor substrate 10 is placed ion implantation device, carry out ion implantation technology, in the Semiconductor substrate 10 of said open bottom, inject object ion, form doped region.And said Semiconductor substrate 10 other zones can not be injected into ion owing to covered by photoresist layer.
In the described ion implantation technology, elder generation defines through photoresist layer 12 and treats injection zone, and then carries out ion and inject, and the ion of injection is to be implanted in quilt with the fixing angle (for example 90 degree) in the surface of Semiconductor substrate 10.Yet; In described ion implantation technology; Scattering can take place and change angle in the part ion that bombards in the photoresist layer 12 beyond said opening 14 zones, and passes said photoresist layer 12 along the sidewall of said opening 14, and then is implanted in the said Semiconductor substrate 10; This not only makes the ion dose of the injection in the Semiconductor substrate 10 that variation has taken place; And because the uncertainty of scattering angle makes the ion that is injected in the Semiconductor substrate 10 no longer be limited to the zone of opening 14 bottoms, and then influences the characteristic of the metal oxide semiconductor device that forms.
For example, to metal oxide semiconductor device, when carrying out source electrode with the drain electrode injection; Have part ion and enter into photoresist layer 20, and produce scattering with molecular action in the photoresist layer 20, the ion that is scattered can pass after the said photoresist layer 20; Enter into the Semiconductor substrate 10 of said grid below 22, make the zone of source electrode and drain electrode enlarge, the conducting channel zone diminishes; The threshold voltage and the saturation current of the semiconductor device that influence forms are shown in the sketch map of Fig. 4.
Summary of the invention
The present invention provides the manufacturing approach of a kind of ion injection method and semiconductor device, to improve in the existing ion implantation technology scattering of photoresist layer intermediate ion to the influence to ion implantation technology.
A kind of ion injection method provided by the invention comprises: Semiconductor substrate is provided; On said Semiconductor substrate, form anti-reflecting layer; On said Semiconductor substrate, form photoresist layer; Graphical said photoresist layer is formed for defining the opening of Semiconductor substrate intermediate ion injection zone, and the sidewall of said opening tilts; Semiconductor substrate to said open bottom is carried out ion implantation technology; Wherein, said sidewall and said treats that the angle on injection zone surface is the obtuse angle, is passed by said opening sidewalls and is injected into the ion in the Semiconductor substrate of open bottom to reduce or eliminate in the ion implantation technology; Said anti-reflecting layer is used for stopping that the ion that passes said opening sidewalls enters into Semiconductor substrate.
Optional, graphical said photoresist layer, the step that forms said opening is following:
The Semiconductor substrate that will have said photoresist layer places exposure sources; Select the focal length that departs from the optimum exposure focal length for use, said photoresist layer is made public through mask plate with patterns of openings; Photoresist layer to accomplishing exposure is carried out developing process; After executing said developing process, said photoresist layer is carried out baking process.
Optional, through adjustment exposure focal length, make said photoresist layer surface carry out exposure technology towards the imaging len deviation in driction focussing plane of exposure sources, make the said opening of formation have angled side walls.
Optional, through the temperature of adjustment baking process, the temperature of the baking of the temperature that makes described baking process when forming vertical sidewall is carried out baking process, makes the said opening of formation have angled side walls.
Optional; Make the imaging len deviation in driction focussing plane of said photoresist layer surface through the adjustment exposure equipment focal distance towards exposure sources; The method that the temperature of the baking of the temperature that makes described baking process with the temperature of adjustment baking process when forming vertical sidewall combines makes said opening have angled side walls.
Optional, before said formation photoresist layer, on said Semiconductor substrate, form resilient coating earlier.
Optional, said angle greater than 90 ℃ less than 120 ℃.
Optional, said ion implantation technology is the ion implantation technology of source electrode and drain ion injection technology, trap ion implantation technology, lightly doped drain ion implantation technology, adjustment threshold voltage or the ion implantation technology of improving breakdown characteristics.
The present invention also provides a kind of manufacturing approach of semiconductor device, comprises ion implantation technology, and at least one ion implantation technology is the described ion injection method of above-mentioned arbitrary technical scheme.
Compared with prior art, one of them of technique scheme has the following advantages:
Before carrying out ion implantation technology; Have opening sloped sidewall, that be used to define injection zone through photoetching process formation, when carrying out ion implantation technology, can increase the ion scattering probability that enters into said photoresist layer; Ion towards said opening sidewalls scattering can be taken place twice or repeatedly scattering; This can reduce to be scattered ion energy on the one hand, its speed of in photoresist layer, moving is descended, to such an extent as to some ion can not pass this photoresist layer; Can change the ion scattering angle on the other hand, it can not passed by said opening sidewalls; Thereby can reduce or eliminate in the ion implantation technology and to pass by said opening sidewalls and be injected into the ion in the Semiconductor substrate of open bottom; Make the dosage of the ion that injects in the Semiconductor substrate and the regional controllability of injection improve; And then the electric property of the feasible semiconductor device that forms improves the electrical stability increase;
In addition, also make this ion implantation technology repeatability improve, the yield of the semiconductor device of formation promotes.
Description of drawings
Fig. 1 to Fig. 3 is the profile of each step corresponding structure of existing a kind of ion implantation technology;
Fig. 4 passes the sketch map that photoresist layer enters into the Semiconductor substrate below the grid afterwards for the ion that is scattered in the existing ion implantation technology;
Fig. 5 is the flow chart of the embodiment of ion implantation technology of the present invention;
Fig. 6 to Fig. 9 is the generalized section of each step corresponding structure of the embodiment of application ion implantation technology formation source electrode of the present invention and drain electrode.
Embodiment
Do detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
In the manufacturing approach of metal oxide semiconductor device, need the multistep ion implantation technology, for example well region (N trap or P trap) formation, source-drain electrode formation, lightly doped region formation etc. all need realize through ion implantation technology.Ion implantation technology has critical role in the manufacturing process of metal oxide semiconductor device.
The process conditions of ion implantation technology have bigger influence to the electric property of the metal oxide semiconductor device of formation; How to pass through control, adjustment and change the ion implantation technology condition; Make the ion that injects after the ion implantation technology can reach target dose; And being positioned at the target area, so that the electrology characteristic in the ion implanted region territory that forms satisfies the needs of the metal oxide semiconductor device that forms, is the problem that those skilled in the art have to face.
The present invention provides a kind of ion injection method; Through on Semiconductor substrate, forming photoresist layer; Then said photoresist is carried out graphically, formation has opening sloped sidewall, that be used to define Semiconductor substrate intermediate ion injection zone, carries out corresponding ion implantation technology again; Wherein, described sidewall and said treats that the angle on injection zone surface is the obtuse angle.
Because described opening has angled side walls; When carrying out ion implantation technology; Can increase the ion scattering probability that enters into said photoresist layer, the ion towards said opening sidewalls scattering can be taken place twice or repeatedly scattering, this can reduce to be scattered ion energy on the one hand; Some ion its speed of in photoresist layer, moving descended, to such an extent as to can not pass this photoresist layer; Can change the ion scattering angle on the other hand, it can not passed by said opening sidewalls.That is to say; Core of the present invention is when carrying out ion implantation technology; The opening that is used to define the ion implanted region territory has sloped sidewall, is passed by said opening sidewalls and is injected into the ion in the Semiconductor substrate of open bottom thereby can reduce or eliminate in the ion implantation technology, makes the dosage of the ion that injects in the Semiconductor substrate and the regional controllability of injection improve; And then the electric property of the feasible semiconductor device that forms improves the electrical stability increase.
Below in conjunction with flow chart and profile ion injection method of the present invention is described in detail.
Fig. 5 is the flow chart of the embodiment of ion injection method of the present invention.
Please refer to Fig. 5, step S100 provides Semiconductor substrate.Step S110 forms photoresist layer on said Semiconductor substrate.Step S120, graphical said photoresist layer, formation has opening angled side walls, that be used to define Semiconductor substrate intermediate ion injection zone; Wherein, said sidewall and said treats that the angle on injection zone surface is the obtuse angle.Step S130 carries out ion implantation technology to the Semiconductor substrate of said open bottom.
Be that example is explained ion injection method of the present invention with the source electrode of NMOS and the ion implantation technology of drain electrode below.Should be noted that; Ion injection method of the present invention is not limited to nmos source described below and drain ion injection technology; Can also be applied to the ion implantation technology of pmos source and drain electrode; Or in other the ion implantation technology that needs photoresist pattern definition injection zone in the manufacturing process of metal oxide semiconductor device; For example, the ion implantation technology of trap ion implantation technology, lightly doped drain ion implantation technology, adjustment threshold voltage or improve the ion implantation technology etc. of breakdown characteristics; Those skilled in the art can instruction according to the present invention be applied to the step of other ion injection, and make corresponding change, and these all should be included among protection scope of the present invention.
Please refer to Fig. 6, Semiconductor substrate 100 is provided, described Semiconductor substrate 100 can be monocrystalline silicon, polysilicon or amorphous silicon; Said Semiconductor substrate 100 also can be silicon, germanium, GaAs or silicon Germanium compound; This Semiconductor substrate 100 can also have epitaxial loayer or insulating barrier silicon-on.Described Semiconductor substrate 100 can also be other semi-conducting material, enumerates no longer one by one here.
In said Semiconductor substrate 100, has P trap 102; Said P trap 102 can use the method for those skilled in the art institute convention to form, and for example, on Semiconductor substrate 100, defines the zone that forms P trap 102 through photoetching process earlier; Carrying out ion then injects; Form P trap 102, the ion of injection is P type ion, for example boron;
Optional, can also in said P trap 102, improve the ion implantation technology of breakdown characteristics; The ion that the ion of its injection injects when forming said P trap 102 is identical, but the energy that injects and dosage are all less than the energy and the dosage of the ion implantation technology of the said P trap 102 of formation.
Optional, can also in said P trap 102, adjust the ion implantation technology of threshold voltage.The ion implantation technology of this adjustment threshold voltage is used to adjust the threshold voltage of the nmos pass transistor of formation, and the ion of its injection is identical with the ion that preceding twice ion injection technology is injected; Or the ionic type identical (being all the P type) of the ion that injects and preceding twice ion injection technology injection, and can be ion of the same race, for example boron; The ion that injects in the ion implantation technology of this adjustment threshold voltage also can be the bigger ion of quality, for example indium.
After accomplishing above-mentioned ion implantation technology, remove the photoresist layer (figure does not show) that on said Semiconductor substrate 100, forms in the photoetching process through ashing and wet-cleaned.
In addition, the formation technology of said P trap 102 also can adopt ion implantation technology of the present invention, promptly on said Semiconductor substrate 100, forms photoresist layer, and graphical formation has opening sloped sidewall, definition P well area 102; And then execution P trap ion implantation technology.Wherein, the method that forms beveled realizes that through the focal length that makes public in the adjustment photoetching process and hard roasting (hard bake) technology behind the developing process concrete description is referring to the follow-up source electrode and the ion implantation technology of drain electrode, and its principle is identical.
In said Semiconductor substrate 100, also have fleet plough groove isolation structure 104, can adopt the described fleet plough groove isolation structure 104 of technology of those skilled in the art institute convention, repeat no more here.
On said Semiconductor substrate 100, has gate dielectric layer 106a; Said gate dielectric layer 106a can be silica or silicon oxynitride; Its formation method can adopt the oxidation technology of those skilled in the art institute convention; For example high temperature furnace pipe oxidation, rapid thermal oxidation or original position steam produce (In-Situ Stream Generation, ISSG) oxidation technology; Can form silicon oxynitride through said silica is carried out nitrogen treatment, said nitrogenation treatment technology can be a kind of in boiler tube nitrogenize, Rapid Thermal Nitrided, the pecvd nitride (for example DPN).Here no longer launch.
On said gate dielectric layer 106a, have polysilicon gate 108a, be the resistivity of the grid of the metal oxide semiconductor device that reduce to form, can mix to said polysilicon gate 108a through ion injection or diffusion or original position ion implantation technology.In addition, the grid on the said gate dielectric layer 106a can be not limited to polycrystalline silicon material, also can be other material, for example metal material or metal silicide materials etc.
In the Semiconductor substrate 100 of said grid 108a both sides, have lightly doped region 110, said lightly doped region 110 can be through lightly doped drain (Light Doped Drain, LDD) the injection technology formation of convention.Also can form through ion implantation technology of the present invention; Also promptly before carrying out the light dope injection; Have opening sloped sidewall, that be used to define lightly doped region 110 through photoetching process formation earlier, no longer launch here to describe, wherein; The method that formation has a sloped sidewall opening please refer to the manufacturing approach of the opening in the ion injection method of follow-up source electrode and drain electrode, and its principle is identical.
Has side wall layer 116 at said gate lateral wall; This side wall layer 116 can be silicon nitride, silica, silica-silicon nitride (O-N) lamination or silica-silicon-nitride and silicon oxide (ONO) lamination; Can adopt the technology of those skilled in the art institute convention to form said side wall layer 116, no longer launch here.
Then, please refer to Fig. 7, on Semiconductor substrate shown in Figure 6 100, form photoresist layer 200.Said photoresist layer 200 can be chemically-amplified resist or other photoresist; Can adopt the spin coating method of those skilled in the art institute convention in spin-coating equipment, to form photoresist layer 200; And after spin coating; Remove solvent in the photoresist layer 200 through baking process, increase the adhesion property of described photoresist layer 200 on said Semiconductor substrate 200 surfaces.
Then, please refer to Fig. 8, form opening 204 through exposure and developing process, wherein said opening 204 (combining said grid 108a and side wall layer 116 in the present embodiment) is used to define the zone that forms source electrode and drain electrode.Wherein, said opening 204 has angled side walls 205, and said sidewall 205 is the obtuse angle with the said angle 206 of ion implanted region field surface 101 (being the surface of source electrode to be formed and drain region) of treating.For example, said angle greater than 90 ℃ less than 120 ℃.
Among the embodiment therein, the concrete steps of described exposure and developing process are following: the Semiconductor substrate 100 that will have said photoresist layer 200 places exposure sources; Select suitable exposure focal length for use, said photoresist layer 200 is made public through mask plate with patterns of openings; Photoresist layer 200 to accomplishing exposure is carried out developing process; After executing said developing process, said photoresist layer 200 is carried out baking process.
Because in exposure technology; The focal length of exposure sources can influence the side wall profile that forms opening, places optimum exposure position (focussing plane) to make public and the opening that forms has vertical or subvertical side wall profile (with the Surface Vertical of said Semiconductor substrate 100) on the surface of photoresist layer.And make public when departing from said optimum exposure position in the surface of photoresist layer and the opening that forms can have the angled side walls profile, and upwards depart from different from the angle of the side wall profile that forms with downward bias.Thereby, among the embodiment therein, can utilize this principle to form to have the opening 204 of sloped sidewall 205 profiles; Concrete, when exposure, adjustment exposure focal length; Made public towards imaging len (Lens) the deviation in driction focussing plane of exposure sources in said photoresist layer 200 surfaces, and can form the opening with sloped sidewall 205 204 that meets the demands through developing, and far away more at this deviation in driction focussing plane; Described angle 206 is big more; Thereby, can control the size of said angle 206 through the distance that departs from focussing plane, form the opening 204 of different sloped sidewalls 205.
In addition, after the developing process, also have baking (or being called hard roasting Hard bake) technology, and the temperature of baking can influence side wall profile 205 inclinations angle (being said angle 206) of said opening 204.Thereby, in a further embodiment, can utilize this principle, the temperature of adjustment baking makes said opening 204 have sloped sidewall 205, and is concrete, the temperature of the baking of the temperature that makes described baking process when forming vertical sidewall.Make the sidewall of said opening 204 have sloped sidewall 205.
In addition; In other enforcement; Can make the imaging len deviation in driction focussing plane of said photoresist layer surface through the adjustment exposure equipment focal distance towards exposure sources; The method that the temperature of the baking of the temperature that makes described baking process with the temperature of adjustment baking process when forming vertical sidewall combines makes described opening 204 have angled side walls 205, repeats no more here.
Form after the said opening 204, please refer to Fig. 9, the Semiconductor substrate 101 of said open bottom is carried out ion implantation technology, in the Semiconductor substrate 100 of said grid 108a both sides, form source electrode 118a and drain electrode 118b.
Because described opening 204 has angled side walls; When carrying out said ion implantation technology, can increase the scattering probability of the ion that enters into said photoresist layer 200, please refer to Fig. 9; Ion towards 205 scatterings of said opening 204 sidewalls can take place twice or repeatedly scattering; This can reduce to be scattered ion energy on the one hand, its speed of in photoresist layer, moving is descended, to such an extent as to some ion can not pass this photoresist layer 200; Can change the ion scattering angle on the other hand, it can not passed by said opening 204 sidewalls 205.Thereby can reduce or eliminate in the ion implantation technology and to pass by said opening 204 sidewalls 205 and be injected into the ion in the Semiconductor substrate 100 of opening 204 bottoms; The dosage of the ion that injects in the Semiconductor substrate 100 and the regional controllability of injection are improved; Make the electrology characteristic of the source electrode 118a that forms and the 118b that drains improve; And then the electric property of the feasible semiconductor device that forms improves the electrical stability increase.In addition, also make this ion implantation technology repeatability improve, the yield of the semiconductor device of formation promotes.
After accomplishing said ion implantation technology, remove said photoresist layer 200, repeat no more here.
In a further embodiment; Can also be before forming photoresist layer 200; On said Semiconductor substrate 100, form anti-reflecting layer (not shown), after forming said opening 204, said anti-reflecting layer is positioned at the bottom of said opening 204; The ion that also can stop the sidewall 205 that passes said opening 204 enters into Semiconductor substrate 100, no longer gives unnecessary details here.
In a further embodiment; Before forming said photoresist layer, can form resilient coating (not shown) at said semiconductor substrate surface earlier, for example said resilient coating can be a silicon oxide layer; After forming said opening 204; Said resilient coating is positioned at said opening 204 bottoms, can stop that the ion of the sidewall 205 that passes said opening 204 enters into Semiconductor substrate 100, no longer gives unnecessary details here.
In a further embodiment, before forming said photoresist, form resilient coating at said semiconductor substrate surface earlier, form anti-reflecting layer at said buffer-layer surface again, form said photoresist layer 200 then.Here no longer launch to discuss.
Ion implantation technology of the present invention can be applicable to have in the manufacturing approach of semiconductor device of ion implantation technology, no longer launches here to discuss.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting the present invention; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (9)
1. an ion injection method is characterized in that, comprising:
Semiconductor substrate is provided;
On said Semiconductor substrate, form anti-reflecting layer;
On said Semiconductor substrate, form photoresist layer;
Graphical said photoresist layer is formed for defining the opening of Semiconductor substrate intermediate ion injection zone, and the sidewall of said opening tilts;
Semiconductor substrate to said open bottom is carried out ion implantation technology;
Wherein, said sidewall is the obtuse angle with the angle of treating injection zone surface, is passed by said opening sidewalls and is injected into the ion in the Semiconductor substrate of open bottom to reduce or eliminate in the ion implantation technology; Said anti-reflecting layer is used for stopping that the ion that passes said opening sidewalls enters into Semiconductor substrate.
2. ion injection method as claimed in claim 1 is characterized in that, graphical said photoresist layer, and the step that forms said opening is following:
The Semiconductor substrate that will have said photoresist layer places exposure sources;
Select the focal length that departs from the optimum exposure focal length for use, said photoresist layer is made public through mask plate with patterns of openings;
Photoresist layer to accomplishing exposure is carried out developing process;
After executing said developing process, said photoresist layer is carried out baking process.
3. ion injection method as claimed in claim 2; It is characterized in that; Through adjustment exposure focal length, make said photoresist layer surface carry out exposure technology towards the imaging len deviation in driction focussing plane of exposure sources, make the said opening of formation have angled side walls.
4. ion injection method as claimed in claim 2; It is characterized in that; Through the temperature of adjustment baking process, the temperature of the baking of the temperature that makes described baking process when forming vertical sidewall is carried out baking process, makes the said opening of formation have angled side walls.
5. ion injection method as claimed in claim 2; It is characterized in that; Make the imaging len deviation in driction focussing plane of said photoresist layer surface through the adjustment exposure equipment focal distance towards exposure sources; The method that the temperature of the baking of the temperature that makes described baking process with the temperature of adjustment baking process when forming vertical sidewall combines makes said opening have angled side walls.
6. like the described ion injection method of the arbitrary claim of claim 1 to 5, it is characterized in that: before said formation photoresist layer, on said Semiconductor substrate, form resilient coating earlier.
7. like the described ion injection method of the arbitrary claim of claim 1 to 5, it is characterized in that: said angle greater than 90 ℃ less than 120 ℃.
8. ion injection method as claimed in claim 1 is characterized in that: said ion implantation technology is the ion implantation technology of source electrode and drain ion injection technology, trap ion implantation technology, lightly doped drain ion implantation technology, adjustment threshold voltage or the ion implantation technology of improving breakdown characteristics.
9. the manufacturing approach of a semiconductor device comprises ion implantation technology, it is characterized in that, at least one ion implantation technology is the described ion injection method of the arbitrary claim of claim 1 to 8.
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| CN102117742B (en) * | 2010-01-05 | 2013-03-13 | 上海华虹Nec电子有限公司 | Method for reinforcing capability of blocking tilt angle ion injection |
| CN103337482A (en) * | 2013-06-17 | 2013-10-02 | 上海集成电路研发中心有限公司 | Static random access memory transistor unit manufacturing method capable of adjusting threshold voltage |
| US9660603B2 (en) * | 2015-04-09 | 2017-05-23 | Texas Instruments Incorporated | Sloped termination in molybdenum layers and method of fabricating |
| US9524881B2 (en) * | 2015-04-30 | 2016-12-20 | Texas Instruments Incorporated | Method for fabricating specific termination angles in titanium tungsten layers |
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| CN1382268A (en) * | 1999-08-12 | 2002-11-27 | 科莱恩金融(Bvi)有限公司 | Antireflective coating material for photoresists |
| CN1497679A (en) * | 2002-10-08 | 2004-05-19 | ���µ�����ҵ��ʽ���� | Manufacturing method of semiconductor device |
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| CN1382268A (en) * | 1999-08-12 | 2002-11-27 | 科莱恩金融(Bvi)有限公司 | Antireflective coating material for photoresists |
| CN1497679A (en) * | 2002-10-08 | 2004-05-19 | ���µ�����ҵ��ʽ���� | Manufacturing method of semiconductor device |
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| JP昭60-249368A 1985.12.10 |
| JP特开平8-22965A 1996.01.23 |
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