CN101567353A - Ball grid array base plate and manufacturing method thereof - Google Patents
Ball grid array base plate and manufacturing method thereof Download PDFInfo
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- CN101567353A CN101567353A CN 200810095329 CN200810095329A CN101567353A CN 101567353 A CN101567353 A CN 101567353A CN 200810095329 CN200810095329 CN 200810095329 CN 200810095329 A CN200810095329 A CN 200810095329A CN 101567353 A CN101567353 A CN 101567353A
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- contact pad
- base plate
- grid array
- substrate
- array base
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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Abstract
The invention provides a ball grid array base plate and a manufacturing method thereof. The ball grid array base plate comprises a substrate, a contact welding pad, a solder mask and a salient point, wherein the contact welding pad is arranged on the substrate; the solder mask is formed on the substrate and the contact welding pad and provided with an opening part exposing one part of the contact welding pad; and the salient point is formed on the opening part exposing the contact welding pad by plating. With the method of prearranging the salient point on the substrate, the solder ball surface mount technology in the manufacturing process of the ball grid array base plate can be omitted so that technological processes are simplified and manufacturing costs are reduced.
Description
Technical field
The present invention relates to a kind of ball grid array base plate and manufacture method thereof, specifically, relate to a kind of ball grid array base plate and manufacture method thereof that on pad, presets salient point by plating.
Background technology
Ball grid array (BGA) encapsulation technology is a kind of surface attaching type encapsulation, and it replaces traditional lead-in wire by producing spherical salient point (ball bump) at the back side of substrate by array way, makes that the integrated level of semiconductor device is higher, performance is better.The BGA encapsulation technology can increase significantly device the I/O number of pins, reduce solder pad space length, and then dwindle the size of packaging part, the footprint of saving encapsulation, thereby make the microminiaturization of high density such as PC chipset, microprocessor, high-performance, many pin package device become possibility.
In the manufacture process of BGA substrate, mount (solder ball attachment) technology at mould envelope (molding) substrate surface afterwards by soldered ball usually and form salient point.But,, also more and more higher to the requirement of soldered ball attachment process along with reducing of the increasing of I/O pin number, solder pad space length.And the scaling powder (flux) that soldered ball mounts in the process and adopted influences the q﹠r of (reflow) back salient point that refluxes, and can have fall ball problems such as (missing ball) in subordinate's interconnection process.
No. 2007/0020906 U.S. Patent Publication the formation method of the higher bump structure of a kind of reliability.Fig. 1 shows the suprabasil bump structure of being made by this method of semiconductor.Its metal layer at top 4 is arranged at the semiconductor-based end (chip) 2, and first passivation layer 6 is formed on the surface and metal layer at top 4 at the semiconductor-based end 2, and has a plurality of first openings of exposed tops metal level 4.Wherein, described a plurality of first opening carries out patterning by traditional photoetching process to first passivation layer 6 and etching is formed on first passivation layer 6.And contact pad 8 is formed on the top of first passivation layer 6, deposition second passivation layer 10 on these contact pad 8 surfaces, and by second passivation layer 10 being carried out patterning and etching forms a plurality of second openings, to expose the part of contact pad 8.In addition, metal under the salient point (UBM, under bump metallurgy) layer 12 is arranged on a plurality of second openings of second passivation layer 10 and contact pad 8.Salient point 13 is formed on the UMB layer 12, and this salient point 13 forms in the following manner: form the photoresist layer on UBM layer 12, and this photoresist layer is carried out patterning and etching, to form the 3rd opening that at least one covers contact pad 8 substantially; Then, deposits conductive material on the 3rd opening utilizes this electric conducting material to come etching UBM layer 12 as mask; At last, electric conducting material is carried out reflow treatment, finally form salient point 13.The salient point of being made by this method 13, owing to be formed on the UBM layer, and salient point 13 closely contacts with UBM layer 12, so comprise that the bump structure quality of salient point 13 and UBM layer 12 is good, reliability is high.However, because the manufacturing process of the disclosed bump structure of this United States Patent (USP) is comparatively complicated, cost is higher, thereby be not suitable for presetting technology at the scolder of the BGA product of thin space (finepitch).
Summary of the invention
The invention provides and a kind ofly on pad, preset the ball grid array base plate and the manufacture method thereof of salient point, thereby overcome the one or more technical problems in the above-mentioned technical problem by electroplating.
According to an aspect of the present invention, a kind of ball grid array base plate comprises: substrate; Contact pad, described contact pad are arranged in the described substrate; Solder mask, described solder mask are formed on described substrate and the described contact pad, and have the opening portion of a part that exposes described contact pad; Salient point is formed on by plating on the contact pad of described opening portion exposure.Described ball grid array base plate also can comprise the coating that is formed between described contact pad and the described salient point.Described salient point can be formed directly on the contact pad of described opening portion exposure, and can be formed by unleaded bianry alloy scolder, and described unleaded bianry alloy scolder can be Sn-Cu alloy or Sn-Ag alloy.
According to a further aspect in the invention, a kind of manufacture method of ball grid array base plate may further comprise the steps: contact pad is set in substrate; On described substrate and described contact pad, deposit solder mask, and described solder mask is carried out patterning and etching, with the opening portion of the part that is formed for exposing described contact pad; On the contact pad that described opening portion exposes, electroplate scolder, have certain thickness solder layer with formation; Described solder layer is carried out reflow treatment, to form salient point.Described manufacture method also can may further comprise the steps: be provided with in described substrate after the described contact pad and before the described solder mask of deposition on described substrate and the described contact pad, on described contact pad coating be set.Described salient point can be formed directly on the contact pad of described opening portion exposure.Described scolder can comprise unleaded bianry alloy scolder, and described unleaded bianry alloy scolder can be Sn-Cu alloy or Sn-Ag alloy.
Description of drawings
Fig. 1 is the cutaway view at the suprabasil bump structure of semiconductor according to prior art.
Fig. 2 A to Fig. 2 C is the cutaway view that illustrates according to the manufacture method of the BGA substrate of the embodiment of the invention.
Fig. 3 A to Fig. 3 C illustrates the cutaway view of the manufacture method of BGA substrate according to another embodiment of the present invention.
Embodiment
Now, with embodiments of the present invention is described in detail, embodiments of the invention have been shown in the accompanying drawing.In the accompanying drawings, identical label is represented components identical all the time.
Fig. 2 A to Fig. 2 C shows the manufacture method according to the BGA substrate of the embodiment of the invention.At first, with reference to Fig. 2 A, contact pad 7 is set in substrate 1, substrate 1 can be made by organic material, and contact pad 7 can be formed by material well known in the art (for example, copper (Cu) etc.).One or more electric conducting materials of deposition on contact pad 7, to form coating 14, wherein, coating 14 can be single or multiple lift.Coating 14 is coating well known in the art, with contact pad 7 the good electrical contact characteristic is arranged.Shown in Fig. 2 A, coating 14 is double-decker, comprises 14a of lower floor and upper strata 14b.For example, the 14a of lower floor is nickel (Ni) layer, and upper strata 14b is gold (Au) layer.Then, deposition solder mask 9 then, carries out patterning and etching to solder mask 9 on the surface that comprises coating 14 of substrate 1, to form the predetermined portions that opening portion 15 exposes coating 14 on coating 14.
Then, with reference to Fig. 2 B,, form the solder layer 16 of expectation thickness by electroplating deposit solder on the coating 14 that opening portion 15 exposes.Here, used scolder is unleaded bianry alloy scolder, is preferably the basic bianry alloy scolder of tin (Sn).Sn base bianry alloy is a binary eutectic alloy, comprises Sn-Cu, Sn-Ag etc.Preferably, for Sn-Cu bianry alloy scolder, the content of Cu is 0.2%～0.9%; For Sn-Ag bianry alloy scolder, the content of Ag is 3.5%, i.e. Sn-3.5Ag.Those skilled in the art can control accurately to composition, coating inclusion content, deposition current, deposition voltage, the bath temperature of electroplate liquid, thereby composition and thickness to solder layer 16 are controlled accurately, concrete thickness can be waited to determine according to the pin situation of product and the dimensional requirement of spacing by those skilled in the art, thereby obtain expecting the solder layer 16 of thickness, realize presetting of scolder.At last,, solder layer 16 is carried out reflow treatment,, be used for subordinate's interconnection or mount (for example, mounting PCB) in substrate 1, to form salient point 11 with reference to Fig. 2 C.
Below with reference to Fig. 3 A and Fig. 3 C the manufacture method of BGA substrate according to another embodiment of the present invention is described.
Fig. 3 A to Fig. 3 C shows the manufacture method of BGA substrate according to another embodiment of the present invention.Be not provided with the coating except salient point 11 being set directly on the contact pad 7, the manufacture method of the BGA substrate shown in Fig. 3 A to Fig. 3 C is basic identical with the manufacture method of the BGA substrate of describing with reference to Fig. 2 A to Fig. 2 C.Therefore, the manufacture method of BGA has been omitted the step that coating is set according to another embodiment of the present invention, with the solder layer Direct Electroplating on contact pad, thereby simplified manufacturing process with respect to the embodiment that reference Fig. 2 A to Fig. 2 C describes.
The manufacture method of BGA substrate according to the above embodiment of the present invention can be used for the one-level encapsulation or the secondary encapsulation of thin space BGA product.As mentioned above, carry out a reflow treatment then by the certain thickness solder layer of plating on contact pad and realize presetting of salient point, can realize the accurate control of salient point alloy mass, exempt the technology that soldered ball mounts in the manufacture process, thereby avoided the welding point defect that brings because of the soldered ball attachment process.Simultaneously, simplify the manufacturing process flow of BGA substrate, reduced manufacturing cost.
Claims (10)
1, a kind of ball grid array base plate comprises:
Substrate;
Contact pad, described contact pad are arranged in the described substrate;
Solder mask, described solder mask are formed on described substrate and the described contact pad, and have the opening portion of a part that exposes described contact pad;
Salient point is formed on by plating on the contact pad of described opening portion exposure.
2, ball grid array base plate as claimed in claim 1 is characterized in that, described ball grid array base plate also comprises the coating that is formed between described contact pad and the described salient point.
3, ball grid array base plate as claimed in claim 1 is characterized in that, described salient point is formed directly on the contact pad of described opening portion exposure.
4, ball grid array base plate as claimed in claim 1 is characterized in that, described salient point is formed by unleaded bianry alloy scolder.
5, ball grid array base plate as claimed in claim 4 is characterized in that, described unleaded bianry alloy scolder is Sn-Cu alloy or Sn-Ag alloy.
6, a kind of manufacture method of ball grid array base plate may further comprise the steps:
Contact pad is set in substrate;
On described substrate and described contact pad, deposit solder mask, and described solder mask is carried out patterning and etching, with the opening portion of the part that is formed for exposing described contact pad;
On the contact pad that described opening portion exposes, electroplate scolder, have certain thickness solder layer with formation;
Described solder layer is carried out reflow treatment, to form salient point.
7, manufacture method as claimed in claim 6 is characterized in that, described manufacture method is further comprising the steps of:
In described substrate, be provided with after the described contact pad and before the described solder mask of deposition on described substrate and the described contact pad, on described contact pad, coating be set.
8, manufacture method as claimed in claim 6 is characterized in that, described salient point is formed directly on the contact pad of described opening portion exposure.
9, manufacture method as claimed in claim 6 is characterized in that, described scolder comprises unleaded bianry alloy scolder.
10, manufacture method as claimed in claim 9 is characterized in that, described unleaded bianry alloy scolder is Sn-Cu alloy or Sn-Ag alloy.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200810095329 CN101567353A (en) | 2008-04-25 | 2008-04-25 | Ball grid array base plate and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200810095329 CN101567353A (en) | 2008-04-25 | 2008-04-25 | Ball grid array base plate and manufacturing method thereof |
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| CN101567353A true CN101567353A (en) | 2009-10-28 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102709197A (en) * | 2012-06-21 | 2012-10-03 | 清华大学 | Technical method for packaging salient point of welded ball based on substrate etching mode |
| CN104603921A (en) * | 2012-09-04 | 2015-05-06 | 三菱电机株式会社 | Semiconductor device and semiconductor device manufacturing method |
| WO2022042051A1 (en) * | 2020-08-28 | 2022-03-03 | 京东方科技集团股份有限公司 | Substrate and manufacturing method therefor, and display device and manufacturing method therefor |
-
2008
- 2008-04-25 CN CN 200810095329 patent/CN101567353A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102709197A (en) * | 2012-06-21 | 2012-10-03 | 清华大学 | Technical method for packaging salient point of welded ball based on substrate etching mode |
| CN104603921A (en) * | 2012-09-04 | 2015-05-06 | 三菱电机株式会社 | Semiconductor device and semiconductor device manufacturing method |
| US9911705B2 (en) | 2012-09-04 | 2018-03-06 | Mitsubishi Electric Corporation | Semiconductor device and semiconductor device manufacturing method |
| CN104603921B (en) * | 2012-09-04 | 2018-07-24 | 三菱电机株式会社 | The manufacturing method of semiconductor device, semiconductor device |
| WO2022042051A1 (en) * | 2020-08-28 | 2022-03-03 | 京东方科技集团股份有限公司 | Substrate and manufacturing method therefor, and display device and manufacturing method therefor |
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Application publication date: 20091028 |