CN101547018B - Method and device for realizing filtering extraction of multiaerial system - Google Patents

Abstract

The invention provides a method for realizing the filtering extraction of a multiaerial system, which comprises the following steps: interweaving data signals of a K-path antenna into an M phase in a time division multiplexing mode according to a ratio K of a processing clock rate in an FPGA to a clock rate after digital down-conversion processing; dividing a filter factor into the M phase according to an extraction multiple M of the system, and respectively filtering the M-phase data signals by utilizing the M-phase filter factor; and merging and outputting the data signals after M-phase filtering. The invention also provides a device for realizing the filtering extraction of the multiaerial system. The filtering extraction of the data signals in the multiaerial system can be realized by utilizing the method and the device; and meanwhile, the utilization ratio of multiplicative resources can be increased by combining the symmetrical characteristic of a filter in the filtering process.

Description

A kind of method and device of realizing filtering extraction of multiaerial system

Technical field

The present invention relates to the mobile communication technology field, relate in particular to a kind of method and device of realizing filtering extraction of multiaerial system.

Background technology

In existing mobile communications system, traditional DDC (Digital Down Convert) processing method is the data that receive at first to be carried out filtering (convolution) handle, and then filtered signal is extracted; But because filtering completion before extracting, so taken a large amount of multiplication resources.Filtering extraction adopts heterogeneous processing, i.e. digital filter E in the prior art for this reason _K(z) be positioned at after the withdrawal device M, filtering is carried out after changing down, can effectively reduce the operand of multiplication like this; Wherein, the extraction process of multiphase filter is shown in following formula:

$H\left(z\right)=\underset{n=0}{\overset{N-1}{\mathrm{\Σ}}}h\left(n\right)z^{-n}---(1-1)$

$H\left(z\right)=\underset{n=0}{\overset{N-1}{\mathrm{\Σ}}}h\left(n\right)z^{-n}=h\left(0\right)+h\left(1\right)z^{-1}+h\left(2\right)z^{-2}+\·\·\·h(N-1)z^{-(N-1)}---(1-2)$

Concrete expansion meaning as follows:

$H\left(z\right)=\left\{\begin{array}{ccccc}h\left(0\right)& +& h(M+0)Z^{-M}& +& h(2M+0)Z^{-2M}+\·\·\·\\ h\left(1\right)Z^{-1}& +& h(M+1)Z^{-(M+1)}& +& h(2M+1)Z^{-(2M+1)}+\·\·\·\\ h\left(2\right)Z^{-2}& +& h(M+2)Z^{-(M+2)}& +& h(2M+2)Z^{-(2M+2)}+\·\·\·\\ \·& & \·& & \·\\ \·& & \·& & \·\\ \·& & \·& & \·\\ h(M-1)Z^{-(M-1)}& +& h(2M-1)Z^{-(2M-1)}& +& h(3M-1)Z^{-(3M-1)}+\·\·\·\end{array}\right.---(1-3)$

Wherein, first of the bidimensional matrix row is to be labeled as H ₀(Z ^M), second row is to be labeled as Z ^-1H ₁(Z ^M), the rest may be inferred, and last column is exactly Z ^-(M-1)H _M-1(Z ^M);

So H (Z) can be labeled as:

H(Z)＝H ₀(Z ^M)+Z ^-1H ₁(Z ^M)+Z ^-2H ₂(Z ^M)+......+Z ^-(M-1)H _(M-1)(Z ^M) (1-4)

Then the transfer function of filter can be expressed as:

$H\left(z\right)=\underset{k=0}{\overset{M-1}{\mathrm{\Σ}}}{z}^{-k}{E}_k\left(z^M\right)---(1-5)$

Wherein,

$E_k\left(z^M\right)=\underset{i=0}{\overset{\frac{N}{M}-1}{\mathrm{\Σ}}}h{(i*M+k)\left(z^i\right)}^{-M}---(1-6)$

That is,

$H\left(z\right)=\underset{k=0}{\overset{M-1}{\mathrm{\Σ}}}\underset{i=0}{\overset{\frac{N}{M}-1}{\mathrm{\Σ}}}{z}^{-k}\·h(i*M+k)z^{-i\·M}=\underset{k=0}{\overset{M-1}{\mathrm{\Σ}}}{z}^{-k}\left[\underset{i=0}{\overset{\frac{N}{M}-1}{\mathrm{\Σ}}}h(i*M+k)z^{-i\·M}\right]---(1-7)$

Wherein, the transfer function of H (z) expression multiphase filter; N representes the length of filter coefficient; I representes the index of each phase filter coefficient; K representes heterogeneous index, value from 0 to M-1; M representes the heterogeneous number that is divided into altogether; What h (n) represented is the value of n filter coefficient; E _K(z ^M) be the transfer function of sub-phase filter; The drawing-out structure of concrete multiphase filter is as shown in Figure 1;

Though above-mentioned prior art has proposed structure and processing method that multiphase filtering extracts; Carry out the multiphase filtering processing but all only be aimed at the single antenna data usually, do not have good mode to realize and how more reasonably to carry out the filtering extraction processing to the data of multiaerial system.

Summary of the invention

In view of this, the problem that the present invention solves provides a kind of method and device of realizing filtering extraction of multiaerial system, can realize the filtering extraction to the multiaerial system data, and reduce multiplication resources.

For addressing the above problem, technical scheme provided by the invention is following:

A kind of method that realizes filtering extraction comprises:

Be input to different paths through control data signal and accomplish the processing of extraction reduction of speed;

Respectively the data-signal behind the reduction of speed on the different paths is carried out Filtering Processing;

Filtered data-signal on the different paths is merged into circuit-switched data signal output.

Wherein, being input to different paths through control data signal accomplishes and extracts reduction of speed and handle and be specially:

Data-signal is imported from M paths to the 1 paths successively, on each path, only imported in M the continuous data, and M cycle of experience.

A kind of device of realizing filtering extraction comprises: extract processing unit, filter processing unit and merging processing unit; Wherein,

Said extraction processing unit is used for: be input to different paths through control data signal and accomplish the processing of extraction reduction of speed;

Said filter processing unit is used for: respectively the data-signal behind the reduction of speed on the different paths is carried out Filtering Processing;

Said merging processing unit is used for: filtered data-signal on the different paths is merged into circuit-switched data signal output.

A kind of method that realizes filtering extraction of multiaerial system comprises:

Clock rate ratio K after handling according to the processing clock speed of on-site programmable gate array FPGA inside and Digital Down Convert adopts time division multiplexing mode that the data-signal of K road antenna is interweaved and is the M phase; Said M is the extracting multiple of system;

According to said extracting multiple M filter factor is divided into the M phase, and utilizes this M phase filter factor respectively described M phase data-signal to be carried out filtering;

The mutually filtered data-signal of M is merged output.

Wherein, interweaving of said data-signal specifically comprises:

With the metadata cache of the same position on every antenna in the antenna of K road together;

The data that are buffered in are together merged output to carry out follow-up Filtering Processing.

Wherein, the said M of utilization phase filter factor carries out filtering to M phase data-signal respectively and specifically comprises:

When group phase filter factor has symmetry, then directly use this to have symmetric sub-phase filter factor this sub-phase data-signal is carried out filtering;

When group phase filter factor does not have symmetry; Generate new sub-phase filter factor with utilizing this not have symmetric sub-phase filter factor; Utilize each sub-phase data-signal to generate new sub-phase data-signal simultaneously, utilize new sub-phase filter factor that new sub-phase data-signal is carried out filtering then.

Wherein, the new sub-phase filter factor of said generation specifically comprises with the new sub data-signal mutually of generation:

Data through each not being had symmetric sub-phase filter factor same position addition respectively obtain new sub filter factor mutually with subtracting each other;

Through with the odd number phase data of each sub-phase data-signal and even number mutually data respectively addition obtain new sub data-signal mutually with subtracting each other.

Wherein, the said Filtering Processing of carrying out further comprises:

Before each son carried out filtering to the data-signal of a certain antenna in mutually, the data-signal of other antennas of buffer memory adopted time division multiplexing mode that all antennas are carried out Filtering Processing simultaneously.

Wherein, the said Filtering Processing of carrying out further comprises:

Each sub-phase data-signal is handled and propagated according to preset direction, and accomplish a plurality of multiplication and add operation a sampling instant.

A kind of device of realizing filtering extraction of multiaerial system comprises: interleave unit, filter unit and output unit; Wherein,

Said interleave unit is used for: the clock rate ratio K after handling according to the processing clock speed of FPGA inside and Digital Down Convert, and adopt time division multiplexing mode that the data-signal of K road antenna is interweaved and be the M phase, said M is the extracting multiple of system;

Said filter unit is used for: according to said extracting multiple M filter factor is divided into the M phase, and utilizes the M phase data-signal after this M phase filter factor is handled said interleave unit respectively to carry out filtering;

Said output unit is used for: the data-signal after said filtering unit filters is handled merges output.

Wherein, said interleave unit further comprises: the transmitting element and first buffer unit; Wherein,

Said transmitting element is used for: the data of the same position on every antenna of K road antenna are sent to each first buffer unit;

Said first buffer unit is used for: the buffer memory transmitting element sends over the data on each antenna, and said filter unit is exported in merging respectively.

Wherein, said filter unit further comprises: divide facies unit, judging unit and sub filter unit mutually; Wherein,

Facies unit was used in said minute: according to said extracting multiple M filter factor is divided into the M phase;

Said judging unit is used for: judge whether each sub-phase filter factor has symmetry, and the result is sent to said sub-phase filter unit;

Said sub-phase filter unit is used for: receive the judged result of said judging unit, and group phase filter factor directly uses this to have symmetric sub-phase filter factor this sub-phase data-signal is carried out filtering when having symmetry; When group phase filter factor does not have symmetry; Utilize this not have symmetric sub-phase filter factor and generate new sub-phase filter factor; Utilize each sub-phase data-signal to generate new sub-phase data-signal simultaneously, utilize new sub-phase filter factor that new sub-phase data-signal is carried out filtering then.

Wherein, Said sub-phase filter unit is further used for: the data through each not being had symmetric sub-phase filter factor same position addition respectively obtain new sub filter factor mutually with subtracting each other, through with the odd number phase data of each sub-phase data-signal and even number mutually data respectively addition obtain new sub data-signal mutually with subtracting each other.

Wherein, said filter unit further comprises: second buffer is used for the data-signal of other antennas of buffer memory before each sub-phase filtering unit filters.

Wherein, said sub-phase filter unit is further used for: each sub-phase data-signal is handled and propagated according to preset direction, and accomplish a plurality of multiplication and add operation a sampling instant.

Can find out; Adopt method and apparatus of the present invention; Be woven into some phase data-signals through data-signal with multiaerial system; And utilize extracting multiple that filter factor is divided into corresponding some phase filter factors, and utilize said some phase filter factors to adopt time division multiplexing mode that said some association are carried out filtering again, realize filtering extraction with this to the multiaerial system data-signal; Simultaneously, the symmetry characteristics through filter joint in the process of filtering have improved the utilance to multiplication resources.

Description of drawings

Fig. 1 is the drawing-out structure sketch map of multiphase filter in the prior art;

Fig. 2 is the method flow sketch map of the embodiment of the invention 1;

Fig. 3 is the device schematic block diagram of the embodiment of the invention 2;

Fig. 4 is the internal structure sketch map of device when extracting multiple is 3 of the embodiment of the invention 2;

Fig. 5 is the method flow sketch map of the embodiment of the invention 3;

Fig. 6 is the sketch map that the odd-order filter factor is divided into two phases in the embodiment of the invention 3 methods;

Fig. 7 is two phase Filtering Processing sketch mapes when filter coefficient is odd-order in the embodiment of the invention 3 methods;

Fig. 8 is the sketch map that the even-order filter factor is divided into two phases in the embodiment of the invention 3 methods;

Fig. 9 is two phase Filtering Processing sketch mapes when filter coefficient is even-order in the embodiment of the invention 3 methods;

Figure 10 is the sketch map of three-phase Filtering Processing in the embodiment of the invention 3 methods;

Figure 11 is the schematic block diagram of the embodiment of the invention 4 devices.

Embodiment

Basic thought of the present invention is the multiphase filtering processing is applied to multiaerial system, realizes the filtering extraction of multiaerial system data-signal with this; Simultaneously, the symmetry characteristics through filter joint in the process of filtering have improved the utilance to multiplication resources.

In order to make those skilled in the art better understand the present invention, method of the present invention is elaborated below in conjunction with accompanying drawing and specific embodiment.

The embodiment of the invention 1 proposes a kind of method that realizes filtering extraction, and as shown in Figure 2, this method comprises:

Step 201: be input to different paths through control data signal and accomplish the processing of extraction reduction of speed;

Step 202: respectively the data-signal behind the reduction of speed on the different paths is carried out Filtering Processing;

Step 203: filtered data-signal on the different paths is merged into circuit-switched data signal output.

Concrete, accomplish the extraction of data-signal and the reduction of speed through controlling continuous data-signal input sampling value to the different paths in the M path: wherein, reduction of speed also can be regarded as the delay in cycle; Because extracting with postponing is relevant operation, therefore can change the size that extracts the factor through adjusting different input paths, this just means that also adjustment extracts the factor and only need change the input path and get final product; For example: in the down-converted scheme in M bar filtering path; At first input data signal is imported from M paths to the 1 paths successively; As far as each paths; Every M input data continuously only obtained one, during experienced M clock cycle, doubly extract the delay with M cycle thereby can accomplish M; And then the signal to reduce the speed on the M paths carried out Filtering Processing; At last the data-signal on the mulitpath is merged processing, the signal that promptly comes out M paths convolution (filtering) merges into that riches all the way sees off.

In addition, the embodiment of the invention 2 also proposes a kind of device of realizing filtering extraction, and is as shown in Figure 3, and this device comprises: extract processing unit 301, filter processing unit 302 and merge processing unit 303; Wherein,

Said extraction processing unit 301 is used for being input to different paths through control data signal and accomplishes the processing of extraction reduction of speed; Said filter processing unit 302 is used for respectively the data-signal behind the reduction of speed on the different paths being carried out Filtering Processing; Said merging processing unit 303 is used for filtered data-signal on the different paths is merged into circuit-switched data signal output;

Wherein, what the extraction processing unit 301 in the present embodiment device was accomplished is that the extraction and the delay of input signal are handled, and can it be regarded as a kind of reversing switch in embodiments of the present invention simultaneously; Because extracting with postponing is relevant operation, therefore can change the size that extracts the factor through adjustment reversing switch (extraction processing unit), this just means that also the adjustment extraction factor only need change reversing switch and get final product; Simultaneously, described filter processing unit 302 can be a plurality of; Detailed description for example is as shown in Figure 4 below, wherein f _sThe signal rate of expression input, f _sThe output speed of/3 expression signals; Speed has been reduced to 1/3rd of input signal speed: in the down-converted scheme of 3 filter processing unit; Reversing switch will be imported data and import successively from the 3rd paths to the 1 paths, as far as each paths, in per 3 data-signals of importing continuously, only obtain one; Experience 3 clock cycle during this time, thereby can accomplish the 3 times of extractions and the delay in 3 cycles.

The embodiment of the invention 3 has also proposed a kind of method that realizes filtering extraction of multiaerial system, and is as shown in Figure 5, and this method comprises:

Step 501: the clock rate ratio K after handling with DDC (Digital Down Convert) according to the inner processing clock speed of FPGA (field programmable gate array), employing TDM (time division multiplexing) mode interweave the data-signal of K road antenna and are the M phase; Said M is the extracting multiple of system;

The multiplexing method that adopts in the embodiment of the invention is relevant with the processing clock speed and the speed after the DDC processing of FPGA inside, and the internal clocking processing speed of FPGA is greater than the speed that DDC finishes dealing with usually, that is: $K=\frac{f_{\mathrm{Clk}}}{f_{\mathrm{Ddc}}},K>1$ So handle the mode that can adopt TDM for the filtering extraction of multiaerial system the data of many antennas are accomplished the filtering extraction function, many antennas can be shared multiplication resources, addition resource and delayer like this, have effectively saved system resource.For example, if the clock rate after DDC handles is 30.72MHz, and the processing clock speed of the inside of FPGA is 122.88MHz, then can accomplish the processing of K=122.88/30.72=4 root antenna; If the extracting multiple M=2 of system, then the data-signal of 4 antennas being interweaved is 2 to carry out follow-up Filtering Processing, specifically illustrates as follows:

Suppose that 4 antenna input data rates are 61.44MHz, the extracting multiple of system is 2, and then the data-signal with 4 antennas is divided into 2 phases; At first the data with 4 antennas send to heterogeneous buffer; First data of first antenna send to first position in the buffer 1; First data of the 2nd antenna send to the 2nd position in the buffer 1; The rest may be inferred, sends to the 4th position in the buffer 1 up to first data of the 4th antenna; The 2nd data with the 2nd antenna send to first position in the buffer 2 simultaneously; The 2nd data of the 2nd antenna send to the 2nd position in the buffer 2; The rest may be inferred, sends to the 4th position in the buffer 2 up to the 2nd data of the 4th antenna; So promptly having accomplished interleaving treatment, is 30.72MHz though each root antenna transmission is given the speed of buffer, and the speed of each buffer output signal is the speed after 4 antennas interweave, just 122.88MHz.

Step 502: according to said extracting multiple M filter factor is divided into the M phase, and utilizes this M phase filter factor that described M phase data-signal is carried out filtering;

In embodiments of the present invention, each sub-phase filtering can be adopted filtering method of the prior art, repeats no more; But the embodiment of the invention has proposed other a kind of thinking, promptly when Filtering Processing, has considered the symmetry of sub-phase filter factor:

Have symmetry like fruit phase filter factor, then directly use this to have symmetric sub-phase filter factor; For example; For the odd-order filter factor, if be divided into two mutually after, each phase filter factor can present symmetry; And after in filtering, at first will treating the data addition of filtering; Multiply each other with filter factor, the multiplier that uses in the filtering like this can be saved half the again, has saved the multiplication resources of system;

Do not have symmetry like fruit phase filter factor; Then will not have symmetric sub-phase filter factor merges in twos; If that is: m does not mutually have symmetry, then M-m phase filter factor does not have symmetry yet, this moment m mutually with M-m mutually filter factor can merge; The rule that merges is a m phase filter factor and the M-m at first addition and subtracting each other of data of filter factor same position mutually, obtains new filter coefficient with this; Simultaneously with the input data odd term data and the addition of even number item and subtract each other, obtain new input data with this.

In addition, the embodiment of the invention also proposes in the Filtering Processing process of each phase, to increase some caching functions, and other the signal of antenna of buffer memory is to reach the effect of multiphase filtering to many antenna filtering; For example: in embodiment step 501, to the processing of 4 antennas, then before each filtering, increase by 3 buffer areas, in order to the data of other 3 antennas of buffer memory, and adopt the timesharing of TDM mode to accomplish the Filtering Processing of many antennas this moment;

Simultaneously, the embodiment of the invention also proposes in every phase filtering, to adopt systolic structures to accomplish convolution algorithm, and promptly data are propagated and handled according to direction from left to right, and a beat is accomplished a plurality of multiplication and a plurality of addition, exports data simultaneously; For example a kind of Systolic FIR Filter: the Systolic FIR Filter structure is a structure optimum in the parallelism wave filter structure; Promptly importing data is fed in the data register; Sampled data after in the corresponding register of each FPGA processing clock one leans on exports multiplier to, and with corresponding multiplication, filter coefficient is arranged from left to right; First coefficient is in the leftmost side; Last coefficient is in the rightmost side, and the result of product of signal data and filter coefficient is added up by adder chain mutually, forms the filtered of this sampling instant.

Be example with two phase Filtering Processing below, introduce odd-order filter factor and even-order filter factor efficient handling principle and method respectively at two phase times:

At first, the mathematic(al) representation of twice filtering extraction coefficient is following:

$H\left(z\right)=\underset{k=0}{\overset{1}{\mathrm{\Σ}}}\underset{i=0}{\overset{\frac{N}{2}-1}{\mathrm{\Σ}}}{z}^{-k}\·h(i*2+k)z^{-i\·2}=\underset{k=0}{\overset{1}{\mathrm{\Σ}}}{z}^{-k}\left[\underset{i=0}{\overset{\frac{N}{2}-1}{\mathrm{\Σ}}}h(i*2+k)z^{-i\·2}\right]---(2-1)$

$E_k\left(z^2\right)=\underset{i=0}{\overset{\frac{N}{2}-1}{\mathrm{\Σ}}}h{(i*2+k)\left(z^i\right)}^{-2}---(2-2)$

$H\left(z\right)=\underset{k=0}{\overset{1}{\mathrm{\Σ}}}\underset{i=0}{\overset{\frac{N}{2}-1}{\mathrm{\Σ}}}{z}^{-k}\·h(i*2+k)z^{-i\·2}=\underset{k=0}{\overset{1}{\mathrm{\Σ}}}{z}^{-k}{E}_k\left(z^2\right)---(2-3)$

Wherein, H (z) expression is the transfer function of multiphase filter; What N represented is the length of filter factor; What i represented is the index of each phase filter coefficient; What k represented is heterogeneous index; E _k(z ²) what represent is the transfer function of k phase filtering;

(1) if be odd order filter for H (z), then any phase in the two phase filter coefficients (first mutually with second mutually) all is a symmetrical filter coefficient, h as shown in Figure 6 (0), h (1) ... all are filter coefficients; Therefore, can directly utilize symmetry that the data-signal of many antennas is carried out Filtering Processing:

The first corresponding filter coefficient is isolated a filter coefficient and is extracted one since the 0th mutually, up to extracting last filter coefficient:

A＝H ₀(z ²)＝h(0)，h(2)，...h(n)，...h(2)，h(0) (2-4)

The second corresponding filter coefficient is isolated a filter coefficient and is extracted one since the 1st mutually, up to extracting last filter coefficient:

B＝H ₁(z ²)＝h(1)，h(3)，...(n-1)，h(n-1)...h(3)，h(1) (2-5)

After each data corresponding with it multiplied each other, the stacked data that multiplies each other of this synchronization added the cost filtering of signal constantly then.

Because this coefficient is an odd number; Therefore it is unequal to be divided into two filter coefficient numbers after mutually; First compares second wants many coefficients mutually; So the sub-phase filter of second phase is delayed time a clock cycle at the preceding register that will pass through of entering FIFO (First InputFirst Output, First Input First Output), to reach two phase filter coefficient Synchronous Processing filter functions; The filter coefficient that 4 antenna datas of for example some time slots are corresponding is as shown in the table, wherein, 12 rank filter coefficient symmetries is arranged totally in the 13 rank filter coefficients:

Can find out from last table,, reduce the operand of multiplication because the symmetry of multiphase filter coefficient multiplies each other with filter coefficient after the data addition of same antenna; And owing to 4 clock cycle of second phase delay (, needing 4 clock cycle of time-delay), make signal to export according to correct order owing to be 4 antennas, as shown in Figure 7.

(2) if be even order filter for H (z), then any phase in the two phase filter coefficients (first mutually with second mutually) is not the balanced-filter coefficient, and is as shown in Figure 8; Wherein,

The first corresponding filter coefficient is isolated a filter coefficient and is extracted one since the 0th mutually, up to extracting last filter coefficient:

H ₀(z ²)＝h(0)，h(2)，...h(n)，...h(3)，h(1) (2-6)

The second corresponding filter coefficient is isolated a filter coefficient and is extracted one since the 1st mutually, up to extracting last filter coefficient:

H ₁(z ²)＝h(1)，h(3)，...h(n)，...h(2)，h(0) (2-7)

Because filter coefficient is even-order, so the equal in length of two phase filter coefficients, the at first addition and subtracting each other of the data of the first phase filter coefficient and the second phase filter coefficient same position obtains new filter coefficient A (Z), B (Z); Data odd term data and the addition of even number item of input simultaneously and subtracting each other obtains new input data I X0 (Z), IX1 (Z), and then carry out filtering extraction processing, and as shown in Figure 9: concrete,

Even-order be divided into two mutually after, each of filter coefficient does not have mutually symmetry, but if the coefficient of this two phase filters same position stack then have symmetry:

A(z)＝[H ₀(z ²)+H ₁(z ²)]/2＝h(0)+h(1)，h(2)+h(3)，…，2h(n)，…，h(3)+h(2)，h(1)+h(0)?(2-8)

Be about to the first phase filter coefficient and the second phase filter coefficient addition, this two corresponding filter coefficient carries out above-mentioned correction, presents symmetric purpose to reach filter coefficient, and the A of generation (z) is as the revised first phase filter coefficient; But first after data multiply each other mutually of this moment first phase filter coefficient and input, i.e. A (Z) X ₀(z), it then is that institute is unwanted in the filtering that the filter coefficient of second phase multiplies each other with first mutually the data, and it is following to generate another one balanced-filter coefficient for this reason:

B(z)＝[H ₀(z ²)-H ₁(z ²)]/2＝h(0)-h(1)，h(2)-h(3)，…，0，…，h(3)-h(2)，h(1)-h(0)?(2-9)

Being about to the first phase filter coefficient and the second phase filter coefficient subtracts each other; This two corresponding filter coefficient carries out above-mentioned correction; Present symmetric purpose to reach filter coefficient; The B (z) that generates is as the revised second phase filter coefficient, and the symmetric characteristics is-symbol of above-mentioned B (z) is opposite;

This moment, two phase filter coefficients were symmetrical; And the first phase data need and first mutually the filter coefficient convolution in handling for filtering extraction in theory; The second phase data need and second mutually the filter coefficient convolution; For the input data of this two phase also need extra process (promptly since filter coefficient revise; The data of input are also wanted corresponding modification for this reason), regenerate the input data I X of two phases ₀(z) and IX ₁(z): wherein,

The data that are divided into two phases, the data of first phase at first superpose with second mutually the data, as the revised first phase data, input to the first phase filter coefficient;

IX ₀(z)＝X ₀(z ²)+X ₁(z ²) (2-10)

The data that are divided into two phases, the data of first phase are at first subtracted each other with second mutually the data, as the revised second phase data, input to the second phase filter coefficient;

IX ₁(z)＝X ₀(z ²)-X ₁(z ²) (2-11)

Then the filter coefficient that regenerates is carried out convolution with the input data that regenerate and has just accomplished the filtering extraction processing:

$A\left(Z\right)\·{\mathrm{IX}}_0\left(z\right)=\frac{[H_0\left(z^2\right)+H_1\left(z^2\right)]}{2}\·[X_0\left(z^2\right)+X_1\left(z^2\right)]---(2-12)$

$B\left(Z\right)\·{\mathrm{IX}}_1\left(z\right)=\frac{[H_0\left(z^2\right)+H_1\left(z^2\right)]}{2}\·[X_0\left(z^2\right)+X_1\left(z^2\right)]---(2-13)$

It should be noted that in the embodiment of the invention only to be treated to example mutually, but be not limited thereto with two; The extraction of more complicated multiple also can be obtained by above-mentioned dual mode; For example: filter coefficient must have one to present symmetry mutually when extracting for three times; Other two do not have symmetry mutually, do not have its symmetry of processing method realization that symmetric that two phase filters coefficient can be divided into two phases according to the even order filter coefficient, and the Three-phase electric-wave filter coefficient has just all had symmetry like this; Concrete processing is shown in figure 10, repeats no more.

Step 503: the mutually filtered data-signal of M is merged output.

After every phase Filtering Processing is accomplished, the data stack of every phase Filtering Processing output must be arrived final filtered signal, following formula:

The odd-order filter factor:

Y(z)＝X ₀(z ²)H ₀(z ²)+X ₁(z ²)H ₁(z ²) (2-14)

The even-order filter factor:

$A\left(Z\right)\·{\mathrm{IX}}_0\left(z\right)+B\left(Z\right)\·{\mathrm{IX}}_1\left(z\right)\begin{array}{c}=\frac{[H_0\left(z^2\right)+H_1\left(z^2\right)]}{2}\·[X_0\left(z^2\right)+X_1\left(z^2\right)]+\frac{[H_0\left(z^2\right)-H_1\left(z^2\right)]}{2}\·[X_0\left(z^2\right)-X_1\left(z^2\right)]\\ =X_0\left(z^2\right)H_0\left(z^2\right)+X_1\left(z^2\right)H_1\left(z^2\right)\end{array}---(2-11)$

One of ordinary skill in the art will appreciate that all or part of step that realizes in the foregoing description method is to accomplish through the relevant hardware of program command, and described procedure stores is in the particular memory medium.

Can find out, adopt method of the present invention, realize filtering extraction the multiaerial system data-signal; Simultaneously, the symmetry characteristics through filter joint in the process of filtering have improved the utilance to multiplication resources.

Based on above-mentioned thought, the embodiment of the invention 4 has proposed a kind of device of realizing filtering extraction of multiaerial system again, and is shown in figure 11, comprising: interleave unit 1101, filter unit 1102 and output unit 1103; Wherein,

Said interleave unit 1101 is used for: the clock rate ratio K after handling according to the processing clock speed of FPGA inside and Digital Down Convert, and adopt time division multiplexing mode that the data-signal of K road antenna is interweaved and be the M phase, said M is the extracting multiple of system;

Said filter unit 1102 is used for: according to said extracting multiple M filter factor is divided into the M phase, and utilizes the M phase data-signal after this M phase filter factor is handled said interleave unit 1101 respectively to carry out filtering;

Said output unit is used for: the data-signal after said filter unit 1102 Filtering Processing is merged output.

Wherein, said interleave unit further comprises: the transmitting element and first buffer unit; Wherein,

Said transmitting element is used for: the data of the same position on every antenna of K road antenna are sent to each first buffer unit; Said first buffer unit is used for: the buffer memory transmitting element sends over the data on each antenna, and said filter unit is exported in merging respectively.

In addition, said filter unit further comprises: divide facies unit, judging unit and sub filter unit mutually; Wherein, said minute facies unit is used for: according to said extracting multiple M filter factor is divided into the M phase; Said judging unit is used for: judge whether each sub-phase filter factor has symmetry, and the result is sent to said sub-phase filter unit; Said sub-phase filter unit is used for: receive the judged result of said judging unit, and group phase filter factor directly uses this to have symmetric sub-phase filter factor this sub-phase data-signal is carried out filtering when having symmetry; When group phase filter factor does not have symmetry; Utilize this not have symmetric sub-phase filter factor and generate new sub-phase filter factor; Utilize each sub-phase data-signal to generate new sub-phase data-signal simultaneously, utilize new sub-phase filter factor that new sub-phase data-signal is carried out filtering then.

Wherein, Said sub-phase filter unit also can be further used for: the data through each not being had symmetric sub-phase filter factor same position addition respectively obtain new sub filter factor mutually with subtracting each other, through with the odd number phase data of each sub-phase data-signal and even number mutually data respectively addition obtain new sub data-signal mutually with subtracting each other.

It should be noted that said filter unit further comprises: second buffer is used for the data-signal of other antennas of buffer memory before each sub-phase filtering unit filters.

In addition, said sub-phase filter unit is further used for: each sub-phase data-signal is handled and propagated according to preset direction, and accomplish a plurality of multiplication and add operation a sampling instant.

Simultaneously; Those of ordinary skills can understand easily; The device that the realization uplink scheduling information sends in the foregoing description can be integrated or be installed on the terminal of generally adopting at present, and such integration or installation all should be included within protection scope of the present invention, repeat no more at this.

The above is merely preferred embodiment of the present invention, and is in order to restriction the present invention, not all within spirit of the present invention and principle, any modification of being done, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (14)

1. a method that realizes filtering extraction is characterized in that, comprising:

Be input to different paths through control data signal and accomplish the processing of extraction reduction of speed; Be specially: data-signal is imported from M paths to the 1 paths successively, on each path, only imported in M the continuous data, and M cycle of experience;

Respectively the data-signal behind the reduction of speed on the different paths is carried out Filtering Processing;

Filtered data-signal on the different paths is merged into circuit-switched data signal output.

2. a device of realizing filtering extraction is characterized in that, comprising: extract processing unit, filter processing unit and merging processing unit; Wherein,

Said extraction processing unit is used for: be input to different paths through control data signal and accomplish the processing of extraction reduction of speed; Specifically be used for data-signal is imported from M paths to the 1 paths successively, on each path, only import in M the continuous data, and M cycle of experience; Said filter processing unit is used for: respectively the data-signal behind the reduction of speed on the different paths is carried out Filtering Processing;

Said merging processing unit is used for: filtered data-signal on the different paths is merged into circuit-switched data signal output.

3. a method that realizes filtering extraction of multiaerial system is characterized in that, comprising:

Clock rate ratio K after handling according to the processing clock speed of on-site programmable gate array FPGA inside and Digital Down Convert adopts time division multiplexing mode that the data-signal of K road antenna is interweaved and is the M phase; Said M is the extracting multiple of system;

According to said extracting multiple M filter factor is divided into the M phase, and utilizes this M phase filter factor respectively described M phase data-signal to be carried out filtering;

The mutually filtered data-signal of M is merged output.

4. method according to claim 3 is characterized in that, interweaving of said data-signal specifically comprises:

With the metadata cache of the same position on every antenna in the antenna of K road together;

The data that are buffered in are together merged output to carry out follow-up Filtering Processing.

5. method according to claim 3 is characterized in that, the said M of utilization phase filter factor carries out filtering to M phase data-signal respectively and specifically comprises:

When group phase filter factor has symmetry, then directly use this to have symmetric sub-phase filter factor this sub-phase data-signal is carried out filtering;

When group phase filter factor does not have symmetry; Generate new sub-phase filter factor with utilizing this not have symmetric sub-phase filter factor; Utilize each sub-phase data-signal to generate new sub-phase data-signal simultaneously, utilize new sub-phase filter factor that new sub-phase data-signal is carried out filtering then.

6. method according to claim 5 is characterized in that, the new sub-phase filter factor of said generation specifically comprises with the new sub data-signal mutually of generation:

Data through each not being had symmetric sub-phase filter factor same position addition respectively obtain new sub filter factor mutually with subtracting each other;

Through with the odd number phase data of each sub-phase data-signal and even number mutually data respectively addition obtain new sub data-signal mutually with subtracting each other.

7. according to claim 5 or 6 any described methods, it is characterized in that the said Filtering Processing of carrying out further comprises:

Before each son carried out filtering to the data-signal of a certain antenna in mutually, the data-signal of other antennas of buffer memory adopted time division multiplexing mode that all antennas are carried out Filtering Processing simultaneously.

8. according to claim 5 or 6 any described methods, it is characterized in that the said Filtering Processing of carrying out further comprises:

Each sub-phase data-signal is handled and propagated according to preset direction, and accomplish a plurality of multiplication and add operation a sampling instant.

9. a device of realizing filtering extraction of multiaerial system is characterized in that, comprising: interleave unit, filter unit and output unit; Wherein,

Said interleave unit is used for: the clock rate ratio K after handling according to the processing clock speed of FPGA inside and Digital Down Convert, and adopt time division multiplexing mode that the data-signal of K road antenna is interweaved and be the M phase, said M is the extracting multiple of system;

Said filter unit is used for: according to said extracting multiple M filter factor is divided into the M phase, and utilizes the M phase data-signal after this M phase filter factor is handled said interleave unit respectively to carry out filtering;

Said output unit is used for: the data-signal after said filtering unit filters is handled merges output.

10. device according to claim 9 is characterized in that, said interleave unit further comprises: the transmitting element and first buffer unit; Wherein,

Said transmitting element is used for: the data of the same position on every antenna of K road antenna are sent to each first buffer unit;

Said first buffer unit is used for: the buffer memory transmitting element sends over the data on each antenna, and said filter unit is exported in merging respectively.

11. device according to claim 9 is characterized in that, said filter unit further comprises: divide facies unit, judging unit and sub filter unit mutually; Wherein,

Facies unit was used in said minute: according to said extracting multiple M filter factor is divided into the M phase;

Said judging unit is used for: judge whether each sub-phase filter factor has symmetry, and the result is sent to said sub-phase filter unit;

Said sub-phase filter unit is used for: receive the judged result of said judging unit, and group phase filter factor directly uses this to have symmetric sub-phase filter factor this sub-phase data-signal is carried out filtering when having symmetry; When group phase filter factor does not have symmetry; Utilize this not have symmetric sub-phase filter factor and generate new sub-phase filter factor; Utilize each sub-phase data-signal to generate new sub-phase data-signal simultaneously, utilize new sub-phase filter factor that new sub-phase data-signal is carried out filtering then.

12. device according to claim 11 is characterized in that:

Said sub-phase filter unit is further used for: the data through each not being had symmetric sub-phase filter factor same position addition respectively obtain new sub filter factor mutually with subtracting each other, through with the odd number phase data of each sub-phase data-signal and even number mutually data respectively addition obtain new sub data-signal mutually with subtracting each other.

13. according to claim 11 or 12 described devices, it is characterized in that said filter unit further comprises: second buffer is used for the data-signal of other antennas of buffer memory before each sub-phase filtering unit filters.

14., it is characterized in that according to claim 11 or 12 described devices:

Said sub-phase filter unit is further used for: each sub-phase data-signal is handled and propagated according to preset direction, and accomplish a plurality of multiplication and add operation a sampling instant.

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