CN101542670A - Chip fuse and its manufacturing method - Google Patents
Chip fuse and its manufacturing method Download PDFInfo
- Publication number
- CN101542670A CN101542670A CNA2008800004039A CN200880000403A CN101542670A CN 101542670 A CN101542670 A CN 101542670A CN A2008800004039 A CNA2008800004039 A CN A2008800004039A CN 200880000403 A CN200880000403 A CN 200880000403A CN 101542670 A CN101542670 A CN 101542670A
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- China
- Prior art keywords
- fuse
- insulated substrate
- key element
- element portion
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/0411—Miniature fuses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/0039—Means for influencing the rupture process of the fusible element
- H01H85/0047—Heating means
- H01H85/0056—Heat conducting or heat absorbing means associated with the fusible member, e.g. for providing time delay
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/046—Fuses formed as printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/0411—Miniature fuses
- H01H2085/0414—Surface mounted fuses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/05—Component parts thereof
- H01H85/055—Fusible members
- H01H85/08—Fusible members characterised by the shape or form of the fusible member
- H01H85/10—Fusible members characterised by the shape or form of the fusible member with constriction for localised fusing
Landscapes
- Fuses (AREA)
Abstract
A chip fuse which is suppressed in temperature rise in steady operation in a high rated current region, has time lag type fusion characteristics, and has a high yield, and its manufacturing method, are provided. In the chip fuse, a heat storage layer (12) is formed on an insulation substrate (11), and a fuse film (13) is formed on the heat storage layer (12) so as not to be in contact with the insulation substrate (11). The fuse film (13) consists of front electrode portions (13a) disposed on both sides and a fuse element portion (13b) formed between the front electrode portions (13a). A protection layer (15) made of a material having a thermal conductivity higher than that of the heat storage layer (12) is formed between the front electrode portions (13a), covering the fuse element portion (13b). By forming the heat storage layer (12) in such a size not as to cover the whole area (11a) wherein the fuse element portion (13b) is to be formed, the protection layer (15) is partially brought into contact with the insulation substrate.
Description
Technical area
The present invention relates to a kind of chip fuse (chip fuse) and manufacture method thereof, more specifically, the operating chacteristics that relates to the high rated current zone is the chip fuse and the manufacture method thereof of delaying type.
Background technology
About chip fuse,, the technology of record in by the applicant's patent documentation 1 is arranged if enumerate disclosed technology.Wherein on insulated substrate, the fuse film is set across adhesive linkage; the position overlapping in the fusing portion of the fuse film of adhesive linkage forms notch part; fill silicones in this notch part, this notch part is bigger than the fusing portion of fuse film, and the protective layer that covers the fuse film uses epoxy resin.The anti-pulse function admirable of the chip fuse of this spline structure, still, the complex structure and the manufacturing process of notch part are loaded down with trivial details, have the low problem of rate of finished products.
As the technology relevant, in patent documentation 2, put down in writing following chip fuse: on the one side of inorganic material substrate, form the low silicon fiml of thermal conductivity, on this silicon fiml, form fuse element with other chip fuses.In addition, put down in writing following chip fuse in patent documentation 3: form the substrate glasses layer on the upper surface of insulating properties substrate, this substrate glassy layer is provided with fuse element.For these patent documentations 2 and 3, thermal conductivity is reduced store heat, thereby improve quick-break.
And, in patent documentation 4, put down in writing the fuseresistor that insulating barrier is made of the constituent that has disperseed the high-termal conductivity inorganic substances in the insulating properties macromolecule.Thereby this fuseresistor has improved thermal conductivity makes thermal transpiration.
About chip fuse, technology as described above discloses, and still, demander is more expected is that operating chacteristics in the high rated current zone is the chip fuse of delaying type, can not tackle this requirement in patent documentation 1 to 4 technology of being put down in writing.
Patent documentation 1: the spy opens the 2004-319168 communique
Patent documentation 2: the spy opens flat 11-96886 communique
Patent documentation 3: the spy opens the 2004-319195 communique
Patent documentation 4: the spy opens flat 7-153367 communique
Summary of the invention
The present invention proposes in order to address the above problem; its objective is provides a kind of chip fuse and manufacture method thereof; wherein; the rising of the surface temperature of the diaphragm the superiors during high rated current zone constant is suppressed to below 75 ℃; operating chacteristics is a delaying type; and can make by fairly simple operation, so rate of finished products is better.
In the present invention, address the above problem by following scheme (1) to (3).
(1) provides a kind of chip fuse in the present invention; on insulated substrate, be formed with recuperation layer; on recuperation layer, form the fuse film in the mode that does not contact with insulated substrate; this fuse film has fuse key element portion being disposed between the surface electrode portion at two ends; the protective layer that is made of than the material of described accumulation of heat floor height thermal conductivity is set between two surface electrode portions; cover described fuse key element portion; described recuperation layer forms with the whole size that does not cover the zone that forms fuse key element portion; thus, described protective layer partly contacts with insulated substrate.
(2) according to above-mentioned (1) described chip fuse; it is characterized in that; described recuperation layer is by constituting the film of resin materials such as epoxy resin, silicones, polyimide resin as main component, and described protective layer constitutes by comprising the resin material of inorganic matter as filler.
(3) a kind of manufacture method of chip fuse, in this chip fuse, on insulated substrate, be formed with recuperation layer, on recuperation layer, be formed with the fuse film, the fuse film has fuse key element portion being disposed between the surface electrode portion at two ends, fuse key element portion is covered by protective layer, the method is characterized in that, comprise following operation: on the set insulated substrate, form recuperation layer with the whole size that does not cover the zone that is formed with fuse key element portion; In the mode that does not contact with insulated substrate, on recuperation layer, form the fuse film, and, between surface electrode portion, form fuse key element portion; Between two surface electrode portions, be provided with by thermal conductivity than the protective layer that the material of described accumulation of heat floor height constitutes, cover fuse key element portion.
(4) according to the manufacture method of above-mentioned (3) described chip fuse, it is characterized in that, in the operation that forms described recuperation layer, on the set insulated substrate, fit and to have the flaky material of the resin material of sensitization base as main component, after photomask exposes to this sheet material, remove the reservations of this sheet material, form recuperation layer by residual part.
In the present invention; the fuse film is formed on the recuperation layer in the mode that does not contact with insulated substrate; recuperation layer forms the size that does not cover the Zone Full on the insulated substrate that has formed fuse key element portion; the protective layer that covers fuse key element portion partly contacts with insulated substrate, and protective layer is formed by the material of thermal conductivity than accumulation of heat floor height.
Therefore; chip fuse is switched on; when thereby the temperature of fuse key element portion rises; this heat passes to the below and is stored in the recuperation layer 12, and on the other hand, the heat that passes to the top dispels the heat from insulated substrate by protective layer; thus; in the high rated current zone that caloric value becomes bigger, can suppress temperature and rise, and the fusing of fuse key element portion is postponed.
In addition; in the present invention; any one deck of recuperation layer, fuse film and protective layer does not need to make makes the loaded down with trivial details structure of manufacturing process as the notch part of patent documentation 1; the flaky material that will be main component with the resin material with sensitization base is fitted on the set insulated substrate; after photomask exposes to flaky material, remove the predetermined portions of flaky material, form recuperation layer; so the configuration of recuperation layer or the dimensional accuracy of flat shape improve.In addition, that uses as the material of recuperation layer is good as the thickness evenness of the flaky material of main component with resin material, so the gauge precision of recuperation layer improves.
As mentioned above, the thickness of recuperation layer, shape and configuration sized precision improve, thereby can access the good rate of finished products when making chip fuse.
Description of drawings
Fig. 1 (a)～(f) is the plane graph of the subregion on the set insulated substrate that illustrates in the manufacture process of chip fuse.
Fig. 2 is the sectional view along the cutting of the A-A line among Fig. 1 (f).
Fig. 3 is the chart of the operating chacteristics of chip fuse more of the present invention and conventional example.
Description of reference numerals
10 chip fuses
11 insulated substrates
12 recuperation layers
13 fuse films
13a surface electrode portion
13b fuse key element portion
14 fusing portions
15 first protective layers
Embodiment
Below, with reference to accompanying drawing embodiments of the present invention are described, but the invention is not restricted to this.
Fig. 1 (a)～(f) is the plane graph that the operation of making chip fuse 10 of the present invention is shown, and Fig. 2 is the sectional view of chip fuse 10 of the A-A line of Fig. 1 (f).
For chip fuse 10, on insulated substrate 11, be formed with recuperation layer 12, recuperation layer 12 is provided with fuse film 13, fuse film 13 has the fuse key element 13b of portion that the 13a of surface electrode portion that is configured in two ends is connected with the 13a of surface electrode portion to these two ends, be formed with Ni and Sn plated film or Sn plated film on the fuse key element 13b of portion, this plated film becomes fusing portion 14.And; the fuse key element 13b of portion is provided with first protective layer 15 that is made of than recuperation layer 12 high materials thermal conductivity; on this first protective layer 15, be formed with second protective layer 16; two ends at the back side of insulated substrate 11 are provided with back electrode 17; the both ends of the surface of insulated substrate 11 are provided with end electrode 18, and electrode plated film 19 is provided with in the mode of covering surfaces electrode 13a, end electrode 18 and back electrode 17.
At this; recuperation layer 12 can be by the film of resin materials such as epoxy resin, silicones, polyimide resin as main component formed; for first protective layer 15, can be for example contain organic/inorganic substance like that and form as the resin material of filler by the epoxy resin that contains alumina silicate.Utilize above structure, for example,, thermal conductivity is about about 0.05W/m ℃,, make about roughly 0.1W/m ℃ the thermal conductivity higher than recuperation layer 12 for first protective layer 15 for recuperation layer 12.
Shown in Fig. 1 (b), the fuse key element 13b of portion carries out ways of connecting with the 13a of surface electrode portion to two ends, form with narrow width, for recuperation layer 12, form than the big and roughly the same slightly shape of fuse film 13 or with identical size and form identical shape, make fuse film 13 not contact with insulated substrate 11.
Like this; recuperation layer 12 and fuse film 13 are overlapped; thus; in the regional 11a (being formed with the zone of fuse key element portion) that the 13a of surface electrode portion by two ends of insulated substrate 11 clips; produce not by the face of any one covering of recuperation layer 12 and fuse film 13, shown in Fig. 1 (d), cover on this surface by first protective layer 15; thus, first protective layer 15 and the fuse key element 13b of portion and insulated substrate 11 the two contact.
Utilize above structure; when chip fuse 10 is energized and produce heat in the fuse key element 13b of portion; this heat passes to the below and is stored in the recuperation layer 12; on the other hand; the heat that passes to the top dispels the heat from insulated substrate 11 by first protective layer 15, thus, and in the high rated current zone; temperature in the time of also can suppressing constant rises, and the fusing of the fuse key element 13b of portion is postponed.
Next, with reference to Fig. 1 and Fig. 2 the manufacture method of chip fuse 10 is described.
As the insulated substrate that is used to make chip fuse, for example, the purity that can use aluminium oxide is about 96% aluminum oxide substrate.For insulated substrate, use can by vertically and laterally to its cut-out form the size of a plurality of chip fuses 10 substrate (below, sometimes be also referred to as the set insulated substrate), after this gathers each structure that forms a plurality of layers on insulated substrate, vertically and laterally cutting off, make the fuse of each shaped like chips, but, in the plane graph of Fig. 1 (a)～(e), only show a subregion of set insulated substrate, promptly be formed with the subregion of a chip fuse, and be designated as insulated substrate 11 simply.
The groove of set insulated substrate is carved and is established operation
At first, utilize device such as laser to go up to carve and establish the groove (not shown) that cuts off usefulness at set insulated substrate (not shown).Also have in set to be pre-formed the situation of cutting off the groove of usefulness on the insulated substrate, establish operation the quarter of omitting groove in this case.
The formation operation of recuperation layer
In order to form recuperation layer 12, on insulated substrate 11, stick and to have the flaky material of the resin material of sensitization base as main component.As flaky material, for example, can use the flaky material that comprises allyl resin, epoxy resin and sensitization base and form the B state about thickness 30 μ.Carry out bonding process under predetermined temperature, predetermined pressure, thus, flaky material becomes about thickness 25 μ after bonding.Make under the thicker situation of recuperation layer 12, overlappingly under identical condition sticking identical flaky material.
Next, on the flaky material after photomask exposes, spray sodium carbonate liquor by sprayer, thus, flaky material forms the shape shown in Fig. 1 (a), forms the regional 11a that is not covered by recuperation layer 12 on insulated substrate 11.
If as above form recuperation layer 12, its thermal conductivity is approximately about 0.05W/m ℃.In addition, in above-mentioned operation, as flaky material; if use the flaky material that comprises the sensitization base; then the dimensional accuracy of recuperation layer 12 improves, and is formed on first diaphragm 15 on the recuperation layer 12 and the contact area high precision int of insulated substrate 11, and can reduce the deviation of operating chacteristics.
The formation operation of fuse film
The electrolytic copper foil of on the insulated substrate 11 that is formed with recuperation layer 12, fitting.This bonding process is undertaken by apply the predetermined pressure of the scheduled time under the temperature higher than normal temperature.Next, on electrolytic copper foil, stick the dry film of minus or apply aqueous resist, and from it after photomask exposes, electrolytic copper foil is carried out etching, dry film or aqueous resist are peeled off.
By above operation, shown in Fig. 1 (b), form fuse film 13.Fuse film 13 is shapes slightly little and more roughly the same than recuperation layer 12, and does not contact with insulated substrate 11, and the regional 11a on the insulated substrate 11 is maintained not by the state of any one covering of recuperation layer 12 and fuse film 13.
The formation operation of fuse film fusing portion
At about central portion of the fuse key element 13b of portion, by galvanoplastic Ni and Sn plated film or Sn plated film are set, thus, form the fusing portion 14 shown in Fig. 1 (c), thus, in the operating chacteristics of fuse film 13, obtain the M effect.
The formation operation of protective layer
On insulated substrate 11,, shown in Fig. 1 (d), form first protective layer 15 in order to improve at not by the thermal conductivity of the regional 11a of recuperation layer 12 and 13 coverings of fuse film.For first diaphragm 15, the heat that produces among the fuse key element 13b of portion is passed to insulated substrate 11 and dispel the heat.
If describe in more detail, for first protective layer 15, be that roughly the recuperation layer about 0.05W/m ℃ 12 is compared with thermal conductivity, to become the mode of the thermal conductivity than about its high roughly 0.1W/m ℃, the material higher by thermal conductivity forms.As such material, for example can give an example out and in epoxy resin, disperse the material of inorganic fillers such as alumina silicate, aluminium nitride, aluminium oxide.The containing ratio of the inorganic filler that comprises in this material is about 20%～50% to be suitable.If this containing ratio is below 20%, then silk screen printing decline particularly produces such bad of seepage.And, its chip fuse of using is produced surface temperature than the high problem of described predetermined value below 75 ℃.In addition, even if be that silk screen printing also reduces more than 50%, particularly produce such bad of friction.And, can not satisfy predetermined target value to the operating chacteristics of its chip fuse of using.
After forming first protective layer 15, the photonasty solder resist is set thereon, and, shown in Fig. 1 (e), utilize the epoxy resin resinous materials to form second protective layer 16.
The formation operation of back electrode, end electrode etc.
After forming first and second protective layer 15,16, at the back side of insulated substrate 11, apply silver paste and carry out burn-back by silk screen print method, form back electrode 17.Next, cut off the set insulated substrate along pod, form the insulated substrate of rectangular shape, the side coating silver paste of the long side direction of this rectangular shape insulated substrate and carry out burn-back or by sputtering method to Cr film and Ni film system film, thereby form end electrode 18.And, cut off the rectangular shape insulated substrate along translot, make each chip, utilize barrel-plating to put into cage with model (dummy), the electrode plated film 19 that formation is made of Cu film, Ni film and Sn film, then shown in Fig. 1 (f), chip fuse 10 of the present invention is finished.
Next, Fig. 3 is that rated current more of the present invention is that the rated current of the invention of the chip fuse of 5A and patent documentation 1 is the chart of operating chacteristics of the chip fuse of 5A.When comparing the present invention and conventional example, to compare with the chip fuse of patent documentation 1, chip fuse of the present invention can make fusing time postpone more than 10 times.
Claims (4)
1. chip fuse, wherein,
Be formed with recuperation layer on insulated substrate, be formed with the fuse film in the mode that does not contact with insulated substrate on recuperation layer, this fuse film has fuse key element portion being disposed between the surface electrode portion at two ends,
The protective layer that is made of than the material of described accumulation of heat floor height thermal conductivity is arranged between two surface electrode portions and covers described fuse key element portion; described recuperation layer forms with the whole size that does not cover the zone that forms fuse key element portion; thus, described protective layer partly contacts with insulated substrate.
2. according to the chip fuse of claim 1, it is characterized in that,
Described recuperation layer is by constituting the film of resin materials such as epoxy resin, silicones, polyimide resin as main component, and described protective layer constitutes by comprising the resin material of inorganic matter as filler.
3. the manufacture method of a chip fuse; in this chip fuse; on insulated substrate, be formed with recuperation layer; on recuperation layer, be formed with the fuse film; the fuse film has fuse key element portion being disposed between the surface electrode portion at two ends; fuse key element portion is covered by protective layer, the method is characterized in that, comprises following operation:
On the set insulated substrate, form recuperation layer with the whole size that does not cover the zone that forms fuse key element portion,
In the mode that does not contact with insulated substrate, on recuperation layer, form the fuse film, and, between surface electrode portion, form fuse key element portion,
Between two surface electrode portions, be provided with by thermal conductivity than the protective layer that the material of described accumulation of heat floor height constitutes, cover fuse key element portion.
4. according to the manufacture method of the chip fuse of claim 3, it is characterized in that,
In the operation that forms described recuperation layer, on the set insulated substrate, fit and to have the flaky material of the resin material of sensitization base as main component, after photomask exposes to this sheet material, remove the reservations of this sheet material, form recuperation layer by residual part.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007206314A JP4510858B2 (en) | 2007-08-08 | 2007-08-08 | Chip fuse and manufacturing method thereof |
| JP206314/2007 | 2007-08-08 | ||
| PCT/JP2008/053547 WO2009019903A1 (en) | 2007-08-08 | 2008-02-28 | Chip fuse and its manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101542670A true CN101542670A (en) | 2009-09-23 |
| CN101542670B CN101542670B (en) | 2012-06-20 |
Family
ID=40341142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008800004039A Active CN101542670B (en) | 2007-08-08 | 2008-02-28 | Chip fuse and its manufacturing method |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP4510858B2 (en) |
| KR (1) | KR101037300B1 (en) |
| CN (1) | CN101542670B (en) |
| WO (1) | WO2009019903A1 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103022001A (en) * | 2011-09-26 | 2013-04-03 | 西门子公司 | Fuse element |
| CN104584174A (en) * | 2012-08-24 | 2015-04-29 | 西门子公司 | Fuse element |
| CN108140508A (en) * | 2015-10-27 | 2018-06-08 | 迪睿合株式会社 | Fuse element |
| CN114207764A (en) * | 2019-08-27 | 2022-03-18 | Koa株式会社 | Chip type current fuse |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5306139B2 (en) * | 2009-10-08 | 2013-10-02 | 北陸電気工業株式会社 | Chip fuse |
| US9852868B2 (en) | 2012-09-28 | 2017-12-26 | Kamaya Electric Co., Ltd. | Chip fuse and manufacturing method therefor |
| CN105655213A (en) * | 2016-04-08 | 2016-06-08 | 长沙三瑞传感技术有限公司 | Fuse protector for overcurrent protection and manufacturing method of fuse protector |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5552757A (en) * | 1994-05-27 | 1996-09-03 | Littelfuse, Inc. | Surface-mounted fuse device |
| JPH0963454A (en) * | 1995-08-29 | 1997-03-07 | Kyocera Corp | Chip fuse |
| JP2000260765A (en) * | 1999-03-05 | 2000-09-22 | Matsushita Electronics Industry Corp | Pattern formation method of organic insulating film |
| JP2000331590A (en) * | 1999-03-18 | 2000-11-30 | Koa Corp | Circuit protection element and its manufacture |
| JP2003165239A (en) * | 2001-11-29 | 2003-06-10 | Kyocera Corp | Manufacturing method for thermal head |
| US7570148B2 (en) * | 2002-01-10 | 2009-08-04 | Cooper Technologies Company | Low resistance polymer matrix fuse apparatus and method |
| JP4112417B2 (en) * | 2003-04-14 | 2008-07-02 | 釜屋電機株式会社 | Chip fuse and manufacturing method thereof |
| DE102004033251B3 (en) * | 2004-07-08 | 2006-03-09 | Vishay Bccomponents Beyschlag Gmbh | Fuse for a chip |
| JP4632358B2 (en) * | 2005-06-08 | 2011-02-16 | 三菱マテリアル株式会社 | Chip type fuse |
| CN100555500C (en) * | 2006-09-04 | 2009-10-28 | 广东风华高新科技股份有限公司 | Thick film sheet type fuse and manufacture method thereof |
-
2007
- 2007-08-08 JP JP2007206314A patent/JP4510858B2/en active Active
-
2008
- 2008-02-28 KR KR1020087023290A patent/KR101037300B1/en active IP Right Grant
- 2008-02-28 WO PCT/JP2008/053547 patent/WO2009019903A1/en active Application Filing
- 2008-02-28 CN CN2008800004039A patent/CN101542670B/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103022001A (en) * | 2011-09-26 | 2013-04-03 | 西门子公司 | Fuse element |
| CN104584174A (en) * | 2012-08-24 | 2015-04-29 | 西门子公司 | Fuse element |
| US9893513B2 (en) | 2012-08-24 | 2018-02-13 | Siemens Aktiengesellschaft | Fuse element |
| CN104584174B (en) * | 2012-08-24 | 2018-04-24 | 西门子公司 | Fuse element |
| CN108140508A (en) * | 2015-10-27 | 2018-06-08 | 迪睿合株式会社 | Fuse element |
| CN114207764A (en) * | 2019-08-27 | 2022-03-18 | Koa株式会社 | Chip type current fuse |
Also Published As
| Publication number | Publication date |
|---|---|
| KR101037300B1 (en) | 2011-05-26 |
| KR20090040249A (en) | 2009-04-23 |
| JP4510858B2 (en) | 2010-07-28 |
| CN101542670B (en) | 2012-06-20 |
| JP2009043513A (en) | 2009-02-26 |
| WO2009019903A1 (en) | 2009-02-12 |
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