CN101499458B - Test structure and method for detecting disc trap and corrosion caused by CMP - Google Patents
Test structure and method for detecting disc trap and corrosion caused by CMP Download PDFInfo
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- CN101499458B CN101499458B CN2008100334651A CN200810033465A CN101499458B CN 101499458 B CN101499458 B CN 101499458B CN 2008100334651 A CN2008100334651 A CN 2008100334651A CN 200810033465 A CN200810033465 A CN 200810033465A CN 101499458 B CN101499458 B CN 101499458B
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Abstract
A test structure for detecting the disc subsidence and erosion caused by a CMP and a method thereof relate to the field of semiconductor manufacturing process. The test structure comprises a first metal detection pad group and a second metal detection pad group, one or a plurality of metal seat stacking units, a first metal test line group and a second metal test line group. The test structure is arranged in the remaining region of the silicon chip. By testing the test structure with an electrical property test method, the invention achieves the aims of detecting the disc subsidence and erosion, and has the advantages of quickness, convenience, accuracy and the like.
Description
Technical field
The present invention relates to manufacture of semiconductor, particularly relate to a kind of detection cmp (Chemical Mechanical Polishing, be abbreviated as CMP, other parts of specification are used abbreviation CMP acute pyogenic infection of finger tip cmp) the metal area dish that causes falls into the test structure and the method for (dishing) and dielectric area erosion (erosion).
Background technology
The CMP technology has the mechanical polishing of abrasive materials and the chemical formula of acid-base solution grinds two kinds of effects, can make crystal column surface reach comprehensive planarization by CMP, is beneficial to the carrying out of subsequent thin film deposition.
The CMP technology is a necessary procedure in the existing manufacture of semiconductor.But, in the CMP process,, therefore might produce defective because the wear rate of different materials is neither identical in grinding.
Along with the increase of number of transistors, interconnecting lead is more and more thinner, and the effect of aluminium obstruction electron motion is more and more obvious.Because the conductivity of copper is better than aluminium, can make the transmission speed of electronic signal faster, so copper is metal interconnected and dual-damascene technics is generally used for 0.13 μ m and following manufacturing process.The copper Wiring technique is different from the aluminium Wiring technique, needs to use electric plating method to carry out the copper wiring.After electroplating through copper, can stay on the crystal column surface and manyly comprise situations such as indentation, depression, residual particles,, therefore, analyze the more representative and importance of CMP effect in the process for copper wiring so must make flattening wafer surface with the mode of CMP.
Two kinds of defectives mainly can appear in the CMP after the copper wiring: wherein a kind of defective is called dish-shaped defective, is called for short dish and falls into, and promptly occurs depression in the copper cash; Another kind of defective is to corrode, and refers at polishing back, high pattern density district SiO
2Dielectric layer by jettisoning a part.Two kinds of defectives all can cause copper conductor thickness difference, cause the resistance instability, influence device performance.Moreover, because falling into, bigger dish usually cause copper residual and owing to the CMP cumulative effect produces metal bridge joint problem, so and directly influence product percent of pass.
People detect the sunken and erosion of dish by scanning electron microscopy (SEM), transmission electron microscope (TEM) or other scan modes at present.But this detection often can only detect a zone, and need carry out abrasive disc to chip.The time that this detection mode needs is long, can not detect at any time, and measurement data can be subjected to the interference of other factors, causes test data deviation to some extent.
Summary of the invention
The present invention proposes a kind of test structure and method of testing thereof, can detect the sunken and dielectric area erosion of metal area dish that CMP causes effectively, accurately and quickly, particularly in the copper Wiring technique, detect the sunken and erosion of copper dish that CMP causes.Described test structure can design the remaining area in entire chip, together finishes with chip manufacturing.
According to a first aspect of the invention, provide a kind of manufacture of semiconductor that is used for to detect the test structure that the metal area dish falls into and dielectric area corrodes that cmp causes, having comprised:
The first metal detection pad group comprises one or the mutual a plurality of metal detection pads that are electrically connected; The second metal detection pad group comprises one or the mutual a plurality of metal detection pads that are electrically connected;
One or more metal derby stackable unit, described metal derby stackable unit comprise metal derby on the layer of metal layer or the metal derby on continuous several metal level;
The first metallic test line group comprises one or more metallic test line, and described metallic test line one end is electrically connected with the described first metal detection pad group, and an end is vacant; The second metallic test line group comprises one or more metallic test line, and described metallic test line one end is electrically connected with the described second metal detection pad group, and an end is vacant;
Described metallic test line component is distributed in the adjacent metal of described metal derby stackable unit top; Parallel to each other between the described metallic test line.
According to a second aspect of the invention, provide a kind of manufacture of semiconductor that is used for to detect the method for testing that the metal area dish falls into and dielectric area corrodes that cmp causes, testing procedure comprises:
A. make the test structure that first aspect present invention provides;
B. observe described metal area dish fall into and the dielectric area erosion by described test structure;
Wherein, in described step, can use described first, second metal detection group of probe contact to measure the electrology characteristic of described test structure, also can use probe scanning or electronic scanning that described test structure is scanned observation.
Compare with existing means of testing, the present invention has following advantage:
At first, the method that the metal stamper that existing test CMP causes falls into and corrodes, generally all be in concrete chip production process, after running into chip failing, detection is partly analyzed and scanned to chip failure, must determine failure site earlier like this, then to after the abrasive disc of chip failure position, allowing lost efficacy partly comes out fully, could use scanning device detection inefficacies such as SEM, promptly can detect described metal stamper and fall into and erosion.This method wastes time and energy.The present invention has introduced and has been used to test the test structure that described metal stamper falls into and corrodes, and the method that can be used the electrology characteristic test obtains test data, utilizes described test data to weigh described metal stamper afterwards and falls into and corrode hurtful degree.By introducing described test structure, allow to use described first, second metal detection group of probe contact to measure the electrology characteristic of described test structure, do not need that abrasive disc is carried out at the chip failure position and handle, shortened the testing time so greatly, test process is also greatly simplified.
Secondly, existing means of testing, test result relies on choosing of other relative reference amounts, thus the test result instability can appear, thus cause test result inaccurate.Advantage of the present invention is to provide a kind of and weighs the sunken and hurtful degree of erosion of described metal stamper with the electrical testing data, does not need other contrast reference quantities, so test result is relatively accurate a lot.Simultaneously, can carry out sweep test to described test structure by existing scan mode.If needs are arranged, can carry out electricity and sweep test respectively to same test structure, then two kinds of test results are carried out analysis-by-synthesis, thereby obtain test result more accurately.
The 3rd, owing to introduced described test structure, can reach the purpose that detects at any time.The metal stamper that CMP causes degree sunken and that corrode is extremely important for whole technology, thus for a technology of using, also need periodically to do detection in this respect, but original method is difficult to realize this goal.The introducing of test structure has solved this problem fully, as long as generate described test structure at the remaining area of chip manufacturing while on silicon chip, just can detect after chip manufacturing, has reached monitoring at any time and the purpose that detects.
The 4th, existing means of testing can only detect and evaluate the degree that described metal stamper falls into and corrodes by observing the inefficacy part, is difficult to observe and detect in once testing multiple because the situation that the metal stamper that CMP causes falls into and corrodes like this.The introducing of described test structure can be arranged various test structures by the remaining area on silicon chip, and the mechanism corresponding to the different metal dish falls into and corrodes by the process of a subnormal chip stream sheet, obtains the test data that all need.This point is being evaluated a new technology, and is perhaps very useful in development of new chemical grinding reagent and means, promptly can save cost and can promote research and development speed again.
Description of drawings
Fig. 1 is that the metal area dish that detection CMP causes falls into the schematic top plan view of the test structure that corrodes with dielectric area;
Fig. 2 detects that metal area dish that CMP causes falls into and the side cross-sectional schematic diagram of the test structure that dielectric area corrodes;
Fig. 3 detects the sunken concrete test structure vertical view of metal area dish that CMP causes;
Fig. 4 is mainly used in to detect the concrete mechanism for testing vertical view that dielectric area that CMP causes corrodes.
Embodiment
Describe the present invention below in conjunction with drawings and Examples.
A first aspect of the present invention provides a kind of manufacture of semiconductor that is used for to detect the test structure that the metal area dish falls into and dielectric area corrodes that cmp causes, its structure comprises: the first metal detection pad group comprises one or the mutual a plurality of metal detection pads that are electrically connected; The second metal detection pad group comprises one or the mutual a plurality of metal detection pads that are electrically connected; One or more metal derby stackable unit, described metal derby stackable unit comprise metal derby on the layer of metal layer or the metal derby on continuous several metal level; The first metallic test line group comprises one or more metallic test line, and described metallic test line one end is electrically connected with the described first metal detection pad group, and an end is vacant; The second metallic test line group comprises one or more metallic test line, and described metallic test line one end is electrically connected with the described second metal detection pad group, and an end is vacant.
Described metallic test line component is distributed in the adjacent metal of described metal derby stackable unit top; Parallel to each other between the described metallic test line.
A second aspect of the present invention provides a kind of manufacture of semiconductor that is used for to detect the method for testing that the metal area dish falls into and dielectric area corrodes that cmp causes, and comprises the steps: that a. makes each described test structure in the claim 1 to 7; B. observe described metal area dish fall into and the dielectric area erosion by described test structure.
With reference to figure 1 and Fig. 2, according to a first aspect of the invention, in the test structure design, should be noted that Several Key Problems:
First, the first metal detection pad group 11a and the second metal detection pad group 11b are in the electrology characteristic test, be electrically connected with the test macro of outside, test access is provided, in the test structure of complexity, can comprise the metal detection pad group more than 2.When using electrical way that described test structure is tested, for convenient test, generally speaking, the metal detection pad 21a of the described first metal detection pad group 11a and the metal detection pad 21b of the described second metal detection pad group 11b can be arranged in the topmost metal layer of place chip, its area respectively greater than testing equipment allowed I survey area.
The second, metal derby stackable unit 12a (or 12b, or 12c) is used to produce that metal area dish that CMP causes falls into and dielectric area corrodes.Undermost metal derby 22a in described metal derby stackable unit (or 22b, or 22c) can be arranged in any metal level of place technology according to test purpose, be used to produce described metal area dish and fall into and the dielectric area erosion.In most of the cases, described undermost metal derby 22a is positioned at the ground floor metal level, because the problem of being concerned about most most of the time is: in a technology, the dish of ground floor metal level falls into and corrodes, by the accumulation of multiple layer metal layer, to the influence of the plain conductor of upper strata metal level.Above described undermost metal derby 22a, can arrange one or continuous a plurality of metal derby, lay respectively in one of described undermost metal derby place metal level top or the continuous a plurality of metal level, to play the effect that the described dish of accumulation falls into and corrodes.All these one or continuous a plurality of metal derby have been formed a described metal derby stackable unit 12a, with reference to shown in Figure 2.The width a1 of each metal derby (or a2, or a3), more than or equal to 0.1 micron,, will can not produce effective metal stamper and fall into phenomenon if width is too small.Under the situation that a plurality of metal derbies exist, described metal derby overlaps each other, and does not need each other to be electrically connected.
The 3rd, in described test structure, can comprise one or more described metal derby stackable unit, with reference to the 12a of figure 1 and Fig. 2,12b and 12c, generally speaking, in same mechanism for testing, the vertical structure of a plurality of described metal derby stackable unit needs unanimity, be that their topmost metal layer separately are same metal level, their orlop metal levels separately also are same metal level, and this is for clear and definite test purpose, and the width that belongs to the metal derby of different metal piece stackable unit can be different.Distance b 1 between distance b 2 between the adjacent described metal derby stackable unit, b3 and described metal derby stackable unit and the described metal detection pad group, b4 are all more than or equal to the characteristic size of place technology and smaller or equal to 30 microns.Arrange under the same test structure a plurality of described metal derby stackable unit be because: produce between two metal derbies in same metal level because the erosion that CMP causes is apparent in view, if just can not produce effective described erosion but standoff distance is excessive, concrete spacing distance is determined according to concrete test purpose.
The 4th, metallic test line 13 should be corresponding parallel distribution in twos, that is to say that one the first metallic test line in the metallic test line group is corresponding parallel mutually with the metallic test line in or two the second metallic test line groups, and vice versa.This is because the zone that the caused metal stamper of CMP falls into and corrodes takes place, and the mode by accumulation can make the phenomenon that produces bridge joint between the adjacent wires on its upper strata, i.e. short circuit phenomenon.When doing electrology characteristic test as long as measure between the described first metal detection pad group 11a and the second metal detection pad group 11b whether short circuit, just can judge between described first, second metallic test line group whether short circuit, thus judge whether technological standards appearred surpassing and since the caused metal stamper of CMP fall into and corrode.This short circuit also is to detect by existing scan testing methods.According to different test purposes, set the width d of described metallic test line and the spacing c of adjacent described metallic test line.The number of described metallic test line can decide according to the size of test request and remaining area.
Generally speaking, same described test structure is only arranged described first, second metallic test line group at same metal level, with clear and definite test purpose.Described metallic test line group is by the central area of metal derby stackable unit 12a, 12b, 12c, and the adjacent area that strides across adjacent described metal derby stackable unit.These zones all are that the metal area dish that CMP causes falls into and the main zone that occurs of dielectric area erosion.
The 5th, on silicon chip,, can arrange a plurality of described test structures according to the size of residual area, be used for different test purposes.A plurality of described mechanism for testing can merge sometimes mutually, and as one group of metal detection pad group of the common use of two test structures, promptly described two test structures only comprise three metal detection pad groups, and this class formation is not repeated.
Described test structure can be used for aluminium Wiring technique or copper Wiring technique, and described test structure other any metals that can be suitable for, because metal is similar carrying out the mode that CMP produces defective.
[embodiment 1]
In the present embodiment, adopt 0.13 μ m copper Wiring technique, the metal derby that this test structure is used for testing on the ground floor metal level falls into the influence degree that wiring produces to the copper on the 4th layer of metal level through the copper metal area dish that CMP produced.
As can see from Figure 3, all copper metal detection pad width x1 and the length y1 among the first bronze medal metal detection pad group 31a and the second bronze medal metal detection pad group 31b is 70 μ m.The described copper metal detection pad that each metal level in chip is all arranged is identical size, overlapped, be electrically connected mutually.
This test structure only comprises a copper metal derby stackable unit 32, three continuous, overlapped copper metal derbies described copper metal derby stackable unit 32 comprises from the ground floor metal level to the three-layer metal layer, the width m of each copper metal derby is 40 μ m, length n is 70 μ m, and is 19.5 μ m with layer copper metal detection pad apart from eb1 and eb2.
On the 4th layer of metal level, laid two copper metallic test line groups, every group of each 3 flat copper metallic test line, live width ed1 is 0.2 μ m, and adjacent metal p-wire spacing ec1 is 0.2 μ m.Each copper metallic test line group copper metal detection pad corresponding with the place layer is electrically connected.
According to different test purposes, can make an amendment slightly to described test structure, as the copper metal area dish of wanting to detect the ground floor metal level falls into the influence degree that wiring produces to the copper on the layer 5 metal level, can on the 4th layer of metal level, continue to lay the copper metal derby, copper test metal wire group is arranged on the layer 5 metal level, by that analogy.Certainly, the orlop of copper metal derby stackable unit also can be from the ground floor metal level.
After described test structure generates, it is carried out the probe electrical testing.Two probes are electrically connected with two copper metal detection pads of topmost metal layer in the chip respectively, the slow voltage difference described two probes of increase (starting voltage and final voltage can be set according to specific requirement) from 0 volt to 20 volts is observed the current value that flows through probe simultaneously then.If described current value is very big at the very start, it is serious to illustrate that copper metal area dish falls into influence; If described current value is very little all the time or be zero, it is very little to illustrate that copper metal area dish falls into influence, or not influence; If when described voltage difference is increased to certain numerical value, described current value begins significant change, can assess the influence degree that copper metal area dish falls into.
After carrying out described probe electrical testing, can also be in conjunction with existing sweep test, copper metal area dish fallen into do further detection.
[embodiment 2]
In the present embodiment, adopt 0.13 μ m copper Wiring technique, be mainly used in and detect the dielectric area erosion influence degree that wiring produces to the copper on the layer 5 metal level that CMP causes on the ground floor metal level.
As can see from Figure 4, all copper metal detection pad width x2 and the length y2 among the first bronze medal metal detection pad group 41a and the second bronze medal metal detection pad group 41b is 70 μ m.The described copper metal detection pad that each metal level in chip is all arranged is identical size, overlapped, be electrically connected mutually.
This test structure comprises 4 copper metal derby stackable unit 42a, 42b, 42c and 42d, each copper metal derby stackable unit includes four continuous, overlapped copper metal derbies from four layers of metal level of ground floor metal level to the, metal derby length n1 in described 4 copper metal derby stackable unit is 70 μ m, and width m1, m2, m3, m4 are respectively 12 μ m, 15 μ m, 20 μ m, 30 μ m.Described copper metal derby stackable unit 42a and described copper metal derby stackable unit 42b's is 1 μ m apart from eb4, described copper metal derby stackable unit 42b and described copper metal derby stackable unit 42c's is 2 μ m apart from eb5, described copper metal derby stackable unit 42c and described copper metal derby stackable unit 42d's is 5 μ m apart from eb6, described copper metal derby stackable unit 42a and the described first bronze medal metal detection pad group 41a's is 17.5 μ m apart from eb3, and described copper metal derby stackable unit 42d and the described second bronze medal metal detection pad group 41b's is 17.5 μ m apart from eb7.
On the layer 5 metal level, laid two copper metallic test line groups, every group of each 3 flat copper metallic test line, live width ed2 is 0.2 μ m, and adjacent metal p-wire spacing ec2 is 0.2 μ m.Each copper metallic test line group copper metal detection pad corresponding with the place layer is electrically connected.Copper metallic test line strides across the adjacent area of adjacent copper metal stack unit, thereby reaches the purpose that the tested media district corrodes.
In like manner, according to different test purposes, can make an amendment slightly to described test structure, as the dielectric area of wanting to detect the ground floor metal level corrodes the influence degree that wiring produces to the copper on the layer 6 metal level, can on the layer 5 metal level, continue to lay the copper metal derby, copper test metal wire group is arranged on the layer 6 metal level, by that analogy.Certainly, the orlop of copper metal derby stackable unit also can be from the ground floor metal level.
After described test structure generates, it is carried out the probe electrical testing.Two probes are electrically connected with two copper metal detection pads of topmost metal layer in the chip respectively, slowly increase the voltage difference described two probes then from 0 volt to 20 volts, observe the current value that flows through probe simultaneously.If described current value is very big at the very start, illustrate that the dielectric area corrosive effect is serious; If described current value is very little all the time or be zero, illustrate that the dielectric area corrosive effect is very little, or not influence; If when described voltage difference is increased to certain numerical value, described current value begins significant change, can assess the influence degree that dielectric area corrodes.Certainly, if short circuit phenomenon also may be because copper metal area dish falls into generation, this problem can detect auxiliary judgement by scanning, perhaps under the situation that remaining area allows, arrange the test structure that the corresponding copper metal area dish of special test falls into, then synthetic determination.
Claims (8)
1. one kind is used for the test structure that the metal area dish falls into and dielectric area corrodes that manufacture of semiconductor detection cmp causes, and it is characterized in that, comprising:
The first metal detection pad group comprises one or the mutual a plurality of metal detection pads that are electrically connected;
The second metal detection pad group comprises one or the mutual a plurality of metal detection pads that are electrically connected;
One or more metal derby stackable unit, described metal derby stackable unit comprise metal derby on the layer of metal layer or the metal derby on continuous several metal level;
The first metallic test line group comprises one or more metallic test line, and described metallic test line one end is electrically connected with the described first metal detection pad group, and an end is vacant;
The second metallic test line group comprises one or more metallic test line, and described metallic test line one end is electrically connected with the described second metal detection pad group, and an end is vacant;
The described first and second metallic test line components are distributed in the adjacent metal of described metal derby stackable unit top; Parallel to each other between the metallic test line of the described first and second metallic test line groups;
The described metal derby that belongs on the different metal layer of same described metal derby stackable unit is overlapped, and is not electrically connected mutually, and the width of its each metal derby is more than or equal to 0.1 micron;
Distance between distance between the adjacent described metal derby stackable unit and described metal derby stackable unit and the described first and second metal detection pad groups is all more than or equal to the characteristic size of place technology and smaller or equal to 30 microns.
2. test structure according to claim 1 is characterized in that, described metal is copper or aluminium.
3. test structure according to claim 1 and 2 is characterized in that, the described first and second metallic test line groups are by the central area of described metal derby stackable unit, and the adjacent area that strides across adjacent described metal derby stackable unit;
Wherein, the width of the metallic test line of the described first and second metallic test line groups is more than or equal to the characteristic size of place technology and smaller or equal to 10 microns; Spacing between the metallic test line of described first, second metallic test line group is more than or equal to the characteristic size of place technology and smaller or equal to 30 microns.
4. according to each described test structure in claim 1 or 2, it is characterized in that a metal detection pad of the described first metal detection pad group and a metal detection pad of the described second metal detection pad group are arranged in the topmost metal layer of place chip.
5. test structure according to claim 4 is characterized in that, the area of described metal detection pad that is arranged in the chip topmost metal layer greater than testing equipment allowed I survey area.
6. one kind is used for the method for testing that the metal area dish falls into and dielectric area corrodes that manufacture of semiconductor detection cmp causes, and it is characterized in that, comprises the steps:
A. make each described test structure in the claim 1 to 5;
B. observe described metal area dish fall into and the dielectric area erosion by described test structure.
7. method of testing according to claim 6 is characterized in that, described step b comprises that the use probe contacts the electrology characteristic that first, second metal detection pad group is measured described test structure.
8. method of testing according to claim 6 is characterized in that, described step b comprises that use probe scanning or electronic scanning scan observation to described test structure.
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| CN102200686A (en) * | 2010-03-26 | 2011-09-28 | 中芯国际集成电路制造(上海)有限公司 | Mask layout and method for monitoring process window for chemical mechanical polishing by using the same |
| CN104425305B (en) * | 2013-09-11 | 2017-05-10 | 中芯国际集成电路制造(上海)有限公司 | Failure analysis method of test structure |
| CN107908854B (en) * | 2017-11-10 | 2021-04-13 | 上海华力微电子有限公司 | Test pattern for modeling chemical mechanical polishing process model |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6292265B1 (en) * | 1999-03-10 | 2001-09-18 | Nova Measuring Instruments Ltd. | Method and apparatus for monitoring a chemical mechanical planarization process applied to metal-based patterned objects |
| CN1905150A (en) * | 2005-07-25 | 2007-01-31 | 台湾积体电路制造股份有限公司 | Method for detecting IC on-line defect and making process monitor circuit structure |
| CN101009268A (en) * | 2006-01-27 | 2007-08-01 | 日月光半导体制造股份有限公司 | Base board and its electric test method |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6292265B1 (en) * | 1999-03-10 | 2001-09-18 | Nova Measuring Instruments Ltd. | Method and apparatus for monitoring a chemical mechanical planarization process applied to metal-based patterned objects |
| CN1905150A (en) * | 2005-07-25 | 2007-01-31 | 台湾积体电路制造股份有限公司 | Method for detecting IC on-line defect and making process monitor circuit structure |
| CN101009268A (en) * | 2006-01-27 | 2007-08-01 | 日月光半导体制造股份有限公司 | Base board and its electric test method |
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