CN101483163B - Window type ball grid array encapsulation construction and substrate thereof - Google Patents

Window type ball grid array encapsulation construction and substrate thereof Download PDF

Info

Publication number
CN101483163B
CN101483163B CN 200810000207 CN200810000207A CN101483163B CN 101483163 B CN101483163 B CN 101483163B CN 200810000207 CN200810000207 CN 200810000207 CN 200810000207 A CN200810000207 A CN 200810000207A CN 101483163 B CN101483163 B CN 101483163B
Authority
CN
China
Prior art keywords
substrate
routing
ball grid
hole
grid array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 200810000207
Other languages
Chinese (zh)
Other versions
CN101483163A (en
Inventor
范文正
刘怡伶
黄欣慧
余采娟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Powertech Technology Inc
Original Assignee
Powertech Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Powertech Technology Inc filed Critical Powertech Technology Inc
Priority to CN 200810000207 priority Critical patent/CN101483163B/en
Publication of CN101483163A publication Critical patent/CN101483163A/en
Application granted granted Critical
Publication of CN101483163B publication Critical patent/CN101483163B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Abstract

The invention discloses a window type ball grid array package constructor and a substrate thereof. The window type ball grid package constructor mainly comprises a substrate with a wire bonding through hole, a wafer arranged on the substrate and a plurality of bonding wires crossing the wire bonding through hole. The substrate comprises a plurality of electroplating residual wires connecting a plurality of adjacent pins and extending to the wire bonding through hole. The bonding pads of the wafer and the corresponding pins are electrically connected by the bonding wires, wherein the extending direction of the electroplating residual wires is overlapped or parallel with the bonding wire direction of the wire bonding so as to prevent the bonding wires to mis-touch the electroplating residual wires without an electrically connection relation.

Description

Window type ball grid array encapsulation construction and substrate thereof
Technical field
The present invention relates to a kind of semiconductor device, particularly relate to a kind of window type ball grid array encapsulation construction (Window type BGA package), wherein BGA is the abbreviation for Ball Grid Array.
Background technology
Window type ball grid array encapsulation construction is to be a kind of common semiconductor device, use has the substrate of routing through hole as chip carrier, usually the upper surface of this substrate is in order to elements such as bearing semiconductor wafers, the lower surface of this substrate is in order to engage the outside terminal as soldered ball, the lower surface of this substrate is to be provided with in addition to connect finger, and by bonding wire by the routing through hole to electrically connect the connect finger of wafer to substrate.To refer to have preferable welding characteristic in order making to connect, when substrate design, can be provided with the plating line bus of passing through the routing through hole in addition at the lower surface of substrate usually, and electrically conduct to substrate and connect finger, so that connecing finger surface electrical plated with nickel/gold or other electrodeposited coating.Cutting forms the routing through hole again after plating, to remove the plating line bus.But still residual on the substrate have an electroplating residual wires that connects finger, and the electroplating residual wires of the former no electrical connection of the easy false touch of bonding wire causes short circuit.
See also shown in Figure 1ly, existing window type ball grid array encapsulation construction 100 comprises a substrate 110, a wafer 120, a plurality of bonding wire 130 and an adhesive body 140.This substrate 110 has a upper surface 111, a lower surface 112, a dozen line three-way holes 113 and a peripheral fenestra 117, and this routing through hole 113 is central authorities and the limits, two opposite sides that lay respectively at this substrate 110 with this periphery fenestra 117.
See also shown in Figure 2ly, this lower surface 112 of this substrate 110 is to be formed with a plurality of connecing to refer to 114 and a plurality of electroplating residual wires 115, and these electroplating residual wires 115 are to connect these to connect and refer to 114 and extend to this routing through hole 113.This wafer 120 has a plurality of weld pads 122, is formed at the middle section and the dual-side of the active surface of this wafer 120.This active surface of this wafer 120 is towards this substrate 110 and is arranged at this upper surface 111 of this substrate 110, and these weld pads 122 be respectively in alignment with in this routing through hole 113 with this periphery fenestra 117 in.These bonding wires 130 are to connect and refer to 114 to electrically connect these weld pads 122 to these of this substrate 110 by this routing through hole 113 and this periphery fenestra 117 respectively.This adhesive body 140 is these upper surfaces 111 and this local lower surface 112 that are formed at this substrate 110, to seal this wafer 120 and these bonding wires 130.A plurality of external terminals 150 are the outer connection pads 116 that are engaged in this lower surface 112 of this substrate 110.
Again as shown in Figure 2, existing this routing through hole 113 is a long and narrow slotted eye, and these electroplating residual wires 115 are perpendicular to this routing through hole 113, with the routing direction of these bonding wires 130 be crooked.Even part bonding wire 130 is understood and electroplating residual wires 115 juxtapositions that are close to and do not have electrical connection, the as easy as rolling off a log camber that is subjected to these bonding wires 130 is crossed processing procedure factor affecting such as breasting the tape of low or mould flowing pressure and is made the electroplating residual wires 115 (as shown in Figures 1 and 2) of no electrical connection in a bonding wire 130 (particularly at these routing through hole 113 two ends) the former design of false touch, causes electrically connecting failure.
Fig. 3 illustrates the surface lines kenel of this substrate 110 when not cutting out this routing through hole 113.This lower surface 112 of this substrate 110 is provided with a plating line bus 10 and an a plurality of plating line 11 that passes this routing through hole 113, and wherein these plating lines 11 are to connect with these and refer to 114 to connect this plating line bus 10 for being arranged in parallel.This substrate 110 has a predetermined cuts district, and utilize cutting tool (not drawing among the figure) that this predetermined cuts district of this substrate 110 is hollowed out forming this routing through hole 113, and the part that these plating lines 11 residue in this substrate 110 is these electroplating residual wires 115.
Because the defective that above-mentioned existing window type ball grid array encapsulation construction exists, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of window type ball grid array encapsulation construction and the substrate thereof of founding a kind of new structure, can improve general existing window type ball grid array encapsulation construction, make it have more practicality.Through constantly research, design, and, create the present invention who has practical value finally through after studying sample and improvement repeatedly.
Summary of the invention
Main purpose of the present invention is, overcome the defective that existing window type ball grid array encapsulation construction exists, and provide a kind of window type ball grid array encapsulation construction of new structure, technical problem to be solved is to make it avoid the electroplating residual wires of no electrical connection in the former design of bonding wire false touch, cause electrically connecting failure, thereby be suitable for practicality more.
Of the present invention time a purpose is, a kind of window type ball grid array encapsulation construction is provided, bonding wire by the forward routing is to reduce the camber of bonding wire, but can make that relatively pitch of weld is lower from the height of the lower surface of substrate, other utilizes the oblique bearing of trend of electroplating residual wires can effectively avoid short circuit with the forehand bonding wire.
A further object of the present invention is, a kind of window type ball grid array encapsulation construction is provided, and reduces the line layer road of substrate, to reduce cost.
The object of the invention to solve the technical problems realizes by the following technical solutions.According to a kind of window type ball grid array encapsulation construction of the present invention, mainly comprise a substrate, a wafer and a plurality of bonding wire.This substrate has a upper surface, a lower surface and a dozen line three-way holes, and this substrate includes a plurality of connecing and refers to and a plurality of electroplating residual wires, and wherein these connect and refer to it is to be adjacent to this routing through hole, and these electroplating residual wires are to connect these to connect finger and extend to this routing through hole.This wafer is this upper surface that is arranged at this substrate, and this wafer has an active surface and a plurality of weld pad that is formed at this active surface, and wherein this active surface is towards this substrate and makes in these weld pads this routing through hole in alignment with this substrate.These bonding wires are to connect finger via this routing through hole to connect these weld pads to corresponding these.Wherein, the bearing of trend of these electroplating residual wires is roughly overlapping or parallel with the routing direction of these bonding wires.Other discloses the substrate of above-mentioned window type ball grid array encapsulation construction.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
In aforesaid window type ball grid array encapsulation construction, the bearing of trend of these electroplating residual wires is can be non-perpendicular to the adjacent side of this routing through hole.
In aforesaid window type ball grid array encapsulation construction, these electroplating residual wires be can be non-parallel mutually.
In aforesaid window type ball grid array encapsulation construction, these electroplating residual wires and these connect to refer to it is this lower surface that can expose to this substrate.
In aforesaid window type ball grid array encapsulation construction, these wire bonds are to can be ball bond end (ball bond) in an end of these weld pads, are tail bonding end (or claiming to order box-like abutting end, stitch bond) and be engaged in these ends that connect finger.
In aforesaid window type ball grid array encapsulation construction, this routing through hole can be a long and narrow slotted eye.
In aforesaid window type ball grid array encapsulation construction, the length of this wafer can be no more than the length of this routing through hole, so that the two ends of this routing through hole are for exposing to this wafer.
In aforesaid window type ball grid array encapsulation construction, can include an adhesive body in addition, it is formed in this routing through hole and on this local lower surface, with seal these bonding wires, these connect and refer to and these electroplating residual wires.
In aforesaid window type ball grid array encapsulation construction, this adhesive body can more be formed on this upper surface, to seal this wafer.
In aforesaid window type ball grid array encapsulation construction, this substrate can include a plurality of outer connection pads, and it is to be formed at this lower surface and to connect finger-type with these electroplating residual wires and these to be formed in same line layer.
In aforesaid window type ball grid array encapsulation construction, can include a plurality of external terminals in addition, it is engaged in these outer connection pads.
In aforesaid window type ball grid array encapsulation construction, these external terminals are to comprise a plurality of soldered balls.
The object of the invention to solve the technical problems also realizes by the following technical solutions.The substrate of a kind of window type ball grid array encapsulation construction that proposes according to the present invention, it has a upper surface, a lower surface and a dozen line three-way holes, this substrate includes a plurality of connecing and refers to and a plurality of electroplating residual wires, wherein these connect and refer to it is to be adjacent to this routing through hole, these electroplating residual wires are to connect these to connect finger and extend to this routing through hole, when a wafer is arranged at this upper surface of this substrate, the bearing of trend of these electroplating residual wires be roughly be parallel to overlapping or contiguously by these weld pads of this wafer to this substrate corresponding connect connect the following air line distance that should surface of finger at this substrate.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
In aforesaid substrate, the bearing of trend of wherein said electroplating residual wires is the adjacent side non-perpendicular to this routing through hole.
In aforesaid substrate, wherein said electroplating residual wires is for non-parallel mutually.
In aforesaid substrate, wherein said electroplating residual wires and these connect to refer to it is this lower surface that exposes to this substrate.
In aforesaid substrate, the routing through hole is a long and narrow slotted eye.
In aforesaid substrate, it includes a plurality of outer connection pads in addition, and it is formed at this lower surface and connects finger-type with these electroplating residual wires and these and is formed in same line layer.
By technique scheme, window type ball grid array encapsulation construction of the present invention and substrate thereof have following advantage at least:
The window type ball grid array encapsulation construction that a kind of new structure is provided of the present invention makes its electroplating residual wires of avoiding no electrical connection in the former design of bonding wire false touch, causes electrically connecting failure;
Window type ball grid array encapsulation construction of the present invention, bonding wire by the forward routing is to reduce the camber of bonding wire, but can make that relatively pitch of weld is lower from the height of the lower surface of substrate, other utilizes the oblique bearing of trend of electroplating residual wires can effectively avoid short circuit with the forehand bonding wire;
Window type ball grid array encapsulation construction of the present invention, the line layer road of reducing substrate is to reduce cost.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 is the schematic diagram that an existing window type ball grid array encapsulation construction edge bonding wire wherein dissects.
Fig. 2 is the local enlarged diagram of existing window type ball grid array encapsulation construction in sealing prebasal plate lower surface.
Fig. 3 illustrates the lower surface circuit kenel schematic diagram of this substrate when not cutting out the routing through hole in the known window type ball grid array encapsulation construction.
Fig. 4 foundation specific embodiment of the present invention, the schematic cross-section that a kind of window type ball grid array encapsulation construction edge bonding wire wherein dissects.
Fig. 5 is according to a specific embodiment of the present invention, the schematic diagram of a base lower surface in this window type ball grid array encapsulation construction.
Fig. 6 is according to a specific embodiment of the present invention, and this window type ball grid array encapsulation construction is in the local enlarged diagram of sealing prebasal plate lower surface.
Fig. 7 illustrates the lower surface circuit kenel schematic diagram of this substrate when not cutting out the routing through hole in this window type ball grid array encapsulation construction according to a specific embodiment of the present invention.
10: plating line bus 11: plating line
20: plating line bus 21: plating line
100: window type ball grid array encapsulation construction 110: substrate
111: upper surface 112: lower surface
113: routing through hole 114: connect finger
115: electroplating residual wires 116: outer connection pad
117: peripheral fenestra 120: wafer
122: weld pad 130: bonding wire
140: adhesive body 150: external terminal
200: window type ball grid array encapsulation construction 210: substrate
211: upper surface 212: lower surface
213: routing through hole 214: connect finger
215: electroplating residual wires 216: outer connection pad
217: peripheral fenestra 220: wafer
221: active surface 222: weld pad
230: 231: the first ends of bonding wire
End 240 in 232: the second: adhesive body
250: external terminal
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, to its embodiment of window type ball grid array encapsulation construction, structure, feature and the effect thereof that foundation the present invention proposes, describe in detail as after.
According to a specific embodiment of the present invention, disclose a kind of window type ball grid array encapsulation construction.See also shown in Figure 4ly, a kind of window type ball grid array encapsulation construction 200 mainly comprises a substrate 210, a wafer 220 and a plurality of bonding wire 230.This substrate 210 has a upper surface 211, a lower surface 212 and a dozen line three-way holes 213, and for passing through of these bonding wires 230, wherein this upper surface 211 is in order to this wafer 220 to be set.This routing through hole 213 can be a long and narrow slotted eye and is through to this lower surface 212 by this upper surface 211, and is positioned at the middle section of this substrate 210.Generally speaking, this substrate 210 is as chip carrier and has the single or multiple lift line construction, for example the single or multiple lift printed circuit board (PCB).
See also Fig. 5 and shown in Figure 6, this substrate 210 includes a plurality of finger 214 and a plurality of electroplating residual wires 215 of connecing, and wherein these connect and refer to that 214 are adjacent to this routing through hole 213, and these electroplating residual wires 215 connect these and connect finger 214 and extend to this routing through hole 213.These electroplating residual wires 215 connect with these and refer to that 214 can expose to this lower surface 212 of this substrate 210.In the present embodiment, the bearing of trend of these electroplating residual wires 215 can be non-perpendicular to the adjacent side of this routing through hole 213.These electroplating residual wires 215 can be non-parallel mutually.Particularly, this substrate 210 can include a plurality of outer connection pads 216, it is formed at this lower surface 212 and connects with these electroplating residual wires 215 and these and refers to that 214 are formed at same line layer, reduce the line layer road of this substrate 210, to reduce cost, wherein these outer connection pads 216 can be many row's arrangements or trellis array kenel.In the present embodiment, these outer connection pads 216 are the circle pad of receiving, connect a plurality of external terminals 250 in order to plant as soldered ball, to be provided as input and/or output so that this window type ball grid array encapsulation construction 200 forms electrical connection with external device, so this window type ball grid array encapsulation construction 200 can be engaged to an external printed circuit board by these external terminals 250.
See also shown in Figure 5ly, more specifically, this substrate 210 has a peripheral fenestra 217, its be positioned at this substrate 210 two offsides and can with this routing through hole 213 for parallel.
See also shown in Figure 4, this wafer 220 is arranged at this upper surface 211 of this substrate 210, this wafer 220 has an active surface 221 and a plurality of weld pad 222 that is formed at this active surface 221, and wherein this active surface 221 is towards this substrate 210 and make in these weld pads 222 this routing through hole 213 in alignment with this substrate 210.These weld pads 222 are the subregions that are arranged in the dual-side of the middle section of this active surface 221 and this active surface 221, and as the internal integrated circuit element of this wafer 220 to external electrode, wherein these weld pads 222 that are positioned at the middle section of this active surface 221 can be single or double arrangement mode and in alignment with this routing through hole 213 of this substrate 210, and these weld pads 222 of subregion that are positioned at the dual-side of this active surface 221 then are this periphery fenestras 217 in alignment with this substrate 210.
See also shown in Figure 5, the length of this wafer 220 can be no more than the length of this routing through hole 213, so that the two ends of this routing through hole 213 are for exposing to this wafer 220, in follow-up manufacture procedure of adhesive, the predecessor of adhesive body 240 gets smoothly the two ends by this routing through hole 213.
See also shown in Figure 4ly, these bonding wires 230 are to connect and refer to 214 to connect these weld pads 222 to corresponding these via this routing through hole 213 and this periphery fenestra 217 respectively, reach the electrical interconnects of this wafer 220 and this substrate 210.In the present embodiment, first end 231 that these bonding wires 230 are engaged in these weld pads 222 can be ball bond end (ball bond), (or claim to order box-like abutting end and be engaged in these second ends 232 that connect finger 214 for the tail bonding end, stitch bond), be the forward routing, to reduce the camber of these bonding wires 230, but can make these bonding wires 230 lower relatively, so utilize the above-mentioned oblique bearing of trend of electroplating residual wires 215 can effectively avoid short circuit with forehand bonding wire 230 apart from the height of the lower surface 212 of this substrate 210.
See also shown in Figure 6, the bearing of trend of these electroplating residual wires 215 is roughly overlapping or parallel with the routing direction of these bonding wires 230, and do not have the problem of the electroplating residual wires 215 of no electrical connection in the former design of these bonding wire 230 false touches, therefore can avoid these bonding wires 230 with contiguous and do not have to electrically connect and close the electroplating residual wires 215 that is and be short-circuited.
Please consult shown in Figure 4 again, these bonding wires 230 only can touch electroplating residual wires 215, also be in the base plate line design originally with touch the electroplating residual wires 215 that bonding wire has electrical connection, thus, touch mutually and also do not have problem of short-circuit even bonding wire and electroplating residual wires take place.Above-mentioned alleged " the routing direction of bonding wire " is the horizontal-extending direction (as shown in Figure 6) of the two ends of bonding wire (these weld pads 222 to these substrate 210 corresponding the connecing of connecting by this wafer 220 refer to 214) at the lower surface 212 of this substrate 210.Promptly be, as XY face horizontal plane, and ignore the height of these bonding wires 230, at this moment, can indicate the camber of these bonding wires 230 by the Z axle at the Z axle with the lower surface 212 of this substrate 210.And the bearing of trend of these electroplating residual wires 215 is roughly to be parallel to by these weld pads 222 of this wafer 220 to corresponding the connecing of connecting of this substrate 210 overlapping or contiguously and refers to 214 air line distances at the lower surface 212 of this substrate 210.
See also shown in Figure 4, this window type ball grid array encapsulation construction 200 can include an adhesive body 240 in addition, its be formed in this routing through hole 213 and this local lower surface 212 on, with seal these bonding wires 230, these connect and refer to 214 and these electroplating residual wires 215, and make these bonding wires 230, these connect and refer to 214 and these electroplating residual wires 215, unlikely contaminated thing infringement.This adhesive body 240 can more be formed on this upper surface 211, to seal this wafer 220.
Fig. 7 illustrates the surface lines kenel of this substrate 210 when not cutting out this routing through hole 213.This lower surface 212 of this substrate 210 is provided with a plating line bus 20 and an a plurality of plating line 21 that passes this routing through hole 213, wherein connect these connect refer to these plating lines 21 of 214 for mutual non-parallel arrangement obliquely being connected to this plating line bus 20, connect and refer to 214 for electroplating these.This substrate 210 has a predetermined cuts district (being this routing through hole 213), and this predetermined cuts district contains this plating line bus 20 to extend to the local line segment that these connect finger 214 with these plating lines 21.Utilize cutting tool (not drawing among the figure) that this predetermined cuts district on this substrate 210 is hollowed out, to form this routing through hole 213, the parcel plating line 21 that residues in this substrate 210 then forms these electroplating residual wires 215.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.

Claims (18)

1. window type ball grid array encapsulation construction is characterized in that it comprises:
One substrate has a upper surface, a lower surface and a dozen line three-way holes, and this substrate includes a plurality of connecing and refers to and a plurality of electroplating residual wires, and wherein these connect and refer to it is to be adjacent to this routing through hole, and these electroplating residual wires connect these and connect finger and extend to this routing through hole;
One wafer is arranged at this upper surface of this substrate, and this wafer has an active surface and a plurality of weld pad that is formed at this active surface, and wherein this active surface is towards this substrate and makes in these weld pads this routing through hole in alignment with this substrate; And
A plurality of bonding wires are to connect finger via this routing through hole to connect these weld pads to corresponding these;
Wherein, the bearing of trend of these electroplating residual wires is overlapping or parallel with the routing direction of these bonding wires.
2. window type ball grid array encapsulation construction according to claim 1, the bearing of trend that it is characterized in that described electroplating residual wires are the adjacent side non-perpendicular to this routing through hole.
3. window type ball grid array encapsulation construction according to claim 1 is characterized in that described electroplating residual wires is for non-parallel mutually.
4. window type ball grid array encapsulation construction according to claim 1 is characterized in that it is this lower surface that exposes to this substrate that described electroplating residual wires and these connect finger.
5. window type ball grid array encapsulation construction according to claim 1 is characterized in that described wire bonds is the ball bond end in an end of these weld pads, is the tail bonding end and be engaged in these ends that connect finger.
6. window type ball grid array encapsulation construction according to claim 1 is characterized in that described routing through hole is a long and narrow slotted eye.
7. window type ball grid array encapsulation construction according to claim 6, the length that it is characterized in that described wafer are the length that is no more than this routing through hole, so that the two ends of this routing through hole are for exposing to this wafer.
8. window type ball grid array encapsulation construction according to claim 1, it is characterized in that it includes an adhesive body in addition, it is to be formed in this routing through hole and on this local lower surface, with seal these bonding wires, these connect and refer to and these electroplating residual wires.
9. window type ball grid array encapsulation construction according to claim 8 is characterized in that described adhesive body more is formed on this upper surface, to seal this wafer.
10. window type ball grid array encapsulation construction according to claim 1 is characterized in that described substrate includes a plurality of outer connection pads, and it is to be formed at this lower surface and to connect finger-type with these electroplating residual wires and these to be formed in same line layer.
11. window type ball grid array encapsulation construction according to claim 10 is characterized in that it includes a plurality of external terminals in addition, it is to be engaged in these outer connection pads.
12. window type ball grid array encapsulation construction according to claim 11 is characterized in that described external terminal comprises a plurality of soldered balls.
13. the substrate of a window type ball grid array encapsulation construction, it has a upper surface, a lower surface and a dozen line three-way holes, this substrate includes a plurality of connecing and refers to and a plurality of electroplating residual wires, wherein these connect and refer to it is to be adjacent to this routing through hole, these electroplating residual wires are to connect these to connect finger and extend to this routing through hole, when a wafer is arranged at this upper surface of this substrate, the bearing of trend of these electroplating residual wires be parallel to overlapping or contiguously by these weld pads of this wafer to this substrate corresponding connect connect the following air line distance that should surface of finger at this substrate.
14. substrate according to claim 13, the bearing of trend that it is characterized in that described electroplating residual wires are the adjacent side non-perpendicular to this routing through hole.
15. substrate according to claim 13 is characterized in that described electroplating residual wires is for non-parallel mutually.
16. substrate according to claim 13 is characterized in that it is this lower surface that exposes to this substrate that described electroplating residual wires and these connect finger.
17. substrate according to claim 13 is characterized in that described routing through hole is a long and narrow slotted eye.
18. substrate according to claim 13 is characterized in that it includes a plurality of outer connection pads in addition, it is formed at this lower surface and connects finger-type with these electroplating residual wires and these and is formed in same line layer.
CN 200810000207 2008-01-07 2008-01-07 Window type ball grid array encapsulation construction and substrate thereof Expired - Fee Related CN101483163B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200810000207 CN101483163B (en) 2008-01-07 2008-01-07 Window type ball grid array encapsulation construction and substrate thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200810000207 CN101483163B (en) 2008-01-07 2008-01-07 Window type ball grid array encapsulation construction and substrate thereof

Publications (2)

Publication Number Publication Date
CN101483163A CN101483163A (en) 2009-07-15
CN101483163B true CN101483163B (en) 2011-11-16

Family

ID=40880201

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200810000207 Expired - Fee Related CN101483163B (en) 2008-01-07 2008-01-07 Window type ball grid array encapsulation construction and substrate thereof

Country Status (1)

Country Link
CN (1) CN101483163B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5642473B2 (en) * 2010-09-22 2014-12-17 セイコーインスツル株式会社 BGA semiconductor package and manufacturing method thereof
MY152355A (en) * 2011-04-11 2014-09-15 Carsem M Sdn Bhd Short and low loop wire bonding

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1338891A (en) * 2000-08-21 2002-03-06 华泰电子股份有限公司 Process for preparing thin EBGA substrate
CN1354509A (en) * 2000-11-17 2002-06-19 矽品精密工业股份有限公司 Film spherical grid array type semiconductor package structure and its making method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1338891A (en) * 2000-08-21 2002-03-06 华泰电子股份有限公司 Process for preparing thin EBGA substrate
CN1354509A (en) * 2000-11-17 2002-06-19 矽品精密工业股份有限公司 Film spherical grid array type semiconductor package structure and its making method

Also Published As

Publication number Publication date
CN101483163A (en) 2009-07-15

Similar Documents

Publication Publication Date Title
US8232641B2 (en) Wiring substrate and semiconductor device having connection pads formed in non-solder mask defined structure
US8508048B2 (en) Semiconductor device utilizing a package on package structure and manufacturing method thereof
JP5071084B2 (en) Wiring substrate, laminated semiconductor device and laminated semiconductor module using the same
US6242283B1 (en) Wafer level packaging process of semiconductor
US20020058354A1 (en) Layout method for thin and fine ball grid array package substrate with palting bus
US7732921B2 (en) Window type BGA semiconductor package and its substrate
JPH0883878A (en) Package for semiconductor ic chip, production thereof and lead frame
CN101483163B (en) Window type ball grid array encapsulation construction and substrate thereof
JPH04273451A (en) Semiconductor device
CN102315135A (en) Chip package and manufacturing process thereof
CN207690781U (en) QFN encapsulating structures, the QFN encapsulating structures of fingerprint recognition and the smart mobile phone with it
US9502385B2 (en) Semiconductor device and connection checking method for semiconductor device
CN103441116A (en) Semiconductor package piece and manufacturing method thereof
CN100481407C (en) Pin ball grid array encapsulation structure of wafer
CN101232012B (en) Stack type semiconductor packaging structure
CN101145548A (en) Universal packaging substrate and its application device
TWI833565B (en) Embedded dual in-line memory module
US9289846B2 (en) Method for fabricating wire bonding structure
CN202473903U (en) Loading frame for semiconductor devices
JP2005311043A (en) Semiconductor device and inspection method, and device therefor
CN202384326U (en) Improved chip package structure
KR100370839B1 (en) Circuit Tape for Semiconductor Package
CN101527292B (en) Chip packaging structure
JPS6276661A (en) Resin sealed type semiconductor device
CN100593849C (en) Wafer encapsulation construction and wafer carrier for reducing substrate circuit layer

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20111116

Termination date: 20220107