CN101442385B - Test device of digital communication error rate - Google Patents
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Abstract
The present invention relates to a device for testing digital communication bit error rate, comprising a communication interface module for connecting to external computers or controllers; a bit error processing module for analyzing bit error of a device or system to be tested, and transmitting result to an external computer or controller; a clock generating module for selecting operation clock according to instruction of the communication interface module, and supplying the operation clock to the bit error processing module; an opto-electrical/electro-optical converter module for converting optical signal from outside into electric signal and transmitting the same to the bit error processing module, and converting high-speed electric signal generated with the bit error module into optical signal to output; a software system module for controlling the integral testing device. The device, including a bit error testing function for electric interface and optical interface, can be used as independent testing apparatus, also can be remote controlled or integrated onto an automatic testing system.
Description
Technical field
The present invention relates to a kind of testing apparatus of digital communication error rate, belong to communication technical field.
Background technology
Along with the application of high-quality digital video and audio transmission more and more widely, particularly developing rapidly of broadband IP operation such as IPTV (IPTV), video calling in recent years makes the user also increasing to the demand of optical transport network bandwidth.Modern transfers net system is to be made of many different types of devices and transmission link, comprises the communication device that connects network and other network element by communication link.For supporting high-speed communication system, need develop communication device and subsystem at a high speed.And for ensuring the quality of products, this type of device and subsystem all must be by a large amount of strict examination tests before dispatching from the factory.
The error rate is an important parameter of communication device and subsystem, is even more important for active device such as reflector, receiver, transmission receiver module etc.These active devices also are simultaneously to constitute in nextport hardware component NextPort in the communication system and the subsystem expensive component the most.In error rate test, at first to produce bit test sign indicating number type data, send it to physical communication link then, compare through the sign indicating number type and the source code type that will receive after the link transmission,, the two is recorded as an error code if not matching.
The error rate is meant total number of measured device or the link error code that produces in the unit interval.Error rate test is to utilize bit code type, frame synchronization and communication standard, is that purpose is imitated data qualification actual in the communication system (communication device and physical communication link) with the test.Wherein a kind of bit code type that is widely used at field of telecommunications is a pseudo-random bit sequence, is called for short PRBS.PRBS produces bit sequence by algorithm, and the bit sequence of its generation has identical statistical property with real random sequence.
Present code error tester is a cover independent device normally, can produce and send data in the device or communication system to be measured, receives through device or the later data of communication system transmits then, thereby calculates the error rate with the data comparison that sends.It can produce multiple sign indicating number type and carry out polytype test.Yet, under most of situations, particularly for production application, only need one of them test subclass to get final product.The complex process of code error tester makes it become separate unit testing equipment the most expensive in the high-speed telecommunication devices production, and when signal rate is high more, its price is also more expensive, the investment cost of buying this type of testing equipment has become the burden of device and subsystem production, and the large scale deployment high-speed communication system is caused very big obstacle.
Therefore, the test modifying device of a kind of error rate cheaply of design is significant for the development of high-speed communicating network.
Summary of the invention
The objective of the invention is to overcome the deficiency that prior art exists, a kind of testing apparatus of digital communication error rate cheaply is provided.
Purpose of the present invention is achieved through the following technical solutions:
The testing apparatus of digital communication error rate, characteristics are: comprise communication interface modules, be used for and being connected of outer computer or controller; Bit error processing module is used for device under test or system are carried out bit error analyzing, and the result is kept in the local register; Clock generating module is used for according to the Instruction Selection of communication interface modules operation clock, and will move clock and offer bit error processing module; Photoelectricity, electrooptic conversion module, the converting optical signals that is used for the outside input is that the signal of telecommunication sends bit error processing module to, and the high-speed electrical signals that bit error processing module produces is transformed to light signal output; Software system module is used for the control to whole testing device; Described photoelectricity, electrooptic conversion module are provided with input of light mouth and the output of light mouth, and photoelectricity, electrooptic conversion module are connected with bit error processing module, and bit error processing module is provided with electricity mouthful input and electricity mouthful output, and bit error processing module is connected with clock generating module; Described clock generating module, bit error processing module and photoelectricity, electrooptic conversion module all are connected with communication interface modules, and communication interface modules is connected with outer computer or controller, is embedded with software system module in outer computer or the controller.
Further, the testing apparatus of above-mentioned digital communication error rate, described communication interface modules comprises processor and communication interface, photoelectricity, electrooptic conversion module comprise photoelectric conversion module and electrooptic conversion module, and bit error processing module comprises error code detection module, sign indicating number type generation module, receiving interface module, transmission interface module; Photoelectric conversion module is connected in the input of light mouth, electrooptic conversion module is connected in the output of light mouth, photoelectric conversion module all is connected with processor with electrooptic conversion module, photoelectric conversion module connects the receiving interface module, electrooptic conversion module connects the transmission interface module, the receiving interface module is connected in an electricity mouthful input, the transmission interface module is connected in electricity mouthful output, the receiving interface module connects error code detection module, the transmission interface module connects sign indicating number type generation module, error code detection module all is connected with processor with sign indicating number type generation module, also all is connected with clock generating module; Clock generating module connection processing device, processor links to each other with outer computer or controller by communication interface.
Further, the testing apparatus of above-mentioned digital communication error rate, described communication interface is USB interface or Ethernet interface or other control unit interface, processor is set up communication link by communication interface and outer computer or controller, finishes the conversion between the command format that the control command and the internal circuit chip of outer computer or controller can be discerned.
Further, the testing apparatus of above-mentioned digital communication error rate, described software system module can be inquired about the state information of light mouth and electricity mouth, can distinguish the error rate of display light mouth and electricity mouth; Can also inquire about warning message, display light mouth output laser power.
Substantive distinguishing features and obvious improvement that technical solution of the present invention is outstanding are mainly reflected in:
The present invention designs uniqueness, novel structure, have the electricity mouthful and the error code testing function of light mouth, can be as independently testing equipment use, also can or be integrated in the Auto-Test System and use, can carry out error rate test the transceiver module of 10G or equipment and the subsystem of 10G by Long-distance Control.Simple for structure, volume is small and exquisite, low cost of manufacture, be rated as have novelty, the good technology of creativeness, practicality, simple and easy being suitable for, application prospect is very good.
Description of drawings
Below in conjunction with accompanying drawing technical solution of the present invention is described further:
Fig. 1: the functional block diagram of apparatus of the present invention;
Fig. 2: the functional block diagram that 10G XFP/SFP+ optical module is carried out error rate test;
Fig. 3: the functional block diagram that 10G ROSA is carried out sensitivity test.
The implication of each Reference numeral sees the following form among the figure:
| Reference numeral | Implication | Reference numeral | Implication | Reference | Implication | |
| 1 | |
101 | |
102 | Communication interface |
| 2 | Photoelectricity, |
201 | |
202 | |
| 3 | Bit error processing module | 301 | Error |
302 | Sign indicating number type generation module |
| 303 | The |
304 | The |
4 | |
| 5 | |
6 | Outer computer or |
7 | |
| 8 | Attenuator | 9 | The digital communication signal analyzer | 10 | Receive optical module |
| A | The input of light mouth | B | The output of light mouth | C | Electricity mouthful input |
| D | Electricity mouthful output | E | External clock |
Embodiment
The testing apparatus of digital communication error rate as shown in Figure 1 comprises communication interface modules 1, is used for and being connected of outer computer or controller 6; Bit error processing module 3 is used for device under test or system are carried out bit error analyzing, and the result is kept in the local register; Clock generating module 4 is used for according to the Instruction Selection of communication interface modules 1 operation clock, and will move clock and offer bit error processing module 3; Photoelectricity, electrooptic conversion module 2, the converting optical signals that is used for the outside input is that the signal of telecommunication sends bit error processing module 3 to, and the high-speed electrical signals that bit error processing module 3 produces is transformed to light signal output; Software system module 5 is used for the control to whole testing device.
Wherein, photoelectricity, electrooptic conversion module 2 are provided with light mouth input A and light mouth output B, photoelectricity, electrooptic conversion module 2 are connected with bit error processing module 3, and bit error processing module 3 is provided with electricity mouthful input C and electricity mouthful output D, and bit error processing module 3 is connected with clock generating module 4; Described clock generating module 4, bit error processing module 3 and photoelectricity, electrooptic conversion module 2 all are connected with communication interface modules 1, and communication interface modules 1 is connected with outer computer or controller 6, are embedded with software system module 5 in outer computer or the controller 6.
During specific design, as shown in Figure 2, communication interface modules 1 comprises processor 101 and communication interface 102, photoelectricity, electrooptic conversion module 2 comprise photoelectric conversion module 201 and electrooptic conversion module 202, and bit error processing module 3 comprises error code detection module 301, sign indicating number type generation module 302, receiving interface module 303, transmission interface module 304; Light mouth input A connects photoelectric conversion module 201, light mouth output B connects electrooptic conversion module 202, photoelectric conversion module 201 all is connected with processor 101 with electrooptic conversion module 202, photoelectric conversion module 201 connects receiving interface module 303, electrooptic conversion module 202 connects transmission interface module 304, an electricity mouthful input C connects receiving interface module 303, an electricity mouthful output D connects transmission interface module 304, receiving interface module 303 connects error code detection module 301, transmission interface module 304 connects sign indicating number type generation module 302, error code detection module 301 all is connected with processor 101 with sign indicating number type generation module 302, also all is connected with clock generating module 4; Clock generating module 4 connection processing devices 101, processor 101 links to each other with outer computer or controller 6 by communication interface 102.
Set up communication port with outer computer 6 by processor 101, it can set up communication link with the USB port of outer computer or ethernet port or other controller.Be converted into the communication instruction form that the internal circuit chip can discern and be transferred to circuit chip from the control command of outer computer or controller, vice versa.It can the control circuit chip and inquires about the IC state by the content that reads internal register, reads the error rate analyzer result.
Photoelectricity, electrooptic conversion module 2 are used for light signal is converted to the signal of telecommunication and converts the electrical signal to light signal, the signal of telecommunication that electrooptic conversion module 202 receives from the test data sign indicating number type of bit error processing module, the output of generation digital optical signal is by light mouth output B output.Photoelectric conversion module 201 receives from the light signal of light mouth input A and is converted to the signal of telecommunication and is sent to receiving interface module 303.Also have functions such as Output optical power monitoring, loss of signal alarm, these functions can help the user to determine signal quality and do failure analysis and judge.
Sign indicating number type generation module 302 is used to produce the required sign indicating number type sequence of test, can produce pseudo-random code sequence or User Defined sequence according to the instruction of communication interface; Transmission interface module 304 is used for the bit sequence that sign indicating number type generation module 302 produces is converted to high-speed electrical signals, by electricity mouthful output D or electrooptic conversion module light mouth output B send at a high speed; Receiving interface module 303 is used to select electric at a high speed mouthful input C or photoelectric conversion module light mouth to import the signal of A input, recovers clock and data from high-speed electrical signals, and it is fed back to error code detection module 301; Error code detection module 301 is used for the data-signal sign indicating number type that will receive and initial test patterns type and compares, thereby carries out the statistics and analysis of error code, and analysis result is kept in the register.
The control fully that software system module 5 is realized whole device, comprise: configuration module, be used for after device powers on, each circuit chip being carried out initialization, guarantee replacement, turn off laser in the photoelectric conversion module or the like the circuit chip set-up register operating state in the bit error processing module; The human-computer interaction interface module after being used for initialization and finishing, receives the various operation control commands of process user, shows the error rate, state information and warning message etc.; The bottom layer driving module is used to provide the bottom layer driving interface, and the end user can be integrated in this device in some special applications, helps to set up the Auto-Test System in the production environment.Have and surpass 20 kinds of different controlled function and can operate control by the user, configuration information can be saved and be written into again, can inquire about the state information of electricity, light signal, and subscriber interface module can display alarm information, the laser power of light mouth output etc.
Use apparatus of the present invention to 10G optical transceiver (XFP/SFP+ optical module) when carrying out error rate test, as Fig. 2, after powering on, device at first each circuit chip is carried out initialization by the configuration module in the software system module 5, guarantee replacement to the circuit chip set-up register operating state in the bit error processing module 3, turn off laser in the photoelectric conversion module 201 etc.The user is provided with various control commands according to the test request of the device under test man-machine interface by software system module 5, selects or the like as selected, the selection of input port, the selection of output port, the sign indicating number type of operation clock.Processor 101 in the communication interface modules is set up physical communication by USB port with outer computer or controller 6 and is connected, and the control command that receives is converted to the communication instruction form that the internal circuit chip can discern and is transferred to circuit chip; Simultaneously, finish the control of circuit chip and inquire about the state of IC by the content that reads internal register.The concrete steps of error code testing are: at first receive the clock setting instruction that outer computer 6 is sent by the processor in the communication interface modules 101, clock generating module 4 is provided with, produce the needed operation clock of error code testing; Sign indicating number type generation module 302 produces required test patterns type sequence, and transmission interface module 304 is converted to high-speed electrical signals with cycle tests, sends by an electricity mouthful output D at a high speed, is connected to the TX end of optical transceiver 7 to be measured.Optical transceiver to be measured 7 carries out after the ring of light returns through attenuators 8, and its RX end is connected to electricity mouthful input C.Receiving interface module 303 is by selecting electricity mouthful conduct input, from the high-speed electrical signals that receives, recover clock and data, and it is fed back to error code detection module 301, error code detection module 301 is compared by the data-signal sign indicating number type that will receive and initial test patterns type, thereby realize the statistics and analysis of error code, and analysis result is kept in the register.Processor 101 in the communication interface modules can regularly be inquired about the content of register, and carries out the conversion of command format, reports outer computer 6 by USB interface then, is demonstrated the result of error code testing on user interface in real time by software system module 5.Simultaneously, on digital communication signal analyzer 9, can show the light eye pattern of optical transceiver 7 to be measured, finish test analysis light signal.The user also can connect the operation clock of a high accuracy clock source when external clock E sets error code testing.
Fig. 3 has illustrated that employing apparatus of the present invention receive the process that optical module (ROSA) carries out sensitivity test to 10G, the signal of light mouth output B output sends to behind attenuator 8 and receives optical module (ROSA) 10, and the signal of telecommunication of ROSA output links to each other with an electricity mouthful input C and carries out the test of sensitivity.Testing procedure and Fig. 2 are similar: at first be provided with by 1 pair of clock generating module 4 of communication interface modules, produce the needed operation clock of error code testing.Sign indicating number type generation module 302 produces required test patterns type sequence, and transmission interface module 304 is converted to high-speed electrical signals with cycle tests, sends electrooptic conversion module 202 to, is transformed to behind the light signal by light mouth output B output.Light signal is sent to ROSA 10 after overdamping, the signal of telecommunication by ROSA 10 outputs links to each other with an electricity mouthful input C, receiving interface module 303 recovers clock and data, and it is fed back to error code detection module 301 by selecting electricity mouthful conduct input from the high-speed electrical signals that receives.Error code detection module 301 is compared by the data-signal sign indicating number type that will receive and initial test patterns type, thereby realizes the statistics and analysis of error code, and analysis result is kept in the register.Processor 101 in the communication interface modules can regularly go to inquire about the content of this register, and carries out the conversion of command format, reports outer computer 6 by USB interface then, demonstrates the error rate in real time by software system module 5 on user interface.By adjusting the attenuation of attenuator 8, the luminous power that reduces to enter ROSA is guaranteeing that the error rate is no more than 10
-12Situation under, the minimum optical power that records is the sensitivity of ROSA.
In sum, apparatus of the present invention have the electricity mouthful and the error code testing function of light mouth, can also can or be integrated in the Auto-Test System by Long-distance Control and use as independently testing equipment use.Simple for structure, volume is small and exquisite, and good looking appearance is easy to use, the function brilliance, and economic benefit and social effect are remarkable, simple and easy being suitable for, market prospects are wide.
What need understand is: above-mentioned explanation is not to be limitation of the present invention, and in the present invention conceived scope, the interpolation of being carried out, conversion, replacement etc. also should belong to protection scope of the present invention.
Claims (3)
1. the testing apparatus of digital communication error rate is characterized in that: comprise
Communication interface modules (1) is used for and being connected of outer computer or controller (6);
Bit error processing module (3) is used for device under test or system are carried out bit error analyzing, and the result is kept in the local register;
Clock generating module (4) is used for according to the Instruction Selection of communication interface modules (1) operation clock, and will move clock and offer bit error processing module (3);
Photoelectricity, electrooptic conversion module (2), the converting optical signals that is used for the outside input is that the signal of telecommunication sends bit error processing module (3) to, and the high-speed electrical signals that bit error processing module (3) produces is transformed to light signal output, carries out the error rate test of optical link;
Software system module (5) is used for the control to whole testing device;
Wherein: described photoelectricity, electrooptic conversion module (2) are provided with light mouth input (A) and light mouth output (B), photoelectricity, electrooptic conversion module (2) are connected with bit error processing module (3), bit error processing module (3) is provided with electricity mouthful input (C) and electricity mouthful output (D), and bit error processing module (3) is connected with clock generating module (4); Described clock generating module (4), bit error processing module (3) and photoelectricity, electrooptic conversion module (2) all are connected with communication interface modules (1), communication interface modules (1) is connected with outer computer or controller (6), is embedded with software system module (5) in outer computer or the controller (6).
2. the testing apparatus of digital communication error rate according to claim 1, it is characterized in that: described communication interface modules (1) comprises processor (101) and communication interface (102), photoelectricity, electrooptic conversion module (2) comprise photoelectric conversion module (201) and electrooptic conversion module (202), and bit error processing module (3) comprises error code detection module (301), sign indicating number type generation module (302), receiving interface module (303), transmission interface module (304); Photoelectric conversion module (201) is connected in light mouth input (A), electrooptic conversion module (202) is connected in light mouth output (B), photoelectric conversion module (201) all is connected with processor (101) with electrooptic conversion module (202), photoelectric conversion module (201) connects receiving interface module (303), electrooptic conversion module (202) connects transmission interface module (304), receiving interface module (303) is connected in an electricity mouthful input (C), transmission interface module (304) is connected in electricity mouthful output (D), receiving interface module (303) connects error code detection module (301), transmission interface module (304) connects sign indicating number type generation module (302), error code detection module (301) all is connected with processor (101) with sign indicating number type generation module (302), also all is connected with clock generating module (4); Clock generating module (4) connection processing device (101), processor (101) links to each other with outer computer or controller (6) by communication interface (102).
3. the testing apparatus of digital communication error rate according to claim 2 is characterized in that: described communication interface (102) is USB interface or Ethernet interface or control unit interface.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US98993007P | 2007-11-24 | 2007-11-24 | |
| US60/989930 | 2007-11-24 | ||
| US60989930 | 2007-11-24 |
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| Publication Number | Publication Date |
|---|---|
| CN101442385A CN101442385A (en) | 2009-05-27 |
| CN101442385B true CN101442385B (en) | 2011-10-19 |
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| CNU2008201780956U Expired - Lifetime CN201341143Y (en) | 2007-11-24 | 2008-11-20 | High-speed digital communication error code tester |
| CN2008101810157A Active CN101442385B (en) | 2007-11-24 | 2008-11-20 | Test device of digital communication error rate |
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| CNU2008201780956U Expired - Lifetime CN201341143Y (en) | 2007-11-24 | 2008-11-20 | High-speed digital communication error code tester |
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Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201341143Y (en) * | 2007-11-24 | 2009-11-04 | 苏州旭创科技有限公司 | High-speed digital communication error code tester |
| CN101640571B (en) * | 2009-08-28 | 2012-09-05 | 京信通信系统（中国）有限公司 | Multipath E1 error code tester and multipath E1 error code testing method |
| CN101882986A (en) * | 2010-06-28 | 2010-11-10 | 深圳市国扬通信股份有限公司 | Error code tester |
| CN103795485A (en) * | 2014-03-06 | 2014-05-14 | 上海贝岭股份有限公司 | High frequency dynamic error rate test system |
| CN104243058B (en) * | 2014-08-22 | 2017-01-25 | 北京捷沃光通科技有限责任公司 | Error code detection device, system and method and optimal sensitivity detection device and method |
| CN104539356B (en) * | 2014-11-28 | 2017-08-11 | 武汉电信器件有限公司 | A kind of 10G multifunctional test systems |
| CN104796938A (en) * | 2015-04-24 | 2015-07-22 | 深圳市国电科技通信有限公司 | Micropower wireless communication error rate detection analyzer |
| CN105588993A (en) * | 2015-08-18 | 2016-05-18 | 杭州华三通信技术有限公司 | Signal test method, tested equipment and signal test system |
| CN107493202B (en) * | 2017-09-29 | 2024-03-22 | 珠海思开达技术有限公司 | Extensible high-speed error code tester |
| CN108900251A (en) * | 2018-06-21 | 2018-11-27 | 青岛海信宽带多媒体技术有限公司 | A kind of optimization method, device and the optical module of optical module balance parameters |
| CN108646121A (en) * | 2018-07-27 | 2018-10-12 | 光梓信息科技（上海）有限公司 | A kind of optical module ageing tester and method |
| CN109194392A (en) * | 2018-08-24 | 2019-01-11 | 武汉恒泰通技术有限公司 | A kind of multi tate error detection system and its detection method |
| CN109067457B (en) * | 2018-08-24 | 2021-10-12 | 武汉恒泰通技术有限公司 | Multi-rate error code analysis detector |
| CN109217921B (en) * | 2018-08-24 | 2021-10-12 | 武汉恒泰通技术有限公司 | Error code testing device and testing method thereof |
| CN109194393B (en) * | 2018-08-24 | 2022-08-12 | 武汉恒泰通技术有限公司 | Multi-rate error code testing device and testing method thereof |
| CN109167640B (en) * | 2018-09-26 | 2021-04-20 | 东莞铭普光磁股份有限公司 | Error code instrument |
| CN108964760A (en) * | 2018-10-12 | 2018-12-07 | 中国电子科技集团公司第三十四研究所 | A kind of test device and test method of multi-path digital optical mode bLock error rate |
| CN109660296B (en) * | 2019-01-08 | 2020-10-20 | 中国人民解放军国防科技大学 | Device and method for detecting optical communication error rate in complex environment |
| CN111654358B (en) * | 2020-05-26 | 2023-03-24 | 中国人民解放军国防科技大学 | Physical layer transmission real error code acquisition device and equipment |
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| CN1531226A (en) * | 2003-03-16 | 2004-09-22 | 华为技术有限公司 | Apparatus and method for analog optical signal code error |
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- 2008-11-20 CN CNU2008201780956U patent/CN201341143Y/en not_active Expired - Lifetime
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| CN1531226A (en) * | 2003-03-16 | 2004-09-22 | 华为技术有限公司 | Apparatus and method for analog optical signal code error |
| CN1688137A (en) * | 2005-04-14 | 2005-10-26 | 武汉电信器件有限公司 | 155 M bit error code analysis tester based on field programmable gate array |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN101442385A (en) | 2009-05-27 |
| CN201341143Y (en) | 2009-11-04 |
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