Multipath E 1 error code tester and multipath E 1 error code testing method
Technical field
The present invention relates to E1 error code testing technology, relate in particular to a kind of multipath E 1 error code tester and multipath E 1 error code testing method.
Background technology
The principle of E1 code error tester is: E1 code error tester self produces the pseudo random sequence signal; Send to E1 equipment to be measured then; E1 equipment to be measured is handled with after processing this pseudo random sequence signal; Issue the E1 code error tester to the E1 signal, whether the pseudo random sequence signal that is produced by the comparison self of E1 code error tester at last is with receive the E1 signal of returning from E1 equipment consistent, then with the test result report of user.
Traditional E1 code error tester; Its structure is as shown in Figure 1; Comprise the E1 signaling interface, TVS pipe, transformer chip, E1 interface chip, FPGA and the monitoring module that are electrically connected successively, said monitoring module also is connected with liquid crystal panel, key panel respectively, realizes visual and human-machine operation.Wherein, The pseudo random sequence signal that E1 code error tester self produces specifically is to be produced by FPGA; Be the high-low level signal that digital device (FPGA is a kind of of digital device) can be discerned, be issued to E1 equipment to be measured again after must converting HDB3 sign indicating number format signal into by the E1 interface chip; The E1 signal of sending out on the E1 equipment to be measured is a HDB3 sign indicating number form, and it issues FPGA on must converting into behind the high-low level signal that digital device can discern again by the E1 interface chip.
Said E1 signaling interface generally adopts BNC (basic network card) interface; Carry out the transmission of signal through bnc interface between EI equipment and the E1 code error tester, and, can only carry out the signal transmission of single channel; That is: the E1 code error tester is when E1 equipment signals down; Can only adopt the TX signal shown in Fig. 1, and E1 equipment can only adopt the RX signal shown in Fig. 1 when on the E1 code error tester, signaling.
When above-mentioned traditional E1 code error tester is used for error code testing, mainly there is following defective:
1, separate unit E1 code error tester can only detect the error code of 1 road E1 signal; When the user need test many E1 equipment or test the multi-channel E 1 signal error code of separate unit E1 equipment; Just need the every road of successive test E1 signal; The E1 code error tester that perhaps is equipped with respective numbers comes by the drive test examination, and equipment cost is high;
When 2, carrying out the multichannel error code testing with many E1 code error testers, the tester need need be provided with the test parameter of E1 code error tester simultaneously one by one by platform operation E1 code error tester; Like testing time, startup test etc., behind the EOT, the tester need be through the liquid crystal panel of tester; By manual error code testing data or the printing test form collected of platform; According to the error code testing data of collecting, the input computer carries out Macro or mass analysis or makes statistical report form, can't satisfy the user and come customization function according to demand; Such as the customizing print statement form etc., lack autgmentability; And testing efficiency is low, and the expense of human resources is big;
3, because traditional E1 code error tester only provides external button to supply the user to operate, and E1 code error tester itself can only provide limited several buttons, thereby has reduced the operability of tester; Every tester all must dispose liquid crystal panel simultaneously, has so just improved the manufacturing cost of equipment greatly;
4,, thereby can not realize managing concentratedly owing to can not pass through the Ethernet interface access to LAN; Need the tester that every equipment is carried out the hand-guided test, increase the dependence of test the record;
5, conventional test methods needs the tester from collecting record test data by platform equipment, imports computer then and carries out statistical analysis, has also reduced the reliability of test data, and increases the workload of statistical analysis.
Summary of the invention
The object of the invention is to overcome the shortcoming and defect of above-mentioned prior art, and a kind of multipath E 1 error code tester is provided, and multipath E 1 error code tester of the present invention can be tested the error code of multi-channel E 1 signal simultaneously.
Another object of the present invention is to provide a kind of multipath E 1 error code testing method.
The object of the invention is realized through following technical proposals: multipath E 1 error code tester comprises:
A plurality of E1 signaling interfaces, each E1 signaling interface are electrically connected with the transformer chip through the TVS pipe that is used for the signal peak clipping respectively;
The transformer chip is used for chip two end signals are isolated, in order to avoid from the transformer chip late-class circuit of the end interface interference effect other end of coming wherein;
The E1 interface chip is used for the mutual conversion between the high-low level signal that HDB3 sign indicating number format signal and error code detection module can discern, and detects LOS (no signal) incident when on E1 equipment, sending out the E1 signal;
Error code detection module; Produce the pseudo random sequence signal and be issued to E1 equipment; The E1 signal that the E1 interface chip is transmitted carries out Error detection; And record number of bit errors (errors), total transmitted bit number and alarm event, alarm event comprises LOS (no signal), LOF (signal frame step-out) and AIS incidents such as (complete " 1 " alarms);
The local accent surveyed (CIT, craft interface terminal) module, is used to read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down; The statistics alarm event; Calculate relevant error code testing data according to number of bit errors with total transmitted bit number, these relevant error code testing data comprise SES (ES, error seconds), Severely Errored Second (SES; Severely errored second) and unavailable second (UAS, unavailable second) etc.; Operate and monitor according to monitor message;
The local accent surveyed (CIT; Craft interface terminal) interface links to each other with exterior PC, is used to receive the monitor message that exterior PC transmits; And reporting local the accent to survey error code testing data and the alarm event that module transmits, these error code testing data comprise the number of bit errors that error code detection module writes down.
Said E1 signaling interface is bnc interface or RJ45 interface.
Said E1 signaling interface is preferably 8, and each E1 signaling interface is connected with 2 (when the E1 signaling interface is bnc interface) or 4 (when the E1 signaling interface is the RJ45 interface) TVS pipes simultaneously, and then, each TVS pipe is electrically connected with the transformer chip respectively.
Said error code detection module adopts digital devices such as FPGA.
The said local survey module of transferring is provided with: the FPGA module; Be used to read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down; The statistics alarm event calculates relevant error code testing data according to number of bit errors with total transmitted bit number, and these relevant error code testing data comprise SES (ES; Errorseconds), Severely Errored Second (SES; Severely errored second) and unavailable second (UAS, unavailable second) etc., and according to monitor message operate and monitor; Control module is used to carry out the data distribution; Log pattern is used to preserve error code testing data and alarm event; The local accent surveyed (CIT, craft interface terminal) submodule, is used to realize the local communication of surveying between interface and the control module of transferring; Said FPGA module is with after control module is connected, and surveys submodule and is connected with log pattern, the local accent respectively.
Said log pattern adopts ferroelectric memory (fram).
Preferably, said exterior PC is provided with the hyper terminal of the monitor message that is used to receive user's input, and the user gives code error tester through hyper terminal input monitoring information, realizes local operation and monitoring.
Multipath E 1 error code tester of the present invention can also be realized the centralized management to multipath E 1 error code tester through networking mode; Optimized technical scheme is: said multipath E 1 error code tester also is provided with Ethernet interface; Said local the accent surveyed the corresponding processing data packets module that also is provided with the reception, parsing and the encapsulation transmission that are used for packet of module; The local control module of surveying module of transferring is successively with after processing data packets module, Ethernet interface are connected; Be connected with the host computer that is used for multipath E 1 error code tester is managed concentratedly through Ethernet again, error code testing data and alarm event are uploaded to host computer.
Said processing data packets module is preferably the SNMP module of the reception, parsing and the encapsulation transmission that are used for SNMP (Simple Network Management Protocol) bag.
Said host computer can be provided with user's control module; Be used to the error code testing data and the alarm event that show that multipath E 1 error code tester is uploaded; With the monitor message that receives user's input and be transferred to corresponding multipath E 1 error code tester, realize remote operation, monitoring and centralized management.
Said host computer can be provided with and be used for statistical analysis module that error code testing data and alarm event are carried out statistical analysis.
Said host computer can also be provided with the printing customized module that is used for the customizing print testing journal sheet, prints customized module and can print concrete error code testing data, alarm event according to user's customization.
The E1 error-code testing method of multipath E 1 error code tester, concrete steps are following:
A. error code detection module produces the pseudo random sequence signal and is issued to each E1 equipment through E1 interface chip, transformer chip, TVS pipe and E1 signaling interface successively;
B. each E1 equipment is handled the pseudo random sequence signal and after processing, is gone up respectively and send out the E1 signal to the E1 signaling interface;
The c.TVS pipe carries out peak clipping after the transformer chip is sent to the E1 interface chip to each road E1 signal;
The E1 signal that the high-low level that the E1 conversion of signals that the d.E1 interface chip transmits the transformer chip becomes error code detection module to discern is represented, and detect the LOS incident;
E. error code detection module to the E1 interface chip transmit each road E1 signal carry out frame synchronization, Error detection; And record number of bit errors (errors), total transmitted bit number and alarm event, alarm event comprises LOS (no signal), LOF (signal frame step-out) and AIS incidents such as (complete " 1 " alarms);
F. local accent is surveyed module and is read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down; The statistics alarm event; Calculate relevant error code testing data according to number of bit errors with total transmitted bit number; And error code testing data and alarm event are sent to local the accent survey interface and report, these error code testing data comprise the number of bit errors that error code detection module writes down.
In the above-mentioned E1 error-code testing method; The user can pass through exterior PC input monitoring information; And transfer to survey interface through this locality and be input to local the accent and survey module, the local accent surveyed module and carried out local operation and monitoring according to the monitor message of user's input, and the result transferred through this locality survey interface and output to exterior PC.Preferably, the user is through being arranged at the hyper terminal input monitoring information of exterior PC.
In the above-mentioned E1 error-code testing method; The said local accent of step f is surveyed module and is read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down; The statistics alarm event; Calculate relevant error code testing data according to number of bit errors, and error code testing data and alarm event are sent to the local survey interface of transferring report, its concrete operations are following:
F.1. the local number of bit errors of surveying the FPGA module poll error code detection module in the module and being write down, total transmitted bit number and the alarm event transferred;
F.2. when error code detection module has new number of bit errors, total transmitted bit number or alarm event to produce; The local FPGA module of surveying in the module of transferring reads; The statistics alarm event; Calculate relevant error code testing data according to number of bit errors with total transmitted bit number, new error code testing data, alarm event are sent to control module, control module sends to local survey submodule, the log pattern transferred respectively with error code testing data and alarm event; Wherein local accent survey submodule outputs to exterior PC with the data that receive through this locality accent survey interface and shows that log pattern is then preserved error code testing data and alarm event.
When multipath E 1 error code tester of the present invention is provided with Ethernet interface; The said local survey module of transferring is provided with the processing data packets module; Said control module is successively with after processing data packets module, Ethernet interface are connected; When being connected with host computer through Ethernet, the f.2. described control module of step also sends to the encapsulation that the processing data packets module is carried out network packet with error code testing data and alarm event simultaneously, then network packet is sent to host computer through Ethernet interface through Ethernet.Host computer can according to user's customization, be printed concrete error code testing data, alarm event through the printing customized module of its setting; Also can carry out statistical analysis to error code testing data and alarm event through the statistical analysis module of its setting.
When said processing data packets module was the SNMP module, the SNMP module was packaged into SNMP (Simple Network Management Protocol) bag with error code testing data and alarm event.
In the above-mentioned E1 error-code testing method, the local survey module of transferring can also operate and monitor according to the monitor message of user's input, specifically can be exterior PC local operation and method for supervising or network remote operation and method for supervising.
Wherein, Exterior PC local operation and method for supervising are specific as follows: the local this locality surveyed in the module of transferring transfers said local accent of survey submodule monitoring to survey interface; When receiving the monitor message of user through exterior PC input; The local survey submodule of transferring converts this monitor message the monitor message of system message structure into and sends to control module; Control module is forwarded to the FPGA module with the monitor message of system message structure; The FPGA module carries out behind the read-write operation result being turned back to control module to error code detection module according to the monitor message of this system message structure, control module again with the result after this locality transfer to be surveyed submodule and is carried out Structure Conversion, survey interface and output to exterior PC and show through local the accent.
Network remote operation and method for supervising are specific as follows: processing data packets module monitors Ethernet interface; When receiving the network packet of user through host computer input; This network packet of processing data packets module parses and convert into system message structure monitor message and send to control module; Control module is forwarded to the FPGA module with the monitor message of system message structure; The FPGA module carries out behind the read-write operation result being turned back to control module to error code detection module according to the monitor message of this system message structure, and control module becomes network packet with the result through the processing data packets module package again, outputs to host computer through Ethernet interface through Ethernet then.
The present invention has following advantage and effect with respect to prior art:
(1) multipath E 1 error code tester of the present invention is provided with a plurality of E1 signaling interfaces, can insert multi-channel E 1 signal simultaneously, carries out the error code testing of multi-channel E 1 signal simultaneously, greatly reduces equipment cost, helps promotion and application;
(2) user can pass through exterior PC input monitoring information; Transfer the survey module to carry out local operation and monitoring by this locality of multipath E 1 error code tester according to this monitor message; Need manual operations and monitoring than existing code error tester, improved the operability of equipment; Simultaneously, exterior PC also can display operation and the result of monitoring, and collection operation, monitoring and test are shown in one, have improved testing efficiency greatly, have saved the expense of human resources;
(3) multipath E 1 error code tester of the present invention can be connected to host computer through Ethernet through Ethernet interface is set, and has realized net working operation and monitoring, simultaneously, has realized that also network remote shows error code testing data and alarm event; Simultaneously, 1 host computer can be networked with many multipath E 1 error code testers through Ethernet simultaneously, has realized the centralized management to many multipath E 1 error code testers; Also improved testing efficiency greatly; Save the expense of human resources, reduced equipment cost, helped promotion and application;
(4) multipath E 1 error code tester of the present invention adopts polling mechanism to read error code testing data and alarm event, and is intelligent strong;
(5) multipath E 1 error code tester of the present invention adopts exterior PC or host computer to collect error code testing data and alarm event, than the manual collection mode of available technology adopting, has reduced the dependence of test process to the test record personnel;
(6) host computer of the present invention can according to user's customization, be printed concrete error code testing data, alarm event through the printing customized module of its setting; Also can carry out statistical analysis to error code testing data and alarm event through the statistical analysis module of its setting, favorable expandability provides testing efficiency, has saved the expense of human resources.
(6) the E1 signaling interface of multipath E 1 error code tester of the present invention can adopt the RJ45 interface, reaches two-wire differential signal transmission RX, TX, the enhancing signal antijamming capability.
Description of drawings
Fig. 1 is traditional E1 code error tester structure chart;
Fig. 2 is the structure chart of embodiment multipath E 1 error code tester;
Fig. 3 is the error-code testing method schematic flow sheet of embodiment multipath E 1 error code tester.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention is done to specify further, but execution mode of the present invention is not limited thereto.
Embodiment 1
Multipath E 1 error code tester, as shown in Figure 2, comprising:
A plurality of E1 signaling interfaces, each E1 signaling interface are electrically connected with the transformer chip through the TVS pipe that is used for the signal peak clipping respectively;
The transformer chip is used for chip two end signals are isolated, in order to avoid from the transformer chip late-class circuit of the end interface interference effect other end of coming wherein;
The E1 interface chip; Be used for the mutual conversion between the high-low level signal that HDB3 sign indicating number format signal and error code detection module can discern; "+1 " that is embodied in the HDB3 sign indicating number corresponding to digital signal " 10 ", and " 1 " corresponding to " 01 ", " 0 " corresponding with " 00 "; And detect the LOS incident when on E1 equipment, sending out the E1 signal;
Error code detection module; Produce the pseudo random sequence signal and be issued to E1 equipment; The E1 signal that the E1 interface chip is transmitted carries out Error detection; And record number of bit errors (errors), total transmitted bit number and alarm event, alarm event comprises LOS (no signal), LOF (signal frame step-out) and AIS incidents such as (complete " 1 " alarms);
The local accent surveyed (CIT, craft interface terminal) module, is used to read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down; The statistics alarm event; Calculate relevant error code testing data according to number of bit errors with total transmitted bit number, these relevant error code testing data comprise SES (ES, error seconds), Severely Errored Second (SES; Severely errored second) and unavailable second (UAS, unavailable second) etc.; Operate and monitor according to monitor message;
The local accent surveyed (CIT; Craft interface terminal) interface links to each other with exterior PC, is used to receive the monitor message that exterior PC transmits; And reporting local the accent to survey error code testing data and the alarm event that module transmits, these error code testing data comprise the number of bit errors that error code detection module writes down.
Said E1 signaling interface is bnc interface or RJ45 interface.When interface is bnc interface, as shown in Figure 2, have only single line to transmit signal RX, TX, when interface is the RJ45 interface, adopt two-wire differential signal transmission RX+, RX-, and differential signal TX+, TX-.
In the present embodiment, said E1 signaling interface is preferably 8, and each E1 signaling interface is connected with 2 (when the E1 signaling interface is bnc interface) or 4 (when the E1 signaling interface is the RJ45 interface) TVS pipes simultaneously, and then, each TVS pipe is electrically connected with the transformer chip respectively.
In the present embodiment, said error code detection module adopts FPGA.
The said local survey module of transferring is provided with: the FPGA module; Be used to read number of bit errors, total transmitted bit number and the alarm event that FPGA writes down, the statistics alarm event calculates relevant error code testing data according to number of bit errors with total transmitted bit number; Should relevant error code testing data comprise SES (ES; Error seconds), Severely Errored Second (SES, severely errored second) and unavailable second (UAS, unavailablesecond) etc.; Control module is used to carry out the data distribution; Log pattern is used to preserve error code testing data and alarm event; The local accent surveyed submodule, is used to realize the local communication of surveying between interface and the control module of transferring; Said FPGA module is with after control module is connected, and surveys submodule and is connected with log pattern, the local accent respectively.
Said log pattern adopts ferroelectric memory (fram).
Preferably, said exterior PC is provided with the hyper terminal that is used to receive user's input monitoring information, and the user gives code error tester through hyper terminal input monitoring information, realizes local operation and monitoring.
Multipath E 1 error code tester of the present invention can also be realized the centralized management to multipath E 1 error code tester through networking mode; Optimized technical scheme is: said multipath E 1 error code tester is provided with Ethernet interface; Said local the accent surveyed the processing data packets module that the module relative set is useful on reception, parsing and the encapsulation transmission of packet; The local control module of surveying module of transferring is successively with after processing data packets module, Ethernet interface are connected; Be connected with the host computer that is used for multipath E 1 error code tester is managed concentratedly through Ethernet again, error code testing data and alarm event are uploaded to host computer.
The SNMP module that said processing data packets module is sent for the reception, parsing and the encapsulation that are used for SNMP (Simple Network Management Protocol) bag.
Said host computer can be provided with user's control module; Be used to show the error code testing data and the alarm event that report of multipath E 1 error code tester; With the monitor message that receives user's input and be transferred to corresponding multipath E 1 error code tester, realize remote operation, monitoring and centralized management.
Said host computer can be provided with and be used for statistical analysis module that error code testing data and alarm event are carried out statistical analysis.
Said host computer can be provided with the printing customized module that is used for the customizing print testing journal sheet, prints customized module and can print concrete error code testing data, alarm event according to user's customization.
The E1 error-code testing method of above-mentioned multipath E 1 error code tester, as shown in Figure 3, concrete steps are following:
A.FPGA produces the pseudo random sequence signal and is issued to each E1 equipment through E1 interface chip, transformer chip, TVS pipe and E1 signaling interface successively;
B. each E1 equipment is handled the pseudo random sequence signal and after processing, is gone up respectively and send out the E1 signal to the E1 signaling interface;
The c.TVS pipe carries out peak clipping after the transformer chip is sent to the E1 interface chip to each road E1 signal;
The E1 signal that the high-low level that the E1 conversion of signals that the d.E1 interface chip transmits the transformer chip becomes FPGA to discern is represented, and detect the LOS incident;
E.FPGA to the E1 interface chip transmit each road E1 signal carry out frame synchronization, Error detection; And record number of bit errors (errors), total transmitted bit number and alarm event, alarm event comprises LOS (no signal), LOF (signal frame step-out) and AIS incidents such as (complete " 1 " alarms);
F. the module of surveying local accent reads number of bit errors, total transmitted bit number and the alarm event that FPGA writes down; The statistics alarm event; Calculate relevant error code testing data according to number of bit errors with total transmitted bit number; And error code testing data and alarm event are sent to local the accent survey interface and report, these error code testing data comprise the number of bit errors that error code detection module writes down.
In the above-mentioned E1 error-code testing method; The user can pass through exterior PC input monitoring information; And transfer to survey interface through this locality and be input to local the accent and survey module, the local accent surveyed module and carried out local operation and monitoring according to the monitor message of user's input, and the result transferred through this locality survey interface and output to exterior PC.Preferably, the user is through being arranged at the hyper terminal input monitoring information of exterior PC.
In the above-mentioned E1 error-code testing method; The module of surveying the said local accent of step f reads number of bit errors, total transmitted bit number and the alarm event that FPGA writes down; The statistics alarm event; Calculate relevant error code testing data according to number of bit errors and total transmitted bit number, and error code testing data and alarm event are sent to the local survey mouth of transferring report, its concrete operations are following:
F.1. the local number of bit errors of surveying the FPGA module poll FPGA in the module and being write down, total transmitted bit number and the alarm event transferred, the data of FPGA after being read, all with this data zero setting at every turn;
F.2. when FPGA has new number of bit errors or alarm event to produce; The local FPGA module of surveying in the module of transferring reads; The statistics alarm event; Calculate relevant error code testing data according to number of bit errors with total transmitted bit number, new error code testing data, alarm event are sent to control module, control module sends to local survey submodule, the log pattern transferred respectively with error code testing data and alarm event; Wherein local accent survey submodule outputs to exterior PC with the data that receive through this locality accent survey interface and shows that log pattern is then preserved error code testing data and alarm event.
The f.2. described control module of step also sends to the encapsulation that the processing data packets module is carried out network packet with error code testing data and alarm event simultaneously, then network packet is sent to host computer through Ethernet interface through Ethernet.Host computer can according to user's customization, be printed concrete error code testing data, alarm event through the printing customized module of its setting; Also can carry out statistical analysis to error code testing data and alarm event through the statistical analysis module of its setting.
When said processing data packets module was the SNMP module, the SNMP module was packaged into SNMP (Simple Network Management Protocol) bag with error code testing data or alarm event.
In the above-mentioned E1 error-code testing method, the local survey module of transferring can also operate and monitor according to the monitor message of user's input, specifically can be exterior PC local operation and method for supervising or network remote operation and method for supervising.
Wherein, Exterior PC local operation and method for supervising are specific as follows: the local this locality surveyed in the module of transferring transfers said local accent of survey submodule monitoring to survey interface; When receiving the monitor message of user through exterior PC input; The local survey module of transferring converts this monitor message the monitor message of system message structure into and sends to control module; Control module is forwarded to the FPGA module with the monitor message of system message structure; The FPGA module carries out behind the read-write operation result being turned back to control module to FPGA according to the monitor message of this system message structure, control module again with the result after this locality transfer to be surveyed module and is carried out Structure Conversion, survey interface and output to exterior PC and show through local the accent.
Network remote operation and method for supervising are specific as follows: the said Ethernet interface of processing data packets module monitors; When receiving the network packet of user through host computer input; This network packet of processing data packets module parses and convert into system message structure monitor message and send to control module; Control module is forwarded to the FPGA module with the monitor message of system message structure; The FPGA module carries out behind the read-write operation result being turned back to control module to FPGA according to the monitor message of this system message structure, and control module becomes network packet with the result through the processing data packets module package again, outputs to host computer through Ethernet interface through Ethernet then.
The foregoing description is a preferred implementation of the present invention; But execution mode of the present invention is not limited by the examples; Other any do not deviate from change, the modification done under spirit of the present invention and the principle, substitutes, combination, simplify; All should be the substitute mode of equivalence, be included within protection scope of the present invention.