CN101640571A - Multipath E1 error code tester and multipath E1 error code testing method - Google Patents
Multipath E1 error code tester and multipath E1 error code testing method Download PDFInfo
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Abstract
The invention discloses a multipath E1 error code tester and a multipath E1 error code testing method. The structure of the tester comprises a plurality of E1 signal interfaces, a TVS tube, a transformer chip, an E1 interface chip, an error code detecting module, a local regulating and testing module and a local regulating and testing interface, wherein, the local regulating and testing interfaceis connected with an external PC for receiving monitoring information sent from outside and reporting error code testing data and warning event transmitted from the local regulating and testing module; the error code testing data comprise error code number recorded by the error code testing module. The multipath E1 error code tester of the invention can be connected with an upper computer via a manner of network interconnection and is intensively managed by the upper computer. The invention also can simultaneously perform the multipath E1 error code test.
Description
Technical field
The present invention relates to E1 error code testing technology, relate in particular to a kind of multipath E 1 error code tester and multipath E 1 error code testing method.
Background technology
The principle of E1 code error tester is: E1 code error tester self produces the pseudo random sequence signal, send to E1 equipment to be measured then, E1 equipment to be measured is handled with after processing this pseudo random sequence signal, the E1 signal is issued the E1 code error tester, at last whether the pseudo random sequence signal that is produced by the comparison self of E1 code error tester is with receive the E1 signal of returning from E1 equipment consistent, then with the test result report of user.
Traditional E1 code error tester, its structure as shown in Figure 1, comprise the E1 signaling interface, TVS pipe, transformer chip, E1 interface chip, FPGA and the monitoring module that are electrically connected successively, described monitoring module also is connected with liquid crystal panel, key panel respectively, realizes visual and human-machine operation.Wherein, the pseudo random sequence signal that E1 code error tester self produces specifically is to be produced by FPGA, be the high-low level signal that digital device (FPGA is a kind of of digital device) can be discerned, be issued to E1 equipment to be measured again after must being converted to HDB3 sign indicating number format signal by the E1 interface chip; The E1 signal of sending out on the E1 equipment to be measured is a HDB3 sign indicating number form, and it issues FPGA on must being converted to behind the high-low level signal that digital device can discern again by the E1 interface chip.
Described E1 signaling interface generally adopts BNC (basic network card) interface, carry out the transmission of signal by bnc interface between EI equipment and the E1 code error tester, and, can only carry out the signal transmission of single channel, that is: the E1 code error tester is when E1 equipment signals down, can only adopt the TX signal shown in Fig. 1, and E1 equipment can only adopt the RX signal shown in Fig. 1 when signaling on the E1 code error tester.
When above-mentioned traditional E1 code error tester is used for error code testing, mainly there is following defective:
1, separate unit E1 code error tester can only detect the error code of 1 road E1 signal, when the user need test the multi-channel E 1 signal error code of many E1 equipment or test separate unit E1 equipment, just need the every road of successive test E1 signal, the E1 code error tester that perhaps is equipped with respective numbers comes by drive test examination, equipment cost height;
2, when carrying out the multichannel error code testing with many E1 code error testers, the tester need be by platform operation E1 code error tester, the test parameter of E1 code error tester need be set simultaneously one by one, as the testing time, start test etc., behind the EOT, the tester need be by the liquid crystal panel of tester, by manual error code testing data or the printing test form collected of platform, according to the error code testing data of collecting, the input computer carries out Macro or mass analysis or makes statistical report form, can't satisfy the user and come customization function according to demand,, lack autgmentability such as the customizing print statement form etc.; And testing efficiency is low, and the expense of human resources is big;
3, because traditional E1 code error tester only provides external button to operate for the user, and E1 code error tester itself can only provide limited several buttons, thereby has reduced the operability of tester; Every tester all must dispose liquid crystal panel simultaneously, has so just improved the manufacturing cost of equipment greatly;
4,, thereby can not realize managing concentratedly owing to can not pass through the Ethernet interface access to LAN; Need the tester that every equipment is carried out the hand-guided test, increase the dependence of test the record;
5, traditional method of testing needs the tester from collecting record test data by platform equipment, imports computer then and carries out statistical analysis, has also reduced the reliability of test data, and increases the workload of statistical analysis.
Summary of the invention
The object of the invention is to overcome the shortcoming and defect of above-mentioned prior art, and a kind of multipath E 1 error code tester is provided, and multipath E 1 error code tester of the present invention can be tested the error code of multi-channel E 1 signal simultaneously.
Another object of the present invention is to provide a kind of multipath E 1 error code testing method.
Purpose of the present invention is achieved through the following technical solutions: multipath E 1 error code tester comprises:
A plurality of E1 signaling interfaces, each E1 signaling interface the TVS pipe through being used for the signal peak clipping respectively are electrically connected with the transformer chip;
The transformer chip is used for chip two end signals are isolated, in order to avoid from the transformer chip late-class circuit of the end interface interference effect other end of coming wherein;
The E1 interface chip is used for the mutual conversion between the high-low level signal that HDB3 sign indicating number format signal and error code detection module can discern, and detects LOS (no signal) incident when sending out the E1 signal on E1 equipment;
Error code detection module, produce the pseudo random sequence signal and be issued to E1 equipment, the E1 signal that the E1 interface chip is transmitted carries out Error detection, and record number of bit errors (errors), total transmitted bit number and alarm event, alarm event comprises LOS (no signal), LOF (signal frame step-out) and AIS incidents such as (complete " 1 " alarms);
The local accent surveyed (CIT, craft interface terminal) module, be used to read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, these relevant error code testing data comprise SES (ES, error seconds), Severely Errored Second (SES, severely errored second) and unavailable second (UAS, unavailable second) etc.; Operate and monitor according to monitor message;
The local accent surveyed (CIT, craft interface terminal) interface links to each other with exterior PC, is used to receive the monitor message that exterior PC transmits, and reporting local the accent to survey error code testing data and the alarm event that module transmits, these error code testing data comprise the number of bit errors that error code detection module writes down.
Described E1 signaling interface is bnc interface or RJ45 interface.
Described E1 signaling interface is preferably 8, and each E1 signaling interface is connected with 2 (when the E1 signaling interface is bnc interface) or 4 (when the E1 signaling interface is the RJ45 interface) TVS pipes simultaneously, and then, each TVS pipe is electrically connected with the transformer chip respectively.
Described error code detection module adopts digital devices such as FPGA.
The described local survey module of transferring is provided with: the FPGA module, be used to read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, should relevant error code testing data comprise SES (ES, errorseconds), Severely Errored Second (SES, severely errored second) and unavailable second (UAS, unavailable second) etc., and according to monitor message operate and monitor; Control module is used to carry out the data distribution; Log pattern is used to preserve error code testing data and alarm event; The local accent surveyed (CIT, craft interface terminal) submodule, is used to realize the local communication of surveying between interface and the control module of transferring; Described FPGA module is with after control module is connected, and surveys submodule and is connected with log pattern, the local accent respectively.
Described log pattern adopts ferroelectric memory (fram).
Preferably, described exterior PC is provided with the hyper terminal of the monitor message that is used to receive user's input, and the user gives code error tester by hyper terminal input monitoring information, realizes local operation and monitoring.
Multipath E 1 error code tester of the present invention can also be by the centralized management of networking mode realization to multipath E 1 error code tester, optimized technical scheme is: described multipath E 1 error code tester also is provided with Ethernet interface, described local the accent surveys that module is corresponding also to be provided with the reception that is used for packet, resolve and encapsulate the processing data packets module that sends, local transfer survey module control module successively with the processing data packets module, after Ethernet interface is connected, be connected with the host computer that is used for multipath E 1 error code tester is managed concentratedly by Ethernet again, error code testing data and alarm event are uploaded to host computer.
Described processing data packets module is preferably the SNMP module of the reception, parsing and the encapsulation transmission that are used for SNMP (Simple Network Management Protocol) bag.
Described host computer can be provided with user's control module, be used to the error code testing data and the alarm event that show that multipath E 1 error code tester is uploaded, with the monitor message that receives user's input and be transferred to corresponding multipath E 1 error code tester, realize remote operation, monitoring and centralized management.
Described host computer can be provided with and be used for statistical analysis module that error code testing data and alarm event are carried out statistical analysis.
Described host computer can also be provided with the printing customized module that is used for the customizing print testing journal sheet, prints customized module and can print concrete error code testing data, alarm event according to user's customization.
The E1 error-code testing method of multipath E 1 error code tester, concrete steps are as follows:
A. error code detection module produces the pseudo random sequence signal and is issued to each E1 equipment through E1 interface chip, transformer chip, TVS pipe and E1 signaling interface successively;
B. each E1 equipment is handled the pseudo random sequence signal and after processing, is gone up respectively and send out the E1 signal to the E1 signaling interface;
The c.TVS pipe carries out peak clipping after the transformer chip is sent to the E1 interface chip to each road E1 signal;
The E1 signal that the high-low level that the E1 conversion of signals that the d.E1 interface chip transmits the transformer chip becomes error code detection module to discern is represented, and detect the LOS incident;
E. error code detection module to the E1 interface chip transmit each road E1 signal carry out frame synchronization, Error detection, and record number of bit errors (errors), total transmitted bit number and alarm event, alarm event comprises LOS (no signal), LOF (signal frame step-out) and AIS incidents such as (complete " 1 " alarms);
F. local accent is surveyed module and is read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, and error code testing data and alarm event are sent to local the accent survey interface and report, these error code testing data comprise the number of bit errors that error code detection module writes down.
In the above-mentioned E1 error-code testing method, the user can pass through exterior PC input monitoring information, and transfer to survey interface by this locality and be input to local the accent and survey module, the local accent surveyed module and carried out local operation and monitoring according to the monitor message of user's input, and the result transferred through this locality survey interface and output to exterior PC.Preferably, the user is by being arranged at the hyper terminal input monitoring information of exterior PC.
In the above-mentioned E1 error-code testing method, the described local accent of step f is surveyed module and is read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors, and error code testing data and alarm event are sent to local the accent survey interface and report, its concrete operations are as follows:
F.1. the local number of bit errors of surveying the FPGA module poll error code detection module in the module and being write down, total transmitted bit number and the alarm event transferred;
F.2. when error code detection module has new number of bit errors, total transmitted bit number or alarm event to produce, the local FPGA module of surveying in the module of transferring reads, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, new error code testing data, alarm event are sent to control module, and control module sends to local survey submodule, the log pattern transferred respectively with error code testing data and alarm event; Wherein local accent survey submodule outputs to exterior PC with the data that receive by this locality accent survey interface and shows that log pattern is then preserved error code testing data and alarm event.
When multipath E 1 error code tester of the present invention is provided with Ethernet interface, the described local survey module of transferring is provided with the processing data packets module, described control module is successively with after processing data packets module, Ethernet interface are connected, when being connected with host computer by Ethernet, the f.2. described control module of step also sends to the encapsulation that the processing data packets module is carried out network packet with error code testing data and alarm event simultaneously, then network packet is sent to host computer through Ethernet interface by Ethernet.Host computer can according to user's customization, be printed concrete error code testing data, alarm event by the printing customized module of its setting; Also can carry out statistical analysis to error code testing data and alarm event by the statistical analysis module of its setting.
When described processing data packets module was the SNMP module, the SNMP module was packaged into SNMP (Simple Network Management Protocol) bag with error code testing data and alarm event.
In the above-mentioned E1 error-code testing method, the local survey module of transferring can also operate and monitor according to the monitor message of user's input, is specifically as follows operation of exterior PC local operation and method for supervising or network remote and method for supervising.
Wherein, exterior PC local operation and method for supervising are specific as follows: the local this locality surveyed in the module of transferring transfers described local accent of survey submodule monitoring to survey interface, when receiving the monitor message of user by exterior PC input, the local survey submodule of transferring is converted to this monitor message the monitor message of system message structure and sends to control module, control module is forwarded to the FPGA module with the monitor message of system message structure, the FPGA module carries out behind the read-write operation result being turned back to control module to error code detection module according to the monitor message of this system message structure, control module again with the result after this locality transfer to be surveyed submodule and is carried out Structure Conversion, transfer through this locality and to survey interface and output to exterior PC and show.
Network remote operation and method for supervising are specific as follows: processing data packets module monitors Ethernet interface, when receiving the network packet of user by host computer input, this network packet of processing data packets module parses and be converted to system message structure monitor message and send to control module, control module is forwarded to the FPGA module with the monitor message of system message structure, the FPGA module carries out behind the read-write operation result being turned back to control module to error code detection module according to the monitor message of this system message structure, control module becomes network packet with the result through the processing data packets module package again, outputs to host computer through Ethernet interface by Ethernet then.
The present invention has following advantage and effect with respect to prior art:
(1) multipath E 1 error code tester of the present invention is provided with a plurality of E1 signaling interfaces, can insert multi-channel E 1 signal simultaneously, carries out the error code testing of multi-channel E 1 signal simultaneously, greatly reduces equipment cost, helps promotion and application;
(2) user can pass through exterior PC input monitoring information, transfer the survey module to carry out local operation and monitoring by this locality of multipath E 1 error code tester according to this monitor message, need manual operations and monitoring than existing code error tester, improved the operability of equipment; Simultaneously, exterior PC also can display operation and the result of monitoring, and collection operation, monitoring and test are shown in one, have improved testing efficiency greatly, have saved the expense of human resources;
(3) multipath E 1 error code tester of the present invention can be connected to host computer by Ethernet by Ethernet interface is set, and has realized networking operation and monitoring, simultaneously, has realized that also network remote shows error code testing data and alarm event; Simultaneously, 1 host computer can be networked with many multipath E 1 error code testers through Ethernet simultaneously, has realized the centralized management to many multipath E 1 error code testers, also improved testing efficiency greatly, save the expense of human resources, reduced equipment cost, helped promotion and application;
(4) multipath E 1 error code tester of the present invention adopts polling mechanism to read error code testing data and alarm event, and is intelligent strong;
(5) multipath E 1 error code tester of the present invention adopts exterior PC or host computer to collect error code testing data and alarm event, than the manual collection mode of available technology adopting, has reduced the dependence of test process to the test record personnel;
(6) host computer of the present invention can according to user's customization, be printed concrete error code testing data, alarm event by the printing customized module of its setting; Also can carry out statistical analysis to error code testing data and alarm event by the statistical analysis module of its setting, favorable expandability provides testing efficiency, has saved the expense of human resources.
(6) the E1 signaling interface of multipath E 1 error code tester of the present invention can adopt the RJ45 interface, reaches two-wire differential signal transmission RX, TX, the enhancing signal antijamming capability.
Description of drawings
Fig. 1 is traditional E1 code error tester structure chart;
Fig. 2 is the structure chart of embodiment multipath E 1 error code tester;
Fig. 3 is the error-code testing method schematic flow sheet of embodiment multipath E 1 error code tester.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment 1
Multipath E 1 error code tester as shown in Figure 2, comprising:
A plurality of E1 signaling interfaces, each E1 signaling interface the TVS pipe through being used for the signal peak clipping respectively are electrically connected with the transformer chip;
The transformer chip is used for chip two end signals are isolated, in order to avoid from the transformer chip late-class circuit of the end interface interference effect other end of coming wherein;
The E1 interface chip, be used for the mutual conversion between the high-low level signal that HDB3 sign indicating number format signal and error code detection module can discern, "+1 " that is embodied in the HDB3 sign indicating number corresponding to digital signal " 10 ", and " 1 " corresponding to " 01 ", " 0 " corresponding with " 00 "; And detect the LOS incident when on E1 equipment, sending out the E1 signal;
Error code detection module, produce the pseudo random sequence signal and be issued to E1 equipment, the E1 signal that the E1 interface chip is transmitted carries out Error detection, and record number of bit errors (errors), total transmitted bit number and alarm event, alarm event comprises LOS (no signal), LOF (signal frame step-out) and AIS incidents such as (complete " 1 " alarms);
The local accent surveyed (CIT, craft interface terminal) module, be used to read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, these relevant error code testing data comprise SES (ES, error seconds), Severely Errored Second (SES, severely errored second) and unavailable second (UAS, unavailable second) etc.; Operate and monitor according to monitor message;
The local accent surveyed (CIT, craft interface terminal) interface links to each other with exterior PC, is used to receive the monitor message that exterior PC transmits, and reporting local the accent to survey error code testing data and the alarm event that module transmits, these error code testing data comprise the number of bit errors that error code detection module writes down.
Described E1 signaling interface is bnc interface or RJ45 interface.When interface is bnc interface, as shown in Figure 2, have only single line to transmit signal RX, TX, when interface is the RJ45 interface, adopt two-wire differential signal transmission RX+, RX-, and differential signal TX+, TX-.
In the present embodiment, described E1 signaling interface is preferably 8, each E1 signaling interface is connected with 2 (when the E1 signaling interface is bnc interface) or 4 (when the E1 signaling interface is the RJ45 interface) TVS pipes simultaneously, and then, each TVS pipe is electrically connected with the transformer chip respectively.
In the present embodiment, described error code detection module adopts FPGA.
The described local survey module of transferring is provided with: the FPGA module, be used to read number of bit errors, total transmitted bit number and the alarm event that FPGA writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, should relevant error code testing data comprise SES (ES, error seconds), Severely Errored Second (SES, severely errored second) and unavailable second (UAS, unavailablesecond) etc.; Control module is used to carry out the data distribution; Log pattern is used to preserve error code testing data and alarm event; The local accent surveyed submodule, is used to realize the local communication of surveying between interface and the control module of transferring; Described FPGA module is with after control module is connected, and surveys submodule and is connected with log pattern, the local accent respectively.
Described log pattern adopts ferroelectric memory (fram).
Preferably, described exterior PC is provided with the hyper terminal that is used to receive user's input monitoring information, and the user gives code error tester by hyper terminal input monitoring information, realizes local operation and monitoring.
Multipath E 1 error code tester of the present invention can also be by the centralized management of networking mode realization to multipath E 1 error code tester, optimized technical scheme is: described multipath E 1 error code tester is provided with Ethernet interface, described local the accent surveyed the reception that the module relative set is useful on packet, resolve and encapsulate the processing data packets module that sends, local transfer survey module control module successively with the processing data packets module, after Ethernet interface is connected, be connected with the host computer that is used for multipath E 1 error code tester is managed concentratedly by Ethernet again, error code testing data and alarm event are uploaded to host computer.
The SNMP module that described processing data packets module sends for reception, parsing and the encapsulation that is used for SNMP (Simple Network Management Protocol) bag.
Described host computer can be provided with user's control module, be used to show the error code testing data and the alarm event that report of multipath E 1 error code tester, with the monitor message that receives user's input and be transferred to corresponding multipath E 1 error code tester, realize remote operation, monitoring and centralized management.
Described host computer can be provided with and be used for statistical analysis module that error code testing data and alarm event are carried out statistical analysis.
Described host computer can be provided with the printing customized module that is used for the customizing print testing journal sheet, prints customized module and can print concrete error code testing data, alarm event according to user's customization.
The E1 error-code testing method of above-mentioned multipath E 1 error code tester, as shown in Figure 3, concrete steps are as follows:
A.FPGA produces the pseudo random sequence signal and is issued to each E1 equipment through E1 interface chip, transformer chip, TVS pipe and E1 signaling interface successively;
B. each E1 equipment is handled the pseudo random sequence signal and after processing, is gone up respectively and send out the E1 signal to the E1 signaling interface;
The c.TVS pipe carries out peak clipping after the transformer chip is sent to the E1 interface chip to each road E1 signal;
The E1 signal that the high-low level that the E1 conversion of signals that the d.E1 interface chip transmits the transformer chip becomes FPGA to discern is represented, and detect the LOS incident;
E.FPGA to the E1 interface chip transmit each road E1 signal carry out frame synchronization, Error detection, and record number of bit errors (errors), total transmitted bit number and alarm event, alarm event comprises LOS (no signal), LOF (signal frame step-out) and AIS incidents such as (complete " 1 " alarms);
F. the module of surveying local accent reads number of bit errors, total transmitted bit number and the alarm event that FPGA writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, and error code testing data and alarm event are sent to local the accent survey interface and report, these error code testing data comprise the number of bit errors that error code detection module writes down.
In the above-mentioned E1 error-code testing method, the user can pass through exterior PC input monitoring information, and transfer to survey interface by this locality and be input to local the accent and survey module, the local accent surveyed module and carried out local operation and monitoring according to the monitor message of user's input, and the result transferred through this locality survey interface and output to exterior PC.Preferably, the user is by being arranged at the hyper terminal input monitoring information of exterior PC.
In the above-mentioned E1 error-code testing method, the module of surveying the described local accent of step f reads number of bit errors, total transmitted bit number and the alarm event that FPGA writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, and with error code testing data and alarm event send to local transfer to survey mouthful report, its concrete operations are as follows:
F.1. the local number of bit errors of surveying the FPGA module poll FPGA in the module and being write down, total transmitted bit number and the alarm event transferred, the data of FPGA after being read, all with this data zero setting at every turn;
F.2. when FPGA has new number of bit errors or alarm event to produce, the local FPGA module of surveying in the module of transferring reads, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, new error code testing data, alarm event are sent to control module, and control module sends to local survey submodule, the log pattern transferred respectively with error code testing data and alarm event; Wherein local accent survey submodule outputs to exterior PC with the data that receive by this locality accent survey interface and shows that log pattern is then preserved error code testing data and alarm event.
The f.2. described control module of step also sends to the encapsulation that the processing data packets module is carried out network packet with error code testing data and alarm event simultaneously, then network packet is sent to host computer through Ethernet interface by Ethernet.Host computer can according to user's customization, be printed concrete error code testing data, alarm event by the printing customized module of its setting; Also can carry out statistical analysis to error code testing data and alarm event by the statistical analysis module of its setting.
When described processing data packets module was the SNMP module, the SNMP module was packaged into SNMP (Simple Network Management Protocol) bag with error code testing data or alarm event.
In the above-mentioned E1 error-code testing method, the local survey module of transferring can also operate and monitor according to the monitor message of user's input, is specifically as follows operation of exterior PC local operation and method for supervising or network remote and method for supervising.
Wherein, exterior PC local operation and method for supervising are specific as follows: the local this locality surveyed in the module of transferring transfers described local accent of survey submodule monitoring to survey interface, when receiving the monitor message of user by exterior PC input, the local survey module of transferring is converted to this monitor message the monitor message of system message structure and sends to control module, control module is forwarded to the FPGA module with the monitor message of system message structure, the FPGA module carries out behind the read-write operation result being turned back to control module to FPGA according to the monitor message of this system message structure, control module again with the result after this locality transfer to be surveyed module and is carried out Structure Conversion, transfer through this locality and to survey interface and output to exterior PC and show.
Network remote operation and method for supervising are specific as follows: the described Ethernet interface of processing data packets module monitors, when receiving the network packet of user by host computer input, this network packet of processing data packets module parses and be converted to system message structure monitor message and send to control module, control module is forwarded to the FPGA module with the monitor message of system message structure, the FPGA module carries out behind the read-write operation result being turned back to control module to FPGA according to the monitor message of this system message structure, control module becomes network packet with the result through the processing data packets module package again, outputs to host computer through Ethernet interface by Ethernet then.
The foregoing description is a preferred implementation of the present invention; but embodiments of the present invention are not limited by the examples; other any do not deviate from change, the modification done under spirit of the present invention and the principle, substitutes, combination, simplify; all should be the substitute mode of equivalence, be included within protection scope of the present invention.
Claims (10)
1, multipath E 1 error code tester is characterized in that, comprising:
A plurality of E1 signaling interfaces, each E1 signaling interface the TVS pipe through being used for the signal peak clipping respectively are electrically connected with the transformer chip;
The transformer chip is used for chip two end signals are isolated;
The E1 interface chip is used for the mutual conversion between the high-low level signal that HDB3 sign indicating number format signal and error code detection module can discern, and detects the LOS incident when sending out the E1 signal on E1 equipment;
Error code detection module produces the pseudo random sequence signal and is issued to E1 equipment, and the E1 signal that each E1 interface chip is transmitted carries out Error detection, and record number of bit errors, total transmitted bit number and alarm event;
The local accent surveyed module, is used to read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, and the statistics alarm event calculates relevant error code testing data according to number of bit errors with total transmitted bit number; Operate and monitor according to monitor message;
The local accent surveyed interface, links to each other with exterior PC, is used to receive the monitor message that exterior PC transmits, and reports local the accent to survey error code testing data and the alarm event that module transmits, and these error code testing data comprise the number of bit errors that error code detection module writes down.
2, multipath E 1 error code tester according to claim 1 is characterized in that: described E1 signaling interface is bnc interface or RJ45 interface.
3, multipath E 1 error code tester according to claim 1 and 2 is characterized in that: described error code detection module adopts FPGA; The described local survey module of transferring is provided with: the FPGA module, be used to read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, and the statistics alarm event calculates relevant error code testing data according to number of bit errors with total transmitted bit number; Control module is used to carry out the data distribution; Log pattern is used to preserve error code testing data and alarm event; The local accent surveyed interface sub-module, is used to realize the local communication of surveying between interface and the control module of transferring; Described FPGA module is with after control module is connected, and surveys submodule and is connected with log pattern, the local accent respectively.
4, multipath E 1 error code tester according to claim 3, it is characterized in that: described multipath E 1 error code tester also is provided with Ethernet interface, described local the accent surveyed the processing data packets module that module also is provided with the reception, parsing and the encapsulation transmission that are used for packet, the local control module of surveying module of transferring is connected with the host computer that is used for multipath E 1 error code tester is managed concentratedly by Ethernet more successively with after processing data packets module, Ethernet interface are connected.
5, multipath E 1 error code tester according to claim 4 is characterized in that: described exterior PC is provided with the hyper terminal that is used to receive user's input; Described host computer is provided with user's control module, is used to show the error code testing data that report and the alarm event of multipath E 1 error code tester and receives the monitor message of user's input and be transferred to corresponding multipath E 1 error code tester.
6, multipath E 1 error code tester according to claim 4, it is characterized in that: described host computer is provided with: be used for statistical analysis module that error code testing data and alarm event are carried out statistical analysis, be used for customizing print testing journal sheet's printing customized module.
7, multipath E 1 error code testing method is characterized in that, may further comprise the steps:
A. error code detection module produces the pseudo random sequence signal and is issued to each E1 equipment through E1 interface chip, transformer chip, TVS pipe and E1 signaling interface successively;
B. each E1 equipment is handled the pseudo random sequence signal and after processing, is gone up respectively and send out the E1 signal to the E1 signaling interface;
The c.TVS pipe carries out peak clipping after the transformer chip is sent to the E1 interface chip to each road E1 signal;
The E1 signal that the high-low level that the E1 conversion of signals that the d.E1 interface chip transmits the transformer chip becomes error code detection module to discern is represented, and detect the LOS incident;
E. error code detection module to the E1 interface chip transmit each road E1 signal carry out frame synchronization, Error detection, and record number of bit errors, total transmitted bit number and alarm event;
F. local accent is surveyed module and is read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, the statistics alarm event, calculate relevant error code testing data according to the error code number with total transmitted bit number, and error code testing data and alarm event are sent to local the accent survey interface and report, these error code testing data comprise the number of bit errors that error code detection module writes down.
8, multipath E 1 error code testing method according to claim 7 is characterized in that: the described relevant error code testing data of step f comprise SES, Severely Errored Second and unavailable second; Described alarm event comprises: LOS incident, LOF incident and AIS incident.
9, multipath E 1 error code testing method according to claim 7, it is characterized in that: the described local accent of step f is surveyed module and is read number of bit errors, total transmitted bit number and the alarm event that error code detection module writes down, the statistics alarm event, calculate relevant error code testing data according to number of bit errors, and error code testing data and alarm event are sent to local the accent survey interface and report, its concrete operations are as follows:
F.1. the local number of bit errors of surveying the FPGA module poll error code detection module in the module and being write down, total transmitted bit number and the alarm event transferred;
F.2. when error code detection module has new number of bit errors, total transmitted bit number or alarm event to produce, the local FPGA module of surveying in the module of transferring reads, the statistics alarm event, calculate relevant error code testing data according to number of bit errors with total transmitted bit number, new error code testing data, alarm event are sent to control module, and control module sends to local survey submodule, the log pattern transferred respectively with error code testing data and alarm event; Wherein local accent survey submodule outputs to exterior PC with the data that receive by this locality accent survey interface and shows that log pattern is then preserved error code testing data and alarm event.
10, according to each described multipath E 1 error code testing method of claim 7 to 9, it is characterized in that: may further comprise the steps: the local survey module of transferring is carried out local operation and monitoring according to the monitor message of user's input, is specifically as follows operation of exterior PC local operation and method for supervising or network remote and method for supervising:
Exterior PC local operation and method for supervising are specific as follows: the local this locality surveyed in the module of transferring transfers described local accent of survey submodule monitoring to survey interface, when receiving the monitor message of user by exterior PC input, the local survey module of transferring is converted to this monitor message the monitor message of system message structure and sends to control module, control module is forwarded to the FPGA module with the monitor message of system message structure, the FPGA module carries out behind the read-write operation result being turned back to control module to error code detection module according to the monitor message of this system message structure, control module again with the result after this locality transfer to be surveyed module and is carried out Structure Conversion, transfer through this locality and to survey interface and output to exterior PC and show;
Network remote operation and method for supervising are specific as follows: the described Ethernet interface of processing data packets module monitors, when receiving the network packet of user by host computer input, this network packet of processing data packets module parses and be converted to system message structure monitor message and send to control module, control module is forwarded to the FPGA module with the monitor message of system message structure, the FPGA module carries out behind the read-write operation result being turned back to control module to error code detection module according to the monitor message of this system message structure, control module becomes network packet with the result through the processing data packets module package again, outputs to host computer through Ethernet interface by Ethernet then.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102413015A (en) * | 2011-11-28 | 2012-04-11 | 瑞斯康达科技发展股份有限公司 | Circuit simulation service testing method and system |
| CN106230406A (en) * | 2016-07-15 | 2016-12-14 | 张升泽 | The signal modulating method of electronic chip and system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN201341143Y (en) * | 2007-11-24 | 2009-11-04 | 苏州旭创科技有限公司 | High-speed digital communication error code tester |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102413015A (en) * | 2011-11-28 | 2012-04-11 | 瑞斯康达科技发展股份有限公司 | Circuit simulation service testing method and system |
| CN102413015B (en) * | 2011-11-28 | 2014-05-07 | 瑞斯康达科技发展股份有限公司 | Circuit simulation service testing method and system |
| CN106230406A (en) * | 2016-07-15 | 2016-12-14 | 张升泽 | The signal modulating method of electronic chip and system |
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| CN101640571B (en) | 2012-09-05 |
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