CN101436607B - Electric resistance transition memory and manufacturing method thereof - Google Patents
Electric resistance transition memory and manufacturing method thereof Download PDFInfo
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- CN101436607B CN101436607B CN2008102078132A CN200810207813A CN101436607B CN 101436607 B CN101436607 B CN 101436607B CN 2008102078132 A CN2008102078132 A CN 2008102078132A CN 200810207813 A CN200810207813 A CN 200810207813A CN 101436607 B CN101436607 B CN 101436607B
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Abstract
The invention discloses a resistance conversion memorizer and a manufacturing method thereof. The resistance conversion memorizer comprises a gating unit and a data storage unit; the gating unit adopts a Schottky diode; the Schottky diode comprises at least one layer of an antimonial material layer and at least one layer of a semiconductor layer; and the data storage unit comprises at least one layer of an antimonial material layer. Antimonial metal in the memorizer is used as a storage medium for resistance conversion, is used as a metal layer of the Schottky diode and even can be used as a conducting bit line of a memorizer chip. The invention also provides a plurality of methods for manufacturing the resistance conversion memorizer based on the antimonial metal (or alloy) and is expected to obtain larger advantages in the competition of a solid memorizer with high density and low cost.
Description
Technical field
The invention belongs to technical field of semiconductors, relate to a kind of electric resistance transition memory, relate in particular to a kind of based on the electric resistance transition memory that contains antimony metal (or alloy); In addition, the invention still further relates to the manufacture method of above-mentioned electric resistance transition memory.
Background technology
The electric resistance transition memory that comprises phase-change random access memory and resistance random access memory has been subjected to industry as the potential candidate of nonvolatile semiconductor memory of future generation and has paid close attention to greatly, particularly the former, be considered to be hopeful most to substitute the memory of future generation of FLASH (flash memory), enter the print advanced development, will penetrate market in the near future.In phase transition storage, the storage of data is based upon in the change that the phase-change material phase transformation causes material resistance, and the change of material resistance derives from the reversible variation of the structure that causes in the phase-change material heating process; And in the resistance random access memory, the transformation of device resistance is based upon the CER effect (the super huge resistance variations that electric field brings out) of materials such as metal oxide.
Contain antimony metal or alloy and be found the ability with resistance conversion, the principle of its resistance conversion is different from above two kinds.According to the patent application (application number: 200810201407.5 of the applicant (Shanghai Inst. of Microsystem and Information Technology, Chinese Academy of Sci) in application on October 20th, 2008, denomination of invention: " stibium containing material is as the application of resistance conversion storage material ", the inventor: people such as Zhang Ting), stibium containing material has the ability of resistance conversion and the potential application in electric resistance transition memory; And the antimony material can spread silicon as a kind of n type foreign atom commonly used in the semi-conductor industry, thereby the n type that realizes silicon substrate mixes.In addition, contain antimony metal and can be used for making the Schottky diode (Chinese patent of the applicant's application: " based on Schottky diode that contains antimony and autoregistration manufacture method " with semi-conductive the contact, application number: 200810207453.6, inventor: people such as Zhang Ting), thereby be used for electric resistance transition memory is carried out gating and operation.
No matter in phase-change random access memory and resistance random access memory, the density of device all is to feel the key factor of device future market prospect, important component part as memory chip, the area of the logical device in the chip has determined the density of storage chip to a great extent, and for example the area of field-effect transistor is with regard to the area of super diode far away, therefore, in highdensity application, the application of diode more possesses competitive advantage, and prospect more is expected, although the spending of exploitation diode technology is huge.In diode, Schottky diode has advantage on the cost than PN type diode.
Summary of the invention
Technical problem to be solved by this invention is: provide a kind of based on the electric resistance transition memory that contains antimony metal (or alloy), can obtain high density, solid-state memory cheaply.
In addition, the present invention also provides the manufacture method of above-mentioned electric resistance transition memory.
For solving the problems of the technologies described above, the present invention adopts following technical scheme:
A kind of electric resistance transition memory, it comprises gating unit and data storage cell; Gating unit adopts Schottky diode; Described Schottky diode comprises at least one deck stibium containing material layer, one semiconductor layer at least; Data storage cell comprises one deck stibium containing material layer at least.
As a preferred embodiment of the present invention, described stibium containing material layer is the antimony simple metal or is the alloy material that contains antimony.
As a preferred embodiment of the present invention, the component of described stibium containing material layer be antimony and other metals mixture or/and the oxide of antimony or/and the nitride of antimony or/and the nitrogen oxide of antimony.
As a preferred embodiment of the present invention, described stibium containing material layer is as the part of data storage cell, and the while is as the part of gating unit.
As a preferred embodiment of the present invention, described stibium containing material layer is also as the conductive bit in the memory chip.
As a preferred embodiment of the present invention, in the described Schottky diode, form Schottky contacts between stibium containing material layer, the semiconductor layer, be the metal-semiconductor contact, thereby form Schottky diode structure.
As a preferred embodiment of the present invention, described Schottky diode is by one deck stibium containing material layer at least, one semiconductor layer is formed at least; Described data storage cell is made up of one deck stibium containing material layer at least.
As a preferred embodiment of the present invention, described electric resistance transition memory storage is characterized as the twin-stage storage or is multistage storage.
As a preferred embodiment of the present invention, described memory comprises high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.
A kind of method of making electric resistance transition memory, this method comprises the steps:
A1, on the semiconductor-based end of first conduction type or intrinsic, make peripheral circuit;
A2, produce shallow channel, be separated out discrete lines, do not remove photoresist after the shallow channel etching finishes;
A3, inject by ion, formation is to the first conduction type heavy doping of substrate, because the barrier effect of photoresist, discrete lines will not be doped, only first conductive type ion is carried out in shallow channel bottom and injects, form the heavily doped zone of first conduction type, this zone be centered around discrete lines around, be used for each root word line of electric isolation, remove photoresist after injection is finished;
A4, formed the heavily doped word line of second conduction type by the bottom of the separated lines of shallow channel, method is that ion injects or side atom diffusion method;
A5, with shallow channel filled media material, the dielectric material deposit thickness is higher than the degree of depth of shallow channel, after the CMP (Chemical Mechanical Polishing) process planarization, the control polishing thickness makes the word line top keep certain thickness dielectric material;
A6, by photoetching process, optionally the dielectric material of etching word line top all produces a plurality of windows above each single word line, in order to make the Schottky diode unit;
A7, inject by ion again, be injected into ion forms second conduction type on word line by the window of above-mentioned formation light doping section;
A8, deposition stibium containing material form reliable Schottky contacts between the light dope semiconductor of this material and above-mentioned second conduction type;
A9, deposition are different from the electric conducting material of stibium containing material;
A10, photoetching process form bit line, and bit line comprises steps A 9 described conductive material layers and stibium containing material layer, so form based on the electric resistance transition memory array that contains antimony.
As a preferred embodiment of the present invention, described stibium containing material layer is the antimony simple metal or is the alloy material that contains antimony.
As a preferred embodiment of the present invention, the component of described stibium containing material layer be antimony and other metals mixture or/and the oxide of antimony or/and the nitride of antimony or/and the nitrogen oxide of antimony.
As a preferred embodiment of the present invention, described stibium containing material layer is as the part of data storage cell, and the while is as the part of gating unit.
As a preferred embodiment of the present invention, described stibium containing material layer is also as the conductive bit in the memory chip.
As a preferred embodiment of the present invention, in the described Schottky diode, form Schottky contacts between stibium containing material layer, the semiconductor layer, be the metal-semiconductor contact, thereby form Schottky diode.
As a preferred embodiment of the present invention, described Schottky diode is by one deck stibium containing material layer at least, one semiconductor layer is formed at least; Described data storage cell is made up of one deck stibium containing material layer at least.
As a preferred embodiment of the present invention, described electric resistance transition memory storage is characterized as the twin-stage storage or is multistage storage.
As a preferred embodiment of the present invention, described memory comprises high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.
As a preferred embodiment of the present invention, described method also comprises the annealing in process step, has deposited the annealing of carrying out behind the stibium containing material in steps A 8 and has been used to improve interface between stibium containing material and the semiconductor.
The another kind of method of making electric resistance transition memory, this method comprises the steps:
B1, manufacturing peripheral circuit;
B2, the semiconductor-based end of adopting first conduction type or intrinsic, inject lightly doped semiconductor layer of second conduction type and the heavily doped semiconductor layer of second conduction type that forms closely contact from top to bottom successively by ion;
B3, deposition stibium containing material, the light dope semiconductor of the material and second conduction type forms Schottky contacts;
B4, by photoetching process, etch the shallow channel of first degree of depth, in order to separation lines, the degree of depth of described first degree of depth surpasses the degree of depth of the second conduction type heavily doped layer; By the isolation of the first depth as shallow raceway groove, the second conduction type heavy doping lines that are separated become word line;
B5, keep, inject, form the heavily doped region of first conduction type in the bottom of the first depth as shallow raceway groove by ion through the photoresist after the step B4 photoetching, heavily doped region be centered around the second conduction type word line around, be used for the isolated word line of electricity;
B6, pass through photoetching process again, above single word line, produce the shallow channel of second degree of depth, and make each second shallow channel degree of depth to described second conduction type lightly-doped layer and the described second conduction type heavily doped layer intersection, shallow channel becomes discrete junior unit in order to stibium containing material and the lightly doped region separation of second conduction type with the word line top, forms Schottky diode between the second conduction type light dope pocket and the stibium containing material;
B7, filling and CMP (Chemical Mechanical Polishing) process by dielectric material, the electric resistance transition memory array of the manufacturing acquisition stibium containing material by follow-up conductive bit again.
As a preferred embodiment of the present invention, described first degree of depth is deeper than second degree of depth.
As a preferred embodiment of the present invention, described stibium containing material layer is the antimony simple metal or is the alloy material that contains antimony.
As a preferred embodiment of the present invention, the component of described stibium containing material layer be antimony and other metals mixture or/and the oxide of antimony or/and the nitride of antimony or/and the nitrogen oxide of antimony.
As a preferred embodiment of the present invention, described stibium containing material layer is as the part of data storage cell, and the while is as the part of gating unit.
As a preferred embodiment of the present invention, described stibium containing material layer is also as the conductive bit in the memory chip.
As a preferred embodiment of the present invention, in the described Schottky diode, form Schottky contacts between stibium containing material layer, the semiconductor layer, be the metal-semiconductor contact, thereby form Schottky diode.
As a preferred embodiment of the present invention, described Schottky diode is by one deck stibium containing material layer at least, one semiconductor layer is formed at least; Described data storage cell is made up of one deck stibium containing material layer at least.
As a preferred embodiment of the present invention, described electric resistance transition memory storage is characterized as the twin-stage storage or is multistage storage.
As a preferred embodiment of the present invention, described memory comprises high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.
As a preferred embodiment of the present invention, described method also comprises the annealing in process step.
Another makes the method for electric resistance transition memory, and this method comprises the steps:
C1, manufacturing peripheral circuit;
C2, in the substrate of first conduction type or intrinsic, produce shallow channel, be separated out discrete lines, do not remove photoresist;
C3, inject by ion, formation is mixed to first conduction type of substrate, because the barrier effect of photoresist, discrete lines will not be doped, only first conductive type ion being carried out in the shallow channel bottom injects, form the heavily doped zone of first conduction type, be used for electric isolation, remove photoresist after injection is finished respectively with word line;
C4, form the heavily doped bit line of second conduction type in the bottom of the lines that are separated out by shallow channel, method is that ion injects or edge atom diffusion method;
C5, filled media material cover shallow channel, and the dielectric material deposit thickness is higher than the degree of depth of shallow channel, after the CMP (Chemical Mechanical Polishing) process planarization makes the word line top keep certain thickness dielectric material;
C6, by photoetching process, the selective etch dielectric material all etches a plurality of windows above each single bit line;
C7, inject by ion again, be injected into ion, above word line, form the lightly doped zone of second conduction type by behind the window;
C8, deposition medium material adopt side wall technology, form side wall in window;
C9, deposition stibium containing material behind the employing chemical-mechanical planarization, are all removed the stibium containing material of dielectric material top;
C10, manufacturing bit line have just formed the electric resistance transition memory array based on stibium containing material.
As a preferred embodiment of the present invention, described first degree of depth is deeper than second degree of depth.
As a preferred embodiment of the present invention, described stibium containing material layer is the antimony simple metal or is the alloy material that contains antimony.
As a preferred embodiment of the present invention, the component of described stibium containing material layer be antimony and other metals mixture or/and the oxide of antimony or/and the nitride of antimony or/and the nitrogen oxide of antimony.
As a preferred embodiment of the present invention, described stibium containing material layer is as the part of data storage cell, and the while is as the part of gating unit.
As a preferred embodiment of the present invention, described stibium containing material layer is also as the conductive bit in the memory chip.
As a preferred embodiment of the present invention, in the described Schottky diode, form Schottky contacts between stibium containing material layer, the semiconductor layer, be the metal-semiconductor contact, thereby form Schottky diode.
As a preferred embodiment of the present invention, described Schottky diode is by one deck stibium containing material layer at least, one semiconductor layer is formed at least; Described data storage cell is made up of one deck stibium containing material layer at least.
As a preferred embodiment of the present invention, described electric resistance transition memory storage is characterized as the twin-stage storage or is multistage storage.
As a preferred embodiment of the present invention, described memory comprises high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.
As a preferred embodiment of the present invention, described method also comprises the annealing in process step.
Beneficial effect of the present invention is: the present invention proposes a kind of based on the electric resistance transition memory that contains antimony metal, in memory, contain antimony metal not only as storage medium for resistance conversion, and as the metal level in the Schottky diode, even can be used as conductive bit in the memory chip.The invention allows for the method for multiple manufacturing, be expected in obtaining high density, the competition of solid-state memory cheaply, obtain greater advantage based on the electric resistance transition memory that contains antimony metal (or alloy).
Description of drawings
Figure 1A is the electric resistance transition memory circuit diagram, comprises diode logic unit and resistance unit.
Figure 1B is the current-voltage curve between star antimony material and the silicon, is typical Schottky contacts.
Fig. 2 A-Fig. 2 H is the manufacturing flow chart based on the electric resistance transition memory array that contains antimony metal.
Fig. 3 A-Fig. 3 B is another kind of manufacture method based on the electric resistance transition memory array that contains antimony metal, corresponding diagram 2H.
Fig. 4 A-Fig. 4 D is the resistance memory cell structure of various different principle for circle shown in 10 among Fig. 3 B comprises the enlarged diagram of part.
Fig. 5 A-Fig. 5 I is another kind of manufacture method based on the electric resistance transition memory array that contains antimony metal.
Embodiment
Describe the preferred embodiments of the present invention in detail below in conjunction with accompanying drawing.
Embodiment one
The circuit diagram of electric resistance transition memory is shown in Figure 1A, and memory comprises logical block diode (i.e. diode sign among the figure) and resistance converting unit (i.e. resistive memory cell among the figure).Carry out gating by diode, operation makes resistive memory cell realize reversible variation between high resistance and low resistance.
According to research, the star antimony material is typical metal-semiconductor contact with contacting of semiconductor silicon, its current-voltage curve is shown in Figure 1B, has good switching characteristic, can use as the gating diode, what is more important can realize the conversion of resistance based on the device of antimony material under action of electric signals, thereby stores data.The material that the star antimony material is carried out obtaining after an amount of doping also has similar performance.
The present invention has disclosed a kind of electric resistance transition memory, and it comprises gating unit and data storage cell; Gating unit adopts Schottky diode; Described Schottky diode comprises at least one deck stibium containing material layer, one semiconductor layer at least; Data storage cell comprises one deck stibium containing material layer at least.Described stibium containing material layer is the star antimony material or is the alloy material that contains the antimony material.What particularly, the component of stibium containing material layer can be in the nitrogen oxide of the nitride of the oxide of the mixture of antimony, antimony and his metal, antimony, antimony, antimony is one or more.
In the described Schottky diode, form Schottky contacts between stibium containing material layer, the semiconductor layer, be the metal-semiconductor contact, thereby form Schottky diode.
Described stibium containing material layer is as the part of data storage cell, simultaneously as the part of gating unit, even can be used as conductive bit in the memory chip.By above-mentioned improvement, the present invention can obtain greater advantage in obtaining high density, the competition of solid-state memory cheaply.
In addition, described memory can also comprise high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.Except utilizing device high resistance and low resistance state to realize the twin-stage storage of data " 0 " and " 1 ", also can realize multistage storage, for example level Four of " 00 ", " 01 ", " 10 ", " 11 " storage by utilizing intermediate state resistance.
Embodiment two
The method of electric resistance transition memory of the present invention is made in the present embodiment introduction, and this method comprises the steps:
Steps A 1, on the semiconductor-based end of first conduction type or intrinsic, make peripheral circuit;
Steps A 2, produce shallow channel, be separated out discrete lines, do not remove photoresist after the shallow channel etching finishes;
Steps A 3, inject by ion, formation is to the first conduction type heavy doping of substrate, because the barrier effect of photoresist, discrete lines will not be doped, only first conductive type ion is carried out in shallow channel bottom and injects, form the heavily doped zone of first conduction type, this zone be centered around discrete lines around, be used for each root word line of electric isolation, remove photoresist after injection is finished;
Steps A 4, formed the heavily doped word line of second conduction type by the bottom of the separated lines of shallow channel, method is that ion injects or side atom diffusion method;
Steps A 5, with shallow channel filled media material, the dielectric material deposit thickness is higher than the degree of depth of shallow channel, after the CMP (Chemical Mechanical Polishing) process planarization, the control polishing thickness makes the word line top keep certain thickness dielectric material;
Steps A 6, the photoetching process of passing through, optionally the dielectric material of etching word line top all produces a plurality of windows above each single word line, in order to make the Schottky diode unit;
Steps A 7, inject by ion again, be injected into ion forms second conduction type on word line by the window of above-mentioned formation light doping section;
Steps A 8, deposition stibium containing material form reliable Schottky contacts between the light dope semiconductor of this material and above-mentioned second conduction type;
Steps A 9, annealing in process are improved the interface between the light dope semiconductor of stibium containing material and above-mentioned second conduction type;
Steps A 10, deposition are different from the electric conducting material of stibium containing material;
Steps A 11, photoetching process form bit line, and bit line comprises steps A 10 described conductive material layers and stibium containing material layer, so form based on the electric resistance transition memory array that contains antimony.
Embodiment three
The another kind of method of electric resistance transition memory is made in the present embodiment introduction, and this method comprises the steps:
Step B1, manufacturing peripheral circuit;
Step B2, the semiconductor-based end of adopting first conduction type or intrinsic, inject lightly doped semiconductor layer of second conduction type and the heavily doped semiconductor layer of second conduction type that forms closely contact from top to bottom successively by ion;
Step B3, deposition stibium containing material, the light dope semiconductor of the material and second conduction type forms Schottky contacts;
Step B4, by photoetching process, etch the shallow channel of first degree of depth, in order to separation lines, the degree of depth of described first degree of depth surpasses the degree of depth of the second conduction type heavily doped layer; By the isolation of the first depth as shallow raceway groove, the second conduction type heavy doping lines that are separated become word line;
Step B5, keep, inject, form the heavily doped region of first conduction type in the bottom of the first depth as shallow raceway groove by ion through the photoresist after the step B4 photoetching, heavily doped region be centered around the second conduction type word line around, be used for the isolated word line of electricity;
Step B6, pass through photoetching process again, above single word line, produce the shallow channel of second degree of depth, and make each second shallow channel degree of depth to described second conduction type lightly-doped layer and the described second conduction type heavily doped layer intersection, shallow channel becomes discrete junior unit in order to stibium containing material and the lightly doped region separation of second conduction type with the word line top, forms Schottky diode between the second conduction type light dope pocket and the stibium containing material;
Step B7, filling and CMP (Chemical Mechanical Polishing) process by dielectric material, the electric resistance transition memory array of the manufacturing acquisition stibium containing material by follow-up conductive bit again.
In addition, described first degree of depth is deeper than second degree of depth.
Preferably, described method also comprises the annealing in process step.
Embodiment four
Another method of electric resistance transition memory is made in the present embodiment introduction, and this method comprises the steps:
Step C1, manufacturing peripheral circuit;
Step C2, in the substrate of first conduction type or intrinsic, produce shallow channel, be separated out discrete lines, do not remove photoresist;
Step C3, inject by ion, formation is mixed to first conduction type of substrate, because the barrier effect of photoresist, discrete lines will not be doped, only first conductive type ion being carried out in the shallow channel bottom injects, form the heavily doped zone of first conduction type, be used for electric isolation, remove photoresist after injection is finished respectively with word line;
Step C4, form the heavily doped bit line of second conduction type in the bottom of the lines that are separated out by shallow channel, method is that ion injects or edge atom diffusion method;
Step C5, filled media material cover shallow channel, and the dielectric material deposit thickness is higher than the degree of depth of shallow channel, after the CMP (Chemical Mechanical Polishing) process planarization makes the word line top keep certain thickness dielectric material;
Step C6, by photoetching process, the selective etch dielectric material all etches a plurality of windows above each single bit line;
Step C7, inject by ion again, be injected into ion, above word line, form the lightly doped zone of second conduction type by behind the window;
Step C8, deposition medium material adopt side wall technology, form side wall in window, and the purpose of side wall is to reduce effectively the stibium containing material and the semi-conductive contact area of the second conduction type light dope that deposit subsequently, reduction device programming power consumption;
Step C9, deposition stibium containing material behind the employing chemical-mechanical planarization, are all removed the stibium containing material of dielectric material top;
Step C10, manufacturing bit line have just formed the electric resistance transition memory array based on stibium containing material.
In the above-mentioned steps, described first degree of depth is deeper than second degree of depth.
In addition, described method also comprises the annealing in process step.
Embodiment five
Manufacturing of the present invention based on the method for the electric resistance transition memory array that contains antimony metal as shown in Figure 2, this method comprises the steps:
Step D1, elder generation are separated out word line with shallow channel in substrate 1, making word line with elder generation, substrate 1 is injected by ion and has been formed n type heavily doped region 2, and 2 and 3 are respectively heavy doping of n type and unadulterated semiconductor shown in Fig. 2 A, among the figure along the projection shown in the A-A direction shown in Fig. 2 B.
Step D2, form p type heavily doped region 4, be used for each root n type heavy doping word line 2 of electric isolation, shown in Fig. 2 C in the bottom of raceway groove.
Step D3, deposition medium material 5 obtain the structure shown in Fig. 2 D after the chemico-mechanical polishing planarization, among the figure, along the projection on the B-B direction shown in Fig. 2 E.
Step D4, above single word line, produce a plurality of windows, shown in Fig. 2 F by photoetching process.
Step D5, employing ion inject unadulterated semiconductor 3 are carried out the ion injection, form the n type autoregistration light dope to 3.
Step D6, deposition star antimony material, thickness surpass the thickness of the residual dielectric material 5 in doped semiconductor 3 tops not, produce stibium containing material bit line 8 by photoetching process, and sectional view is shown in Fig. 2 H.
In this embodiment, stibium containing material 8 not only forms the half of metal conductor with 7 of n type lightly-doped layers and contacts formation Schottky diode unit, and as storage medium material, has the function of conducting metal bit line simultaneously.
Embodiment six
Among the embodiment five, after obtaining Fig. 2 G, also can deposit stibium containing material 8, obtain as shown in Figure 3A structure by returning carving technology, the thickness of stibium containing material 8 is lower than the thickness of the residual dielectric material 5 in doped semiconductor 3 tops not.Subsequently, the conductive metal deposition material obtains bit line 9 by photoetching process, and sectional view is shown in Fig. 3 B.The difference of this embodiment and embodiment five is, is different from stibium containing material 8 as the electric conducting material of bit line.
Among Fig. 3 B, the enlarged drawing of the part shown in the circle 10 is shown in Fig. 4 A, and this structure is the structural representation that the present invention is based on a memory cell structure in the memory of stibium containing material.This memory cell structure comprises heavy doping conductive word lines 11, dielectric material 12, light dope semiconductor layer 13, stibium containing material 14 and conductive material layer 15.
The structural representation of several in addition memories based on stibium containing material is shown in Fig. 4 B-Fig. 4 D.Three's difference is:
Among Fig. 4 B, at the interface of stibium containing material 14 near conductive material layer 15, form diffusion thin layer 16 by the atom diffusion effect, this thin layer has the ability of electric resistance changing under signal of telecommunication programming.
Among Fig. 4 C, at the interface of stibium containing material 14 near low-doped semiconductor material layer 13, form diffusion thin layer 17 by the atom diffusion effect, this thin layer has the ability of electric resistance changing under signal of telecommunication programming.
Among Fig. 4 D, at the interface of stibium containing material 14 near conductive material layer 15 and low-doped semiconductor material layer 13, form diffusion layer 19 and 18 by the atom diffusion effect, above-mentioned two coatings all has the ability of electric resistance changing under signal of telecommunication programming effect.
In the memory of above different type, the conversion of device resistance relies on the resistance conversion that takes place in the storage medium material zones of different.
Embodiment seven
Present embodiment introduction another kind is based on the manufacture method of the electric resistance transition memory array that contains antimony metal, and its flow chart is shown in Fig. 5 A-5I.In the present embodiment, the manufacture method of electric resistance transition memory array comprises the steps:
Step e 4, manufacturing second shallow channel 27, purpose is that n type lightly-doped layer above the single word line 23 and star antimony metal level 24 are separated into independent parts, by the separation of shallow channel 27, has formed Schottky diode structure between 23 and 24, shown in Fig. 5 E.
Here description of the invention and application is illustrative, is not to want with scope restriction of the present invention in the above-described embodiments.Here the distortion of disclosed embodiment and change are possible, and the various parts of the replacement of embodiment and equivalence are known for those those of ordinary skill in the art.Those skilled in the art are noted that under the situation that does not break away from spirit of the present invention or substantive characteristics, and the present invention can be with other forms, structure, layout, ratio, and realize with other elements, material and parts.Under the situation that does not break away from the scope of the invention and spirit, can carry out other distortion and change here to disclosed embodiment.
As, Schottky diode can also comprise other structures except that stibium containing material layer, semiconductor layer, stibium containing material layer, semiconductor layer can be one or more layers; Stibium containing material layer in the data storage cell can be one or more layers.
Claims (37)
1. electric resistance transition memory is characterized in that it comprises:
Gating unit, this gating unit adopts Schottky diode; Described Schottky diode comprises at least one deck stibium containing material layer, one semiconductor layer at least; Described stibium containing material layer is the antimony simple metal or is the alloy material that contains antimony;
Data storage cell comprises one deck stibium containing material layer at least.
2. electric resistance transition memory according to claim 1 is characterized in that: the stibium containing material layer of described data storage cell is the antimony simple metal or is the alloy material that contains antimony.
3. electric resistance transition memory according to claim 1 is characterized in that: the component of described stibium containing material layer be antimony and other metals mixture or/and the oxide of antimony or/and the nitride of antimony or/and the nitrogen oxide of antimony.
4. electric resistance transition memory according to claim 1 is characterized in that: described stibium containing material layer is as the part of data storage cell, and the while is as the part of gating unit.
5. electric resistance transition memory according to claim 4 is characterized in that: described stibium containing material layer is also as the conductive bit in the memory chip.
6. electric resistance transition memory according to claim 1 is characterized in that: in the described Schottky diode, form Schottky contacts between stibium containing material layer, the semiconductor layer, be metal-semiconductor contact, thereby form Schottky diode structure.
7. electric resistance transition memory according to claim 1 is characterized in that: described Schottky diode is by one deck stibium containing material layer at least, one semiconductor layer is formed at least; Described data storage cell is made up of one deck stibium containing material layer at least.
8. electric resistance transition memory according to claim 7 is characterized in that: described electric resistance transition memory storage is characterized as the twin-stage storage or is multistage storage.
9. electric resistance transition memory according to claim 1 is characterized in that: described memory comprises high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.
10. method of making electric resistance transition memory, it is characterized in that: this method comprises the steps:
A1, on the semiconductor-based end of first conduction type or intrinsic, make peripheral circuit;
A2, produce shallow channel, be separated out discrete lines, do not remove photoresist after the shallow channel etching finishes;
A3, inject by ion, formation is to the first conduction type heavy doping of substrate, because the barrier effect of photoresist, discrete lines will not be doped, only first conductive type ion is carried out in shallow channel bottom and injects, form the heavily doped zone of first conduction type, this zone be centered around discrete lines around, be used for each root word line of electric isolation, remove photoresist after injection is finished;
A4, formed the heavily doped word line of second conduction type by the bottom of the separated lines of shallow channel, method is that ion injects or side atom diffusion method;
A5, with shallow channel filled media material, the dielectric material deposit thickness is higher than the degree of depth of shallow channel, after the CMP (Chemical Mechanical Polishing) process planarization, the control polishing thickness makes the word line top keep certain thickness dielectric material;
A6, by photoetching process, optionally the dielectric material of etching word line top all produces a plurality of windows above each single word line, in order to make the Schottky diode unit;
A7, inject by ion again, be injected into ion forms second conduction type on word line by the window of above-mentioned formation light doping section;
A8, deposition stibium containing material form reliable Schottky contacts between the light dope semiconductor of this material and above-mentioned second conduction type;
A9, deposition are different from the electric conducting material of stibium containing material;
A10, photoetching process form bit line, and bit line comprises steps A 9 described conductive material layers and stibium containing material layer, so form based on the electric resistance transition memory array that contains antimony.
11. method according to claim 10 is characterized in that: described stibium containing material layer is the antimony simple metal or is the alloy material that contains antimony.
12. method according to claim 10 is characterized in that: the component of described stibium containing material layer be antimony and other metals mixture or/and the oxide of antimony or/and the nitride of antimony or/and the nitrogen oxide of antimony.
13. method according to claim 10 is characterized in that: described method also is included in steps A 8 and has deposited the annealing in process step of carrying out behind the stibium containing material.
14. method according to claim 10 is characterized in that: described stibium containing material layer in memory not only as storage medium, also as the metal level in the Schottky diode.
15. method according to claim 10 is characterized in that: in the described Schottky diode, form Schottky contacts between stibium containing material layer, the semiconductor layer, be metal-semiconductor contact, thereby form Schottky diode.
16. method according to claim 10 is characterized in that: described Schottky diode is by one deck stibium containing material layer at least, one semiconductor layer is formed at least; The data storage cell of described memory is made up of one deck stibium containing material layer at least.
17. method according to claim 16 is characterized in that: described electric resistance transition memory storage is characterized as the twin-stage storage or is multistage storage.
18. method according to claim 10 is characterized in that: described memory comprises high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.
19. a method of making electric resistance transition memory is characterized in that: this method comprises the steps:
B1, manufacturing peripheral circuit;
B2, the semiconductor-based end of adopting first conduction type or intrinsic, inject lightly doped semiconductor layer of second conduction type and the heavily doped semiconductor layer of second conduction type that forms closely contact from top to bottom successively by ion;
B3, deposition stibium containing material, the light dope semiconductor of the material and second conduction type forms Schottky contacts;
B4, by photoetching process, etch the shallow channel of first degree of depth, in order to separation lines, the degree of depth of described first degree of depth surpasses the degree of depth of the second conduction type heavily doped layer; By the isolation of the first depth as shallow raceway groove, the second conduction type heavy doping lines that are separated become word line;
B5, keep, inject, form the heavily doped region of first conduction type in the bottom of the first depth as shallow raceway groove by ion through the photoresist after the step B4 photoetching, heavily doped region be centered around the second conduction type word line around, be used for the isolated word line of electricity;
B6, pass through photoetching process again, above single word line, produce the shallow channel of second degree of depth, and make each second shallow channel degree of depth to described second conduction type lightly-doped layer and the described second conduction type heavily doped layer intersection, shallow channel becomes discrete junior unit in order to stibium containing material and the lightly doped region separation of second conduction type with the word line top, forms Schottky diode between the second conduction type light dope pocket and the stibium containing material;
B7, filling and CMP (Chemical Mechanical Polishing) process by dielectric material, the electric resistance transition memory array of the manufacturing acquisition stibium containing material by follow-up conductive bit again.
20. method according to claim 19 is characterized in that: described first degree of depth is deeper than second degree of depth.
21. method according to claim 19 is characterized in that: described stibium containing material layer is the antimony simple metal or is the alloy material that contains antimony.
22. method according to claim 19 is characterized in that: the component of described stibium containing material layer be antimony and other metals mixture or/and the oxide of antimony or/and the nitride of antimony or/and the nitrogen oxide of antimony.
23. method according to claim 19 is characterized in that: described method also comprises the annealing in process step, and annealing in process is after step B3, perhaps after B7.
24. method according to claim 19 is characterized in that: described stibium containing material layer in memory not only as storage medium, also as the metal level in the Schottky diode.
25. method according to claim 19 is characterized in that: in the described Schottky diode, form Schottky contacts between stibium containing material layer, the semiconductor layer, be metal-semiconductor contact, thereby form Schottky diode.
26. method according to claim 19 is characterized in that: described Schottky diode is by one deck stibium containing material layer at least, one semiconductor layer is formed at least; The data storage cell of described memory is made up of one deck stibium containing material layer at least.
27. method according to claim 26 is characterized in that: described electric resistance transition memory storage is characterized as the twin-stage storage or is multistage storage.
28. method according to claim 19 is characterized in that: described memory comprises high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.
29. a method of making electric resistance transition memory is characterized in that: this method comprises the steps:
C1, manufacturing peripheral circuit;
C2, in the substrate of first conduction type or intrinsic, produce shallow channel, be separated out discrete lines, do not remove photoresist;
C3, inject by ion, formation is to the first conduction type heavy doping of substrate, because the barrier effect of photoresist, discrete lines will not be doped, only first conductive type ion being carried out in the shallow channel bottom injects, form the heavily doped zone of first conduction type, be used for electric isolation, remove photoresist after injection is finished respectively with word line;
C4, form the heavily doped bit line of second conduction type in the bottom of the lines that are separated out by shallow channel, method is that ion injects or edge atom diffusion method;
C5, filled media material cover shallow channel, and the dielectric material deposit thickness is higher than the degree of depth of shallow channel, after the CMP (Chemical Mechanical Polishing) process planarization makes the word line top keep certain thickness dielectric material;
C6, by photoetching process, the selective etch dielectric material all etches a plurality of windows above each single bit line;
C7, inject by ion again, be injected into ion, above word line, form the lightly doped zone of second conduction type by behind the window;
C8, deposition medium material adopt side wall technology, form side wall in window, dwindle the stibium containing material of deposition and the contact area of word line subsequently;
C9, deposition stibium containing material behind the employing chemical-mechanical planarization, are all removed the stibium containing material of dielectric material top;
C10, manufacturing bit line have just formed the electric resistance transition memory array based on stibium containing material.
30. method according to claim 29 is characterized in that: described stibium containing material layer is the antimony simple metal or is the alloy material that contains antimony.
31. method according to claim 29 is characterized in that: the component of described stibium containing material layer be antimony and other metals mixture or/and the oxide of antimony or/and the nitride of antimony or/and the nitrogen oxide of antimony.
32. method according to claim 29 is characterized in that: described method also is included in the annealing in process of carrying out after the step C9 deposition stibium containing material.
33. method according to claim 29 is characterized in that: form Schottky contacts between described stibium containing material layer, the semiconductor layer, be metal-semiconductor contact, thereby form Schottky diode.
34. method according to claim 33 is characterized in that: described stibium containing material layer in memory not only as storage medium, also as the metal level in the Schottky diode.
35. method according to claim 33 is characterized in that: described Schottky diode is by one deck stibium containing material layer at least, one semiconductor layer is formed at least; The data storage cell of described memory is made up of one deck stibium containing material layer at least.
36. method according to claim 35 is characterized in that: described electric resistance transition memory storage is characterized as the twin-stage storage or is multistage storage.
37. method according to claim 29 is characterized in that: described memory comprises high low-resistance converting unit, and high low-resistance converting unit makes memory realize the reversible transition of device between high resistance, low resistance by the programming of the signal of telecommunication.
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| CN102148329B (en) * | 2011-01-24 | 2013-11-27 | 中国科学院上海微系统与信息技术研究所 | Resistance conversion memory structure and manufacturing method thereof |
| CN106033780A (en) * | 2015-03-09 | 2016-10-19 | 中国科学院物理研究所 | Diode with controllable rectification characteristic, manufacturing method and operating method thereof |
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