CN101436556A - Method for producing a semiconductor component - Google Patents
Method for producing a semiconductor component Download PDFInfo
- Publication number
- CN101436556A CN101436556A CNA2008101761752A CN200810176175A CN101436556A CN 101436556 A CN101436556 A CN 101436556A CN A2008101761752 A CNA2008101761752 A CN A2008101761752A CN 200810176175 A CN200810176175 A CN 200810176175A CN 101436556 A CN101436556 A CN 101436556A
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- semiconductor component
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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- H01L2924/01—Chemical elements
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- H01L2924/01015—Phosphorus [P]
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- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
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- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
Abstract
The invention relates to a method for manufacturing semiconductor subassemblies and comprises the flowing main procedures: forming a structure which is provided with at least one semiconductor member, at least one connecting device, and at least one variety of conjugation agent arranged between the semiconductor member and the connecting device. The structure is partially or wholly packed, and the at least one semiconductor member and the at least one connecting device are unified into an entity.
Description
Technical field
The present invention relates to manufacturing method of semiconductor module, described semiconductor subassembly for example is the building block of power semiconductor modular.This power semiconductor modular has shell according to prior art, has the substrate of power semiconductor member, and load and auxiliary linkage unit.The following stated semiconductor component for example is meant the assembly as the building block of power semiconductor modular, described module comprises substrate and the semiconductor component that links to each other integratedly with substrate material, perhaps comprise the linkage unit that semiconductor component links to each other with the material one, perhaps comprise their combination.Here not only comprise substrate, and comprise the linkage unit under the jockey meaning.
Background technology
In order to make this semiconductor subassembly, prior art discloses welding and sintering method.DE19911887C1 discloses a kind of soft heat welding method, is characterized in having set up vacuum plant.Here weldment is admitted to described vacuum plant after original gas phase welding process.Avoided shrinking the formation of shrinkage pool so effectively, because the contraction shrinkage pool that may form is excluded from solder flux by means of vacuum.
The shortcoming of known this welding method for example is: the welding that is connected on semiconductor subassembly must be followed a matting afterwards usually, to remove flux residue by means of cleaning fluid.
DE102004019567B3 discloses the up-to-date improvement of pressure sintering method, is characterized in being provided with by means of the vaporific coating on the bearing film special method of sintered paste.Pre-dried sintered paste is removed and is arranged on from bearing film on the surface of wanting combined in further operation.Known silver powder and be used as the sintered paste of this sintering method such as the mixture of the solder flux of cyclohexanol.
The shortcoming of this known sintering method by means of mechanical pressure is, they can only form a sintering usually simultaneously and connect, and/or particularly semiconductor component in conjunction with the time have the danger of member breakage.
The novel implementation that is used for the jockey of semiconductor subassembly for example is disclosed at DE102006015198A1.Be designed to the special structure that flexible printed circuit board (PCB) is arranged at this this jockey.This structure has by conductive layer and insulating barrier alternately arranges the film-type layer structure that constitutes.
Summary of the invention
The objective of the invention is to improve the known method for producing semiconductor module that between at least one semiconductor component and at least one jockey, adopts the material one to be connected, wherein in conjunction with both sides at least in part less than with exert pressure and/or the medium of temperature forms directly and contacts.
Above-mentioned task is finished by the method with the described feature of claim 1 according to the present invention.Dependent claims provides preferred implementation of the present invention.
The starting point that is used to make the method for semiconductor subassembly of the present invention is a power semiconductor modular recited above.The semiconductor subassembly that is used for this power semiconductor modular should satisfy a plurality of requirements, and these require to repel mutually at least in part in the prior art.Be included in during these require and also can keep enduringly when being formed on the power semiconductor modular normal load between semiconductor component and the jockey and being connected of loading material one.Also require the cheap for manufacturing cost of semiconductor subassembly on the other hand and comparatively save time.
According to the present invention, be used to form this manufacturing method of semiconductor module and have following key step:
A) construct a kind of structure, this structure has at least one semiconductor component, at least one jockey and at least a bond that is arranged between them; Here preferably a plurality of power semiconductor members are arranged on the substrate simultaneously.Bond wherein, preferably welding or sintered paste for example are set on the substrate by means of silk screen printing, or rather, be set on the corresponding joint face of substrate, and the power semiconductor member that material one respectively connects is set on joint face.
B) in next step according to A) structure of structure is by reversibly and entirely, preferably encapsulate with plastic film; What have advantage here especially is that this structure is placed in the plastic film of a blown tubular structure, and it is evacuated and seals then.Formed like this protection of this structure and not influenced by other manufacturing process.Another preferably encapsulates implementation is to use a spot of mucilage materials, silica gel for example, and it is not entirely to encase this structure.
C) forming at least one semiconductor component unit is connected with the material one of at least one jockey; This material one connects preferably to be embodied as welds or sinter bonded.Here particularly preferably be by means of liquid medium and on described structure, apply temperature and/or pressure.Wherein the effect of the protective layer of relative liquid medium has been played in encapsulation.So not only avoided the pollution of bond, and the possibility of having avoided bond to be washed away.An encapsulation minimal effect temperature and/or pressure applies simultaneously.
D) in the situation lower seal attaching that is designed to reversible encapsulation and be removed.Thereby the subsequent treatment that makes semiconductor subassembly, for example power semiconductor modular can not carried out other operation, for example matting of often carrying out in welding method.
The method of the manufacturing semiconductor subassembly of being advised has been avoided the shortcoming of known material one method of attachment on the principle, and can adopt liquid medium.Like this, particularly when sinter bonded, can utilize fluidstatic pressure to import the advantage of pressurizeing with respect to machinery.This advantage is that at first each imports to uniform pressure, and semiconductor component was damaged dangerous when it had avoided exerting pressure especially, had perhaps at least obviously reduced this danger.
Description of drawings
In corresponding description, enumerated the particularly preferred improvement of this manufacture method to embodiment.Further specify according to technical scheme of the present invention by Fig. 1 to 6 illustrated embodiment below.
Fig. 1 to 3 shows three main sequential step of first embodiment of method for producing semiconductor module of the present invention.
Fig. 4 shows the method step of second embodiment of manufacture method of the present invention.
Fig. 5 shows the method step of the 3rd embodiment of manufacture method of the present invention.
Fig. 6 shows the method step of the 4th embodiment of manufacture method of the present invention.
Embodiment
Fig. 1 shows first step of method for producing semiconductor module of the present invention.Be designed to the substrate 10 of electric insulation at this jockey, the contact-making surface 16 that it has insulating body 12 and be arranged on a plurality of conductor lines 14 at least one first type surface and form according to prior art thereon.Under the sinter bonded situation, have precious metal surface and have advantage according to prior art contact-making surface 16.Substrate 10 is preferably designed as printed circuit board (PCB) commonly used, IMS (isolating metal substrate) or DBC (directly copper connecting lines) substrate.Do not limit the generality of above explanation as the exemplary embodiment of the jockey of substrate 10.Equally also can imagine linkage unit (referring to Fig. 4 to 6) and be used for, to realize inside and/or outside contact in conjunction with a substrate or one or more semiconductor component.
According to prior art bond 20 being set on the contact-making surface 16 on substrate 10 first type surfaces, is sintered paste here.For solder bond, be provided with on it that yes soldering paste or one or more bonding pad.These bonding pads are made of welding material, and the shape of this bonding pad adapts to the size of semiconductor component to be welded 30, and it is designed to plane metallic object.
Being also advantageous in that of cream 20 is set, and it is attached on the substrate 10 on the one hand, also pastes on the semiconductor component of placing thereon 30 on the other hand.Common like this other medium that do not need will interfix in conjunction with both sides 10,30.What have advantage especially is to adopt method for printing screen that corresponding cream 20 is set on the contact-making surface 16 of substrate 10 first type surfaces.Bond 20 is applied on all each binding sites that need in the course of processing like this.On the suitable first type surface in semiconductor component unit 30 bond being set is preferred equally under some applicable cases.
Corresponding semiconductor component 30 directly is removed from chip complex with selection or laying method according to prior art, is placed into bond after its cutting is separated, is on the sintered paste 30.
Fig. 2 shows the step of following after method step shown in Figure 1.Wherein structure 1 is made up of a plurality of semiconductor components unit 30, substrate 10 and the sintered paste 20 that suitably is coated in respectively between them, and this structure is with the Plastic Package of film 40 forms.Film 40 must the described structures 1 of whole encapsulation follow-up the exerting pressure in sintering method.
For outward can also Application Design becoming the plastics of shrinkage flexible pipe.This moment, structure 1 was placed in the shrinkage flexible pipe 40, near fully being closed and then so heating, made shrinkage flexible pipe 40 adapt to the profile of this structure (referring to Fig. 3).Then shrinkage flexible pipe 40 is by complete closed.
Another possibility of not limited to is to use the elastic plastic film of blown tubular structure, puts into described structure therein.Flexible pipe is fully sealed and vacuumizes by approaching.Described structure can offer next method step continuation processing after flexible pipe is followed by complete closed.
Fig. 3 shows and forms the subsequent method step that the material one connects, and combination is a sinter bonded here.The structure 1 that is encapsulated by plastic film 40 is applied in the temperature 44 that pressure 46 that the order of magnitude is 100MPa and the order of magnitude are 100 ℃ for this reason.What have advantage here especially is that packed structure 40 is placed in the pressure tank 48 of filling with voltage stabilizing silicone oil 42 and the 46 1 sections reasonable times of exerting pressure there.The pressure of this hydrostatics mode imports 46 to be caused saving material especially in conjunction with exerting pressure of both sides 10,30.
In order to form solder bond, similarly the structure that encapsulates with plastic film in advance is placed in the liquid that is heated to welding temperature.Particularly suitable be the liquid of known applications in the vapour phase welding equipment.
Fig. 4 shows the method step of second embodiment of manufacture method of the present invention.Here this step is suitable with method step shown in Figure 2.Be with the difference of step shown in Figure 2, be here for a power semiconductor member 30 and substrate 10 conductor line 14, and simultaneously with the profile of metal feature 50 in the load linkage unit carry out solder bond and prepare.
Load linkage unit 50 has the contact-making surface 52 with soldering paste 20, and soldering paste is set on the semiconductor component 30.In addition it also have as the foundry pit 54 of curved edge be used for the outside hole 56 that contacts.For fixed-site and Position Control, in the zone in hole, between load linkage unit 50 and substrate 10, be provided with location auxiliary body 60.After structure packed 40, then can finish solder bond by means of suitable liquid.
Fig. 5 shows the method step of the 3rd embodiment of manufacture method of the present invention.Here this step is suitable with step shown in Figure 2.Be that with the difference of step shown in Figure 2 jockey is configured to have flexible printed circuit board (PCB) 70.Known according to prior art, this printed circuit board (PCB) for example is configured to multilayer, and it is made up of conductive layer 72,76 and insulating barrier 74 respectively, is three-decker shown in the figure.As known, between conductive layer 72,76, be provided with the required perforation contact of circuit equally.
The major advantage that application has flexible printed circuit board (PCB) 70 is, semiconductor component 30 not only can be connected with first conductor line 14 of substrate 10 in a method step, and can with have flexible printed circuit board (PCB) 70 and be connected, equally, having flexible printed circuit board (PCB) 70 can be connected with other conductor line 14 of substrate 10.Particularly advantageous for this semiconductor subassembly implementation is that sintered paste 20 conducts are bond accordingly, and realizes combination by means of the top pressure sintering method that has illustrated.Here the contact-making surface of the surface 16 of the conductor line 14 of substrate 10, semiconductor component 30 and contact-making surface 78 with conductive layer for the treatment of combination 72 of flexible printed circuit board (PCB) 70 should adhere to suitable metal, preferably noble metal certainly.
Fig. 6 shows the method step of the 4th embodiment of manufacture method of the present invention.Here this step is suitable with step shown in Figure 2.Compare with Fig. 5, jockey also is configured to as the flexible printed circuit board (PCB) 70 of having of a variant, and it has and is used for contacting prominent point with power semiconductor member 30 or with the joint face 14 of substrate is electrically connected.
The special advantage of this embodiment of the method for the invention is, silica gel hose is as encapsulation 40, it in the prior art the normal phase to be used as the insulating material in the power semiconductor modular.This silicon rubber hose 40 is on the one hand as the insulation of the power semiconductor modular of follow-up manufacturing, on the other hand in the pressure sintering method as the protection packaging 40 of structure 1, its only component part encapsulation at this.Import on the silica gel hose 40 by the pressure of realizing the hydrostatics mode of exerting pressure in pressure tank 48, flexible pipe continues conducting pressure on the part for the treatment of combination of structure 1, and the position of flexible pipe own does not significantly change.
Claims (10)
1. be used to make the method for semiconductor subassembly, have following key step:
A) form structure (1), this structure has at least one semiconductor component (30), at least one jockey (10,50,70) and at least a bond (20) that is arranged between them;
B) entirely or partly encapsulate (40) described structure (1);
C) form the connection of the material one of at least one semiconductor component (30) and at least one jockey (10,5).
2. the method for claim 1, wherein bond (20) is implemented as bonding pad or soldering paste, and it is applied on the first type surface (16,32) of semiconductor component (30) or jockey (10,50) by means of silk-screen printing technique.
3. the method for claim 1, wherein bond (20) is implemented as sintered paste, and it is applied on the first type surface (16,32) of semiconductor component (30) or jockey (10,50,70) by means of silk-screen printing technique.
4. the method for claim 1 wherein then will encapsulate (40) again and remove from described structure (1) after forming combination.
5. the method for claim 1, wherein jockey is substrate (10) and/or the linkage unit realized with the form of the metal feature (50) of power semiconductor modular (30).
6. the method for claim 1, wherein jockey be have the layer structure that constitute by conductive layer (72,76) and insulating barrier (74) have a flexible printed circuit board (PCB) (70).
7. the method for claim 1, wherein encapsulation (40) is implemented as the blown tubular film, and it is closed after encapsulation, then is evacuated, and perhaps by heating by shrinkage, thereby is attached on the described structure.
8. the method for claim 1 wherein encapsulates (40) and realizes by means of a small amount of mucilage materials.
9. method as claimed in claim 1 or 2, wherein the formation of material one connection realizes by means of the liquid that is heated to welding temperature (42), and described structure (1) is put into this liquid (42) a period of time for this reason.
10. as claim 1 and 3 described methods, wherein the formation of material one connection is by means of the liquid that is arranged in pressure tank (48) (42), be that a kind of voltage stabilizing silicone oil is realized, and described structure (1) is put into this liquid (42) a period of time for this reason, and then from the outside to this liquid (42) exert pressure (46).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201510315302.2A CN104900636A (en) | 2007-11-16 | 2008-11-14 | Method for producing a semiconductor component |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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DE102007054710A DE102007054710B3 (en) | 2007-11-16 | 2007-11-16 | Method for producing a semiconductor module |
DE102007054710.4 | 2007-11-16 |
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CN201510315302.2A Division CN104900636A (en) | 2007-11-16 | 2008-11-14 | Method for producing a semiconductor component |
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CN101436556A true CN101436556A (en) | 2009-05-20 |
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EP (1) | EP2061071A3 (en) |
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Cited By (6)
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CN102110679A (en) * | 2009-10-21 | 2011-06-29 | 赛米控电子股份有限公司 | Power semiconductor module with a substrate having a three dimensional surface contour and method for producing same |
CN102956510A (en) * | 2011-08-12 | 2013-03-06 | 英飞凌科技股份有限公司 | Method for manufacturing combination and power semiconductor module |
CN103227154A (en) * | 2012-01-27 | 2013-07-31 | 英飞凌科技股份有限公司 | Power semiconductor module with pressed baseplate and method for producing a power semiconductor module with pressed baseplate |
CN103378035A (en) * | 2012-04-18 | 2013-10-30 | 英飞凌科技股份有限公司 | Pressure contact arrangement and method for producing a pressure contact arrangement |
CN103545298A (en) * | 2012-07-09 | 2014-01-29 | 赛米控电子股份有限公司 | Power semiconductor module with at least one stress-reducing adjustment element |
CN104867902A (en) * | 2014-02-25 | 2015-08-26 | 西门子公司 | Electronic module having two conductive structures |
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DE102008033410B4 (en) * | 2008-07-16 | 2011-06-30 | SEMIKRON Elektronik GmbH & Co. KG, 90431 | Power electronic connection device with a power semiconductor component and manufacturing method for this purpose |
DE102009024385B4 (en) * | 2009-06-09 | 2011-03-17 | Semikron Elektronik Gmbh & Co. Kg | Method for producing a power semiconductor module and power semiconductor module with a connection device |
US9691637B2 (en) * | 2015-10-07 | 2017-06-27 | Nxp Usa, Inc. | Method for packaging an integrated circuit device with stress buffer |
DE102019204683A1 (en) * | 2019-04-02 | 2020-10-08 | Volkswagen Aktiengesellschaft | Method and device for the material connection of at least one semiconductor module to at least one housing part of a cooling module |
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2007
- 2007-11-16 DE DE102007054710A patent/DE102007054710B3/en active Active
-
2008
- 2008-10-22 EP EP08018435.1A patent/EP2061071A3/en not_active Withdrawn
- 2008-11-14 CN CNA2008101761752A patent/CN101436556A/en active Pending
- 2008-11-14 CN CN201510315302.2A patent/CN104900636A/en active Pending
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102110679A (en) * | 2009-10-21 | 2011-06-29 | 赛米控电子股份有限公司 | Power semiconductor module with a substrate having a three dimensional surface contour and method for producing same |
CN102956510A (en) * | 2011-08-12 | 2013-03-06 | 英飞凌科技股份有限公司 | Method for manufacturing combination and power semiconductor module |
CN102956510B (en) * | 2011-08-12 | 2015-11-25 | 英飞凌科技股份有限公司 | Manufacture the method for combination and power semiconductor modular |
US9688060B2 (en) | 2011-08-12 | 2017-06-27 | Infineon Technologies Ag | Method for producing a composite and a power semiconductor module |
CN103227154A (en) * | 2012-01-27 | 2013-07-31 | 英飞凌科技股份有限公司 | Power semiconductor module with pressed baseplate and method for producing a power semiconductor module with pressed baseplate |
CN103227154B (en) * | 2012-01-27 | 2017-05-03 | 英飞凌科技股份有限公司 | Power semiconductor module with pressed baseplate and method for producing a power semiconductor module with pressed baseplate |
CN103378035A (en) * | 2012-04-18 | 2013-10-30 | 英飞凌科技股份有限公司 | Pressure contact arrangement and method for producing a pressure contact arrangement |
CN103378035B (en) * | 2012-04-18 | 2016-04-20 | 英飞凌科技股份有限公司 | Pressure contact arrangement and the method for the manufacture of pressure contact arrangement |
CN103545298A (en) * | 2012-07-09 | 2014-01-29 | 赛米控电子股份有限公司 | Power semiconductor module with at least one stress-reducing adjustment element |
CN104867902A (en) * | 2014-02-25 | 2015-08-26 | 西门子公司 | Electronic module having two conductive structures |
Also Published As
Publication number | Publication date |
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DE102007054710B3 (en) | 2009-07-09 |
CN104900636A (en) | 2015-09-09 |
EP2061071A2 (en) | 2009-05-20 |
EP2061071A3 (en) | 2014-09-03 |
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