CN101435960B - Manufacturing method of liquid crystal display device array substrate - Google Patents
Manufacturing method of liquid crystal display device array substrate Download PDFInfo
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- CN101435960B CN101435960B CN 200710048135 CN200710048135A CN101435960B CN 101435960 B CN101435960 B CN 101435960B CN 200710048135 CN200710048135 CN 200710048135 CN 200710048135 A CN200710048135 A CN 200710048135A CN 101435960 B CN101435960 B CN 101435960B
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 30
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 title claims description 31
- 238000000034 method Methods 0.000 claims abstract description 19
- 239000011521 glass Substances 0.000 claims abstract description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 50
- 238000005530 etching Methods 0.000 claims description 26
- 238000009413 insulation Methods 0.000 claims description 21
- 238000005516 engineering process Methods 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 238000004380 ashing Methods 0.000 claims description 10
- 239000004020 conductor Substances 0.000 claims description 10
- 150000001875 compounds Chemical class 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 8
- 238000011161 development Methods 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 229910052681 coesite Inorganic materials 0.000 claims description 4
- 229910052906 cristobalite Inorganic materials 0.000 claims description 4
- 239000003292 glue Substances 0.000 claims description 4
- 238000001259 photo etching Methods 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 229910052682 stishovite Inorganic materials 0.000 claims description 4
- 229910052905 tridymite Inorganic materials 0.000 claims description 4
- 229910004205 SiNX Inorganic materials 0.000 claims description 3
- 229910020286 SiOxNy Inorganic materials 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 230000001681 protective effect Effects 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000012467 final product Substances 0.000 abstract 1
- 239000000047 product Substances 0.000 abstract 1
- 238000012545 processing Methods 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 238000013461 design Methods 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 235000008429 bread Nutrition 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 235000012054 meals Nutrition 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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- Thin Film Transistor (AREA)
Abstract
The invention provides an array baseplate of a liquid crystal display and a manufacturing method thereof. The array baseplate of the liquid crystal display comprises a glass baseplate, a grid electrode scanning line, a grid electrode, a first grid insulating layer, an active layer, a doped layer, a second insulating layer, a data wire, a transistor source-drain electrode and a pixel electrode. The technical proposal can realize that the manufacturing of an array pattern of the liquid crystal display is completed through three mask stencils, reduce process steps and further reduce influence on a final product possibly brought by each process course. The method reduces the times of exposal and improves the final display quality of a product.
Description
Technical field
The present invention relates to the liquid crystal indicator technical field, further relate to the arraying bread board and the manufacture method thereof of liquid crystal indicator.
Background technology
Traditional CRT monitor relies on the phosphor powder on the cathode-ray tube (CRT) emitting electrons bump screen to come display image, but the principle of liquid crystal display is then different fully.Usually, liquid crystal display (LCD) device has upper substrate and infrabasal plate, have each other certain intervals and mutually over against.Be formed on two substrates a plurality of electrodes mutually over against.Liquid crystal is clipped between upper substrate and the following basic meal.Voltage is applied on the liquid crystal by the electrode on the substrate, thereby then according to the voltage that acted on change the arrangement display image of liquid crystal molecule, because liquid crystal indicator is not launched light as mentioned above, it needs light source to come display image. and therefore, liquid crystal indicator has the backlight that is positioned at the liquid crystal panel back.Thereby the arrangement according to liquid crystal molecule is controlled from backlight quantity of incident light display image.Accompany glass substrate, colored filter, electrode, liquid crystal layer and transistor film between two polaroids, liquid crystal molecule is the material with refractive index and dielectric constant anisotropy.The light process that backlight sends is polaroid down, becomes the polarized light with certain polarization direction.Institute's making alive between the transistor controls electrode, and this voltage acts on the polarization direction that liquid crystal is controlled polarized light, polarized light forms monochromatic polarized light after seeing through corresponding color film chromatograph, if polarized light can penetrate the upper strata polaroid, then demonstrates corresponding color; Electric field intensity difference, the deflection angle of liquid crystal molecule are also different, and the light intensity that sees through is different, and the brightness of demonstration is also different.The combination of the different light intensity by three kinds of colors of RGB shows motley image.
It is basic 4MASK manufacture process that general array base palte is made flow process, and each mask manufacturing step is as follows:
1, first mask-grid forms (gate metal sputter, wet quarter, photoresist lift off)
2, second mask-amorphous silicon island and signal electrode form (doped amorphous silicon, data line metal sputtering/wet quarters/amorphous silicon is done the dried quarter/photoresist lift off of quarter/raceway groove for gate insulating film, amorphous silicon)
3, the 3rd mask-contact hole forms (data line dielectric film/through hole is done quarter/photoresist lift off)
4, the four mask-pixels form (transparency electrode sputter/etching/photoresist lift off)
Propose to utilize Reflow technology to use a mask according to the patent No. for the Jap.P. of day special 2000-131719, finish signal wire and transistorized making.After exposure engineering and development engineering, photoresist is heated, cause the PR material softening by thermal conductance, make photoresist have certain flowability, after fully flowing, under the prerequisite that does not as far as possible change the photoresist shape that needs reservation photoresist field, the photoresist zone that keeps the minute pattern array behind exposure imaging forms the photoresist layer that approaches.
As mentioned above, at present the LCD (Liquid Crystal Display) array side has adopted 4 or above mask technology to carry out.In the technological process, many masks are represented many one exposure technologys.As described in background introduction, need to develop after the exposure, etching, technologies such as cleaning have increased processing step on the one hand, the technology beat is influenced, each technological process also may be brought influence to final products, and each on the other hand exposure all exists the deviation in the contraposition, and repeatedly Die Jia result is narrowing down of process window, have influence on the design of product, and also can have influence on final display quality.
Summary of the invention
In order to solve above-mentioned defective of the prior art, the invention provides a kind of manufacture method of LCD (Liquid Crystal Display) array substrate, processing step is too much in the solution prior art, and the mask and the exposure technology of use are too much, influence the problem of the final display quality of product.
To achieve these goals, the present invention has adopted following technical scheme: described LCD (Liquid Crystal Display) array substrate comprises: glass substrate, controlling grid scan line, gate electrode, first grid insulation course, active layer, doped layer, second insulation course, data line, the source transistor drain electrode, pixel electrode, described gate electrode and controlling grid scan line are electrically connected, described gate electrode layer material therefor can be AlNd, AI, Cu, MO, MoW or Cr a kind of or be AlNd, AI, Cu, MO, one of MoW or Cr or that combination in any constituted was compound, the described first grid insulation course and second insulation course can be SiO2, one of SiNx or SiOxNy material or that combination in any constituted was compound, described data line layer metal is Mo, MoW or Cr a kind of or be Mo, one of MoW or Cr or that combination in any constituted was compound.
The manufacture method of LCD (Liquid Crystal Display) array substrate is divided into following steps:
Step 1: on the substrate of cleaning, deposit gate metal layer successively; first insulation course; active layer; and the active layer surface mixed; then at film the superiors coating ground floor photoresist; utilize first mask to expose; remove the photoresist of exposure area through developing; technology such as heat; make photoresist have certain fluidity; make that the photoresist in Reflow zone is thinner than lightproof area photoresist thickness after carrying out fully flowing; etching forms gate wirings and gate electrode; remove the insulation course that does not need the zone; active layer; the figure of gate metal layer; ashing for the first time is afterwards under the condition that photoresist protective transistor active area is arranged; etch other regional conductive layers; wherein; this first mask (1001) needs the regional corresponding mask version of reserve part photoresist to be provided with closely-spaced grid or list structure; so that after exposing, stay this Reflow graph exposure district (1004) of point-like or lattice-shaped structure in this zone; and on the complete exposed areas corresponding mask of needs version, leave the zone of complete printing opacity
Step 2: on substrate, deposit data conductor layer, second insulation course successively, deposit second layer photoresist then, adopt second GTM or HTM mask, after development and Reflow technology, form the photoresist of three kinds of thickness, by second dielectric film of etching technics etching removal transistor channel part, get rid of second dielectric film in no conductive pattern district; Under removing, etching is exposed to the data conductor layer pattern on surface; Ashing is once exposed second dielectric film of contact hole part; Second dielectric film that is exposed to the surface is carried out etching, expose the data conductor layer of contact hole part; Remove the remained on surface photoresist,
Step 3, pixel deposition electrode layer on substrate, deposition the 3rd layer photoetching glue utilizes the 3rd mask to expose for the third time on this, forms pixel electrode layer after the development etching.
Adopt technical scheme of the present invention, can realize finishing the LCD (Liquid Crystal Display) array design producing, reduced processing step, and then reduced each technological process and also may bring influence to final products with three masks.Reduce exposure frequency, improved the final display quality of product.
Description of drawings
Fig. 1 ground floor mask exposure develops and forms the Reflow regional graphics
Fig. 2 ground floor mask exposure develops and Reflow technology is carried out etching and ashing for the first time afterwards
Carry out etching after Fig. 3 ashing for the first time, and remove residual photoresist
Second mask exposure of Fig. 4 develops and forms the Reflow regional graphics
Second mask exposure of Fig. 5 develops and Reflow technology is carried out etching and ashing for the second time afterwards
Carry out etching after Fig. 6 ashing for the second time, and remove residual photoresist
After developing, the 3rd mask exposure of Fig. 7 carry out etching and photoresist lift off
Among the figure: substrate 101, gate metal layer 102, the first insulation courses 103, active layer 104, data conductor layer 105, the second insulation course 106, pixel electrode layer 107, ground floor photoresist 201, second layer photoresist 202, the three layer photoetching glue 203, mask 1001, Reflow graph exposure district 1004
Embodiment
Specify the specific embodiment of the present invention below in conjunction with accompanying drawing.
Array side is made distribution and figure comprises: glass substrate, controlling grid scan line is with the gate electrode that controlling grid scan line is electrically connected, first grid insulation course, active layer, doped layer, second insulation course, data line, source transistor drain electrode, pixel electrode.
The material therefor of gate electrode layer described in the such scheme can be AlNd, AI, Cu, MO, MoW or Cr a kind of or be AlNd, AI, Cu, MO, one of MoW or Cr or that combination in any constituted was compound.Described dielectric film can be SiO2, one of SiNx or SiOxNy material or that combination in any constituted was compound.Described data line layer metal is Mo, MoW or Cr a kind of or be Mo, one of MoW or Cr or that combination in any constituted was compound.
Reflow technology, photoresist forms the thickness of 3 kinds of grades after exposure imaging and aftertreatment.
For guaranteeing the etching quality, prevent to injure glass substrate, before carrying out layer metal deposition, deposition layer of transparent protection dielectric film.Its material is 5000A for SiO2 thickness.
The active layer deposition of being produced on of doped layer is carried out after finishing.
Concrete manufacture process is:
The first step, as Fig. 1, Fig. 2, shown in Figure 3, on clean substrate 101, deposit gate metal layer 102, the first insulation courses 103 successively, active layer 104, and the active layer surface mixed, at film the superiors coating ground floor photoresist 201, utilize first mask 1001 to expose then.This mask has following feature: needing on the regional corresponding mask version of reserve part photoresist closely-spaced grid or list structure to be set, the point-like or the lattice-shaped that stay as shown in the figure in this zone after exposing are constructed, i.e. Reflow graph exposure district 1004.And on the complete exposed areas corresponding mask of needs version, leave the zone of complete printing opacity.Remove the photoresist of exposure area through developing.Technology such as heat, make photoresist have certain fluidity, makes that the photoresist in Reflow graph exposure district 1004 is thinner than lightproof area photoresist thickness after carrying out fully flowing.The photoresist thickness that has stayed three complete shading regions in zone like this on substrate is the thickest, the photoresist thinner thickness that Reflow graph exposure district 1004 stays, and exposure region does not then have photoresist fully.Etching forms gate wirings and gate electrode, removes the insulation course that does not need the zone, active layer, the figure of conductive layer.Under the condition that photoresist protective transistor active area is arranged, etch other regional conductive layers after the ashing for the first time.
Second step, as Fig. 4, Fig. 5, shown in Figure 6.Deposit data conductor layer 105, the second insulation courses 106 on the substrate after finishing above-mentioned processing step successively, deposit second layer photoresist 202 then.Adopt second GTM or HTM mask, this mask has three kinds of levels of exposure, forms the photoresist of three kinds of thickness after developing.By second dielectric film of etching technics etching removal transistor channel part, get rid of second dielectric film in no conductive pattern district, get rid of second dielectric film of contact hole portion; Under removing, etching is exposed to the data conductor layer pattern on surface; Ashing is once exposed second dielectric film of contact hole part; Second dielectric film that is exposed to the surface is carried out etching, expose the conductive layer of contact hole part; Remove the remained on surface photoresist.
The 3rd step, as shown in Figure 7, pixel deposition electrode layer 107 on the substrate after finishing above-mentioned processing step, deposition the 3rd layer photoetching glue 203 utilizes the 3rd mask to expose for the third time on this, forms pixel electrode layer after the development etching.Finish the making of array side substrate.
Claims (4)
1. a method of making LCD (Liquid Crystal Display) array substrate is characterized in that, described method is divided into following steps:
Step 1: on the substrate (101) of cleaning, deposit gate metal layer (102) successively; first insulation course (103); active layer (104); and the active layer surface mixed; then at film the superiors coating ground floor photoresist (201); utilize first mask (1001) to expose; remove the photoresist of exposure area through developing; carry out heating process; make photoresist have certain fluidity; make that the photoresist in Reflow graph exposure district (1004) is thinner than lightproof area photoresist thickness after carrying out fully flowing; etching forms gate wirings and gate electrode; remove the insulation course that does not need the zone; active layer; the figure of gate metal layer; ashing for the first time is afterwards under the condition that photoresist protective transistor active area is arranged; etch other regional conductive layers; wherein; this first mask (1001) needs the regional corresponding mask version of reserve part photoresist to be provided with closely-spaced grid or list structure; so that after exposing, stay this Reflow graph exposure district (1004) of point-like or lattice-shaped structure in this zone; and on the complete exposed areas corresponding mask of needs version, leave the zone of complete printing opacity
Step 2: on substrate, deposit data conductor layer (105), second insulation course (106) successively, deposit second layer photoresist (202) then, adopt second GTM or HTM mask, after development and Reflow technology, form the photoresist of three kinds of thickness, by second dielectric film of etching technics etching removal transistor channel part, get rid of second dielectric film in no conductive pattern district; Under removing, etching is exposed to the data conductor layer pattern on surface; Ashing is once exposed second dielectric film of contact hole part; Second dielectric film that is exposed to the surface is carried out etching, expose the data conductor layer of contact hole part; Remove the remained on surface photoresist,
Step 3, pixel deposition electrode layer (107) on substrate, deposition the 3rd layer photoetching glue (203) utilizes the 3rd mask to expose for the third time on this, forms pixel electrode layer after the development etching.
2. the method for manufacturing LCD (Liquid Crystal Display) array substrate as claimed in claim 1 is characterized in that, utilizes step 1 will need the regional metal of reserve part photoresist to be exposed to the surface, and the transistor part active layer is exposed to the surface.
3. the method for manufacturing LCD (Liquid Crystal Display) array substrate as claimed in claim 1 is characterized in that, the contact hole on gate electrode layer, the data conductor electrode layer partly adopts exposure and aftertreatment technology to make.
4. the method for manufacturing LCD (Liquid Crystal Display) array substrate as claimed in claim 1, it is characterized in that, described LCD (Liquid Crystal Display) array substrate comprises: glass substrate, controlling grid scan line, gate electrode, first grid insulation course, active layer, doped layer, second insulation course, data line, the source transistor drain electrode, pixel electrode, described gate electrode and controlling grid scan line are electrically connected, described gate electrode layer material therefor is AlNd, AI, Cu, MO, one of MoW or Cr or that combination in any constituted was compound, the described first grid insulation course and second insulation course are SiO2, one of SiNx or SiOxNy material or that combination in any constituted was compound, described data line layer metal is Mo, one of MoW or Cr or that combination in any constituted was compound.
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| CN 200710048135 CN101435960B (en) | 2007-11-13 | 2007-11-13 | Manufacturing method of liquid crystal display device array substrate |
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| CN 200710048135 CN101435960B (en) | 2007-11-13 | 2007-11-13 | Manufacturing method of liquid crystal display device array substrate |
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| CN101435960B true CN101435960B (en) | 2011-08-17 |
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| CN103311308B (en) * | 2012-03-14 | 2016-02-17 | 群康科技(深圳)有限公司 | Thin film transistor base plate and preparation method thereof and there is its display |
| CN103365013B (en) * | 2013-07-01 | 2016-03-02 | 京东方科技集团股份有限公司 | A kind of array base palte, LCDs and display device |
| CN104966791B (en) * | 2015-07-01 | 2018-05-11 | 深圳市华星光电技术有限公司 | A kind of mask plate and its manufacture method, OLED device method for packing |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1564962A (en) * | 2001-10-02 | 2005-01-12 | 富士通显示技术株式会社 | Liquid crystal display device and method of fabricating the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1564962A (en) * | 2001-10-02 | 2005-01-12 | 富士通显示技术株式会社 | Liquid crystal display device and method of fabricating the same |
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| JP特开2007-279616A 2007.10.25 |
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Owner name: SHANGHAI ZHONGHANG OPTOELECTRONICS CO., LTD. Free format text: FORMER OWNER: SHANGHAI SVA NEC LIQUID CRYSTAL DISPLAY CO., LTD. Effective date: 20100325 |
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